/**
* \brief Test physical loop-back with some characters in sunc mode.
*
* This function sends a character over USART on loop back to verify that init
* and sending/receiving works. A jumper is connected on the USART.
*
* \param test Current test case.
*/
static void run_loopback_syncmode_test(const struct test_case *test)
{
uint8_t out_c = 'c';
uint8_t in_c = 0;
port_pin_t sck_pin;
sysclk_enable_module(POWER_RED_REG0, PRUSART0_bm);
usart_set_mode(&CONF_UNIT_USART, USART_CMODE_SYNCHRONOUS_gc);
sck_pin = IOPORT_CREATE_PIN(PORTE, 2);
ioport_configure_port_pin(ioport_pin_to_port(sck_pin),
ioport_pin_to_mask(sck_pin),
IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH );
usart_spi_set_baudrate(&CONF_UNIT_USART, CONF_UNIT_BAUDRATE,
sysclk_get_source_clock_hz());
usart_tx_enable(&CONF_UNIT_USART);
usart_rx_enable(&CONF_UNIT_USART);
usart_putchar(&CONF_UNIT_USART, out_c);
in_c = usart_getchar(&CONF_UNIT_USART);
test_assert_true(test, in_c == out_c,
"Read character through sync mode is not correct: %d != %d", in_c, out_c);
}
/**
* \brief Initialize USART in SPI master mode.
*
* This function initializes the USART module in SPI master mode using the
* usart_spi_options_t configuration structure and CPU frequency.
*
* \param usart The USART module.
* \param opt The RS232 configuration option.
*/
void usart_init_spi(USART_t *usart, const usart_spi_options_t *opt)
{
usart->UBRR = 0;
usart_enable_module_clock(usart);
usart_set_mode(usart, USART_CMODE_MSPI_gc);
if (opt->spimode == 1 || opt->spimode == 3) {
usart->UCSRnC |= USART_UCPHA_bm;
} else {
usart->UCSRnC &= ~USART_UCPHA_bm;
}
if (opt->spimode == 2 || opt->spimode == 3) {
usart->UCSRnC |= USART_UCPOL_bm;
} else {
usart->UCSRnC &= ~USART_UCPOL_bm;
}
if (opt->data_order) {
usart->UCSRnC |= USART_DORD_bm;
} else {
usart->UCSRnC &= ~USART_DORD_bm;
}
usart_spi_set_baudrate(usart, opt->baudrate,
sysclk_get_source_clock_hz());
usart_tx_enable(usart);
usart_rx_enable(usart);
}
void USART_L_init(void)
{
usart_set_mode(&Wireless_L_USART,USART_CMODE_ASYNCHRONOUS_gc);
usart_format_set(&Wireless_L_USART,USART_CHSIZE_8BIT_gc,USART_PMODE_DISABLED_gc,false);
usart_set_rx_interrupt_level(&Wireless_L_USART,USART_INT_LVL_MED);
//usart_set_tx_interrupt_level(&Wireless_L_USART,USART_INT_LVL_MED);
usart_set_baudrate(&Wireless_L_USART,USART_BUADRATE,F_CPU);
usart_tx_enable(&Wireless_L_USART);
usart_rx_enable(&Wireless_L_USART);
}
/**
* \brief Initialize USART in RS232 mode.
*
* This function initializes the USART module in RS232 mode using the
* usart_rs232_options_t configuration structure and CPU frequency.
*
* \param usart The USART module.
* \param opt The RS232 configuration option.
*/
void usart_init_rs232(USART_t *usart, const usart_rs232_options_t *opt)
{
usart_enable_module_clock(usart);
usart_set_mode(usart, USART_CMODE_ASYNCHRONOUS_gc);
usart_format_set(usart, opt->charlength, opt->paritytype,
opt->stopbits);
usart_set_baudrate(usart, opt->baudrate, sysclk_get_per_hz());
usart_tx_enable(usart);
usart_rx_enable(usart);
}
/**
* \brief Initialize USART in RS232 mode.
*
* This function initializes the USART module in RS232 mode using the
* usart_rs232_options_t configuration structure and CPU frequency.
*
* \param usart The USART module.
* \param opt The RS232 configuration option.
*
* \retval true if the initialization was successfull
* \retval false if the initialization failed (error in baud rate calculation)
*/
bool usart_init_rs232(USART_t *usart, const usart_rs232_options_t *opt)
{
bool result;
sysclk_enable_peripheral_clock(usart);
usart_set_mode(usart, USART_CMODE_ASYNCHRONOUS_gc);
usart_format_set(usart, opt->charlength, opt->paritytype,
opt->stopbits);
result = usart_set_baudrate(usart, opt->baudrate, sysclk_get_per_hz());
usart_tx_enable(usart);
usart_rx_enable(usart);
return result;
}
/**
* \brief Initialize USART in SPI master mode.
*
* This function initializes the USART module in SPI master mode using the
* usart_spi_options_t configuration structure and CPU frequency.
*
* \param usart The USART module.
* \param opt The RS232 configuration option.
*/
void usart_init_spi(USART_t *usart, const usart_spi_options_t *opt)
{
usart->UBRR = 0;
usart_enable_module_clock(usart);
usart_set_mode(usart, USART_CMODE_MSPI_gc);
port_pin_t sck_pin;
#ifdef USARTA0
if ((uintptr_t)usart == (uintptr_t)&UCSR0A) {
sck_pin = IOPORT_CREATE_PIN(PORTE, 2);
ioport_configure_port_pin(ioport_pin_to_port(sck_pin),
ioport_pin_to_mask(sck_pin),
IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH );
}
#endif
#ifdef USARTA1
if ((uintptr_t)usart == (uintptr_t)&UCSR1A) {
sck_pin = IOPORT_CREATE_PIN(PORTD, 5);
ioport_configure_port_pin(ioport_pin_to_port(sck_pin),
ioport_pin_to_mask(sck_pin),
IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH );
}
#endif
if (opt->spimode == 1 || opt->spimode == 3) {
usart->UCSRnC |= USART_UCPHA_bm;
} else {
usart->UCSRnC &= ~USART_UCPHA_bm;
}
if (opt->spimode == 2 || opt->spimode == 3) {
usart->UCSRnC |= USART_UCPOL_bm;
} else {
usart->UCSRnC &= ~USART_UCPOL_bm;
}
if (opt->data_order) {
usart->UCSRnC |= USART_DORD_bm;
} else {
usart->UCSRnC &= ~USART_DORD_bm;
}
usart_spi_set_baudrate(usart, opt->baudrate,
sysclk_get_source_clock_hz());
usart_tx_enable(usart);
usart_rx_enable(usart);
}
/**
* \brief Initialize USART in SPI master mode.
*
* This function initializes the USART module in SPI master mode using the
* usart_spi_options_t configuration structure and CPU frequency.
*
* \param usart The USART module.
* \param opt The RS232 configuration option.
*/
void usart_init_spi(USART_t *usart, const usart_spi_options_t *opt)
{
ioport_pin_t sck_pin;
bool invert_sck;
sysclk_enable_peripheral_clock(usart);
usart_rx_disable(usart);
/* configure Clock polarity using INVEN bit of the correct SCK I/O port **/
invert_sck = (opt->spimode == 2) || (opt->spimode == 3);
UNUSED(invert_sck);
#ifdef USARTC0
if ((uint16_t)usart == (uint16_t)&USARTC0) {
sck_pin = IOPORT_CREATE_PIN(PORTC, 1);
}
#endif
#ifdef USARTC1
if ((uint16_t)usart == (uint16_t)&USARTC1) {
sck_pin = IOPORT_CREATE_PIN(PORTC, 5);
}
#endif
#ifdef USARTD0
if ((uint16_t)usart == (uint16_t)&USARTD0) {
sck_pin = IOPORT_CREATE_PIN(PORTD, 1);
}
#endif
#ifdef USARTD1
if ((uint16_t)usart == (uint16_t)&USARTD1) {
sck_pin = IOPORT_CREATE_PIN(PORTD, 5);
}
#endif
#ifdef USARTE0
if ((uint16_t)usart == (uint16_t)&USARTE0) {
sck_pin = IOPORT_CREATE_PIN(PORTE, 1);
}
#endif
#ifdef USARTE1
if ((uint16_t)usart == (uint16_t)&USARTE1) {
sck_pin = IOPORT_CREATE_PIN(PORTE, 5);
}
#endif
#ifdef USARTF0
if ((uint16_t)usart == (uint16_t)&USARTF0) {
sck_pin = IOPORT_CREATE_PIN(PORTF, 1);
}
#endif
#ifdef USARTF1
if ((uint16_t)usart == (uint16_t)&USARTF1) {
sck_pin = IOPORT_CREATE_PIN(PORTF, 5);
}
#endif
/* Configure the USART output pin */
ioport_set_pin_dir(sck_pin, IOPORT_DIR_OUTPUT);
ioport_set_pin_mode(sck_pin,
IOPORT_MODE_TOTEM | (invert_sck? IOPORT_MODE_INVERT_PIN : 0));
ioport_set_pin_level(sck_pin, IOPORT_PIN_LEVEL_HIGH);
usart_set_mode(usart, USART_CMODE_MSPI_gc);
if (opt->spimode == 1 || opt->spimode == 3) {
usart->CTRLC |= USART_UCPHA_bm;
} else {
usart->CTRLC &= ~USART_UCPHA_bm;
}
if (opt->data_order) {
(usart)->CTRLC |= USART_DORD_bm;
} else {
(usart)->CTRLC &= ~USART_DORD_bm;
}
usart_spi_set_baudrate(usart, opt->baudrate, sysclk_get_per_hz());
usart_tx_enable(usart);
usart_rx_enable(usart);
}
/**
* \brief Test setting different parameters of the USART module
*
* This function calls the different set functions, and verifies that the
* correct values are being set.
*
* \param test Current test case.
*/
static void run_set_functions_test(const struct test_case *test)
{
bool success;
/* Set USART mode and verify that it has been correctly set. */
usart_set_mode(&CONF_UNIT_USART, USART_CMODE_MSPI_gc);
success = (CONF_UNIT_USART.UCSRnC & USART_UMSEL01_gm) ==
USART_CMODE_MSPI_gc;
test_assert_true(test, success,
"Trying to set USART mode to master SPI failed.");
/* Set USART sync mode and verify that it has been correctly set. */
usart_set_mode(&CONF_UNIT_USART, USART_CMODE_SYNCHRONOUS_gc);
success = (CONF_UNIT_USART.UCSRnC & USART_UMSEL01_gm) ==
USART_CMODE_SYNCHRONOUS_gc;
test_assert_true(test, success,
"Trying to set USART mode to sync mode failed.");
/* Test enabling and disabling USART double baud*/
usart_double_baud_enable(&CONF_UNIT_USART);
success = (CONF_UNIT_USART.UCSRnA & USART_U2X_bm);
test_assert_true(test, success, "Trying to enable USART double baud failed.");
usart_double_baud_disable(&CONF_UNIT_USART);
success = !(CONF_UNIT_USART.UCSRnA & USART_U2X_bm);
test_assert_true(test, success, "Trying to disable USART double baud failed.");
/* Test enabling and disabling USART RX */
usart_rx_enable(&CONF_UNIT_USART);
success = (CONF_UNIT_USART.UCSRnB & USART_RXEN_bm);
test_assert_true(test, success, "Trying to enable USART RX failed.");
usart_rx_disable(&CONF_UNIT_USART);
success = !(CONF_UNIT_USART.UCSRnB & USART_RXEN_bm);
test_assert_true(test, success, "Trying to disable USART RX failed.");
/* Test enabling and disabling USART TX */
usart_tx_enable(&CONF_UNIT_USART);
success = (CONF_UNIT_USART.UCSRnB & USART_TXEN_bm);
test_assert_true(test, success, "Trying to enable USART TX failed.");
usart_tx_disable(&CONF_UNIT_USART);
success = !(CONF_UNIT_USART.UCSRnB & USART_TXEN_bm);
test_assert_true(test, success, "Trying to disable USART TX failed.");
/* Test enabling and disabling USART TX complete interrupt*/
usart_tx_complete_interrupt_enable(&CONF_UNIT_USART);
success = (CONF_UNIT_USART.UCSRnB & USART_TXC_bm);
test_assert_true(test, success, "Trying to enable USART TX Complete interrupt failed.");
usart_tx_complete_interrupt_disable(&CONF_UNIT_USART);
success = !(CONF_UNIT_USART.UCSRnB & USART_TXC_bm);
test_assert_true(test, success, "Trying to disable USART TX Complete interrupt failed.");
/* Test enabling and disabling USART RX complete interrupt*/
usart_rx_complete_interrupt_enable(&CONF_UNIT_USART);
success = (CONF_UNIT_USART.UCSRnB & USART_RXC_bm);
test_assert_true(test, success, "Trying to enable USART RX Complete interrupt failed.");
usart_rx_complete_interrupt_disable(&CONF_UNIT_USART);
success = !(CONF_UNIT_USART.UCSRnB & USART_RXC_bm);
test_assert_true(test, success, "Trying to disable USART RX Complete interrupt failed.");
/* Test enabling and disabling USART data register empty interrupt*/
usart_data_empty_interrupt_enable(&CONF_UNIT_USART);
success = (CONF_UNIT_USART.UCSRnB & USART_DRIE_bm);
test_assert_true(test, success, "Trying to enable USART data register empty interrupt failed.");
usart_data_empty_interrupt_disable(&CONF_UNIT_USART);
success = !(CONF_UNIT_USART.UCSRnB & USART_DRIE_bm);
test_assert_true(test, success, "Trying to disable USART data register empty interrupt failed.");
/* Try to set format. */
usart_format_set(&CONF_UNIT_USART, USART_CHSIZE_8BIT_gc,
USART_PMODE_EVEN_gc, true);
success = !(CONF_UNIT_USART.UCSRnA & USART_FE_bm);
test_assert_true(test, success,
"Trying to set the Frame Format failed.");
}
/**
* \brief Initialize USART in SPI master mode.
*
* This function initializes the USART module in SPI master mode using the
* usart_spi_options_t configuration structure and CPU frequency.
*
* \param usart The USART module.
* \param opt The RS232 configuration option.
*/
void usart_init_spi(USART_t *usart, const usart_spi_options_t *opt)
{
usart_enable_module_clock(usart);
usart_set_mode(usart, USART_CMODE_MSPI_gc);
port_pin_t sck_pin;
if (opt->spimode == 1 || opt->spimode == 3) {
//! \todo Fix when UCPHA_bm is added to header file.
usart->CTRLC |= 0x02;
} else {
//! \todo Fix when UCPHA_bm is added to header file.
usart->CTRLC &= ~0x02;
}
// configure Clock polarity using INVEN bit of the correct SCK I/O port
if (opt->spimode == 2 || opt->spimode == 3) {
#ifdef USARTC0
if ((uint16_t)usart == (uint16_t)&USARTC0) {
sck_pin = IOPORT_CREATE_PIN(PORTC, 1);
ioport_configure_port_pin(ioport_pin_to_port(sck_pin),
ioport_pin_to_mask(sck_pin),
IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED);
}
#endif
#ifdef USARTC1
if ((uint16_t)usart == (uint16_t)&USARTC1) {
sck_pin = IOPORT_CREATE_PIN(PORTC, 5);
ioport_configure_port_pin(ioport_pin_to_port(sck_pin),
ioport_pin_to_mask(sck_pin),
IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED);
}
#endif
#ifdef USARTD0
if ((uint16_t)usart == (uint16_t)&USARTD0) {
sck_pin = IOPORT_CREATE_PIN(PORTD, 1);
ioport_configure_port_pin(ioport_pin_to_port(sck_pin),
ioport_pin_to_mask(sck_pin),
IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED);
}
#endif
#ifdef USARTD1
if ((uint16_t)usart == (uint16_t)&USARTD1) {
sck_pin = IOPORT_CREATE_PIN(PORTD, 5);
ioport_configure_port_pin(ioport_pin_to_port(sck_pin),
ioport_pin_to_mask(sck_pin),
IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED);
}
#endif
#ifdef USARTE0
if ((uint16_t)usart == (uint16_t)&USARTE0) {
sck_pin = IOPORT_CREATE_PIN(PORTE, 1);
ioport_configure_port_pin(ioport_pin_to_port(sck_pin),
ioport_pin_to_mask(sck_pin),
IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED);
}
#endif
#ifdef USARTE1
if ((uint16_t)usart == (uint16_t)&USARTE1) {
sck_pin = IOPORT_CREATE_PIN(PORTE, 5);
ioport_configure_port_pin(ioport_pin_to_port(sck_pin),
ioport_pin_to_mask(sck_pin),
IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED);
}
#endif
#ifdef USARTF0
if ((uint16_t)usart == (uint16_t)&USARTF0) {
sck_pin = IOPORT_CREATE_PIN(PORTF, 1);
ioport_configure_port_pin(ioport_pin_to_port(sck_pin),
ioport_pin_to_mask(sck_pin),
IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED);
}
#endif
#ifdef USARTF1
if ((uint16_t)usart == (uint16_t)&USARTF1) {
sck_pin = IOPORT_CREATE_PIN(PORTF, 5);
ioport_configure_port_pin(ioport_pin_to_port(sck_pin),
ioport_pin_to_mask(sck_pin),
IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED);
}
#endif
}
usart_spi_set_baudrate(usart, opt->baudrate, sysclk_get_per_hz());
usart_tx_enable(usart);
usart_rx_enable(usart);
}
