FRESULT play(FIL *fp) { UINT bytesread; FRESULT res; prepare_decoder(); do { WORD idx; res = f_read(fp, buf, 256, &bytesread); if ( res ) { usart_write_string("f_read failed :"); usart_write( (res / 10) + '0' ); usart_write( (res % 10) + '0' ); usart_write_cr(); return res; } if ( bytesread == 0 ) break; // usart_write_string("set 256 bytes..."); PORTD &= ~XDCS; idx = 0; do { do {} while (! (PIND & DREQ)); xchg_spi(buf[idx++]); } while (--bytesread); PORTD |= XDCS; // usart_write_string("done\r\n"); } while (1); usart_write_string("play done, reset vs1011e\r\n"); PORTD &= ~XRESET; return FR_OK; }
void test_timer0_with(uint64_t ps_num, uint8_t mode, uint8_t ps, uint64_t top_val) { #if defined(__AVR_ATmega328__) || defined(__AVR_ATmega328P__) timer0_set_enable_OCIE0x_interrupt(OCIE0A, FALSE); #endif reset(); usart_write_string("\n\tPrescale "); usart_write_num((int)ps_num); usart_write_byte('\n'); prescale = ps_num; //top = top_val; #if defined(__AVR_ATmega8__) || defined(__AVR_ATmega8A__) timer0_start(prescale); #elif defined(__AVR_ATmega328__) || defined(__AVR_ATmega328P__) timer0_start(mode, ps); if(mode != TIMER0_NORMAL) { timer0_set_cycle(TIMER0_COMPARATOR_A, (uint8_t)top_val); } timer0_set_enable_OCIE0x_interrupt(OCIE0A, TRUE); while(elapsed != SINGLE_TEST_SEC); timer0_set_enable_OCIE0x_interrupt(OCIE0A, FALSE); #endif }
static uint8_t get_byte(void) { uint8_t i, d; uint8_t pb; UINT n; i = playidx; n = playcnt; pb = playb; if (!n) { usart_write_string("uf"); return 125; } d = buffer[((uint16_t)pb << 8) + i++]; if (!--n) { if (pb == readb) { playb = 1-pb; i =0; n = readcnt; } } playidx = i; playcnt = n; if (d < 3) d = 3; d -= 3; if (d > 249) d = 249; return d; }
void test_timer0_normal() { usart_write_string("Timer/Counter0 normal mode: "); test_timer0_with(1UL, TIMER0_NORMAL, TIMER0_PRESCALE_0, 0xFFUL); test_timer0_with(8UL, TIMER0_NORMAL, TIMER0_PRESCALE_8, 0xFFUL); test_timer0_with(64UL, TIMER0_NORMAL, TIMER0_PRESCALE_64, 0xFFUL); test_timer0_with(256UL, TIMER0_NORMAL, TIMER0_PRESCALE_256, 0xFFUL); test_timer0_with(1024UL, TIMER0_NORMAL, TIMER0_PRESCALE_1024, 0xFFUL); usart_write_string_line("Done"); }
void test_timer0_ctc() { timer0_set_enable_OCIE0x_interrupt(OCIE0A, FALSE); usart_write_string("Timer/Counter0 CTC mode: "); test_timer0_with(1UL, TIMER0_CTC, TIMER0_PRESCALE_0, 0x0FUL); test_timer0_with(8UL, TIMER0_CTC, TIMER0_PRESCALE_8, 0x0FUL); test_timer0_with(64UL, TIMER0_CTC, TIMER0_PRESCALE_64, 0x0FUL); test_timer0_with(256UL, TIMER0_CTC, TIMER0_PRESCALE_256, 0x0FUL); test_timer0_with(1024UL, TIMER0_CTC, TIMER0_PRESCALE_1024, 0x0FUL); usart_write_string_line("Done"); }
void playfile(FIL* fp) { FRESULT res; DWORD size; UINT rsize; UINT rb; size = loadheader(fp); if (size < 1024) return; usart_write_string("loadheader : OK\r\n"); res = f_read(fp, buffer, 256 - (fp->fptr % 256) , &rb); size -= rb; playcnt = rb; if (res != FR_OK) return; res = f_read(fp, buffer+256, 256, &rb); size -= rb; readcnt = rb; if (res != FR_OK || rb != 256) return; playb = readb = 0; playidx = 0; usart_write_string("playfile : start\r\n"); startplayisr(); for (;;) { uint8_t p, r; do { cli(); p = playb; r = readb; sei(); } while (p == r); rsize = (size > 256) ? 256 : (UINT)size; res = f_read(fp, buffer + ((uint16_t)readb << 8), rsize, &rb); if (res != FR_OK) break; size -= rb; cli(); readb = playb; readcnt = rb; sei(); if (rb != 256) break; } while (playcnt) ; stopplayisr(); usart_write_string("playfile : play end\r\n"); /* Center Level */ OCR2B = 125; }
void prepare_decoder() { // SCK : PB5 -- Out, lo // MISO : PB4 -- In , hi-z // MOSI : PB3 -- Out, hi // SS : PB2 -- Out, hi PORTB = (PORTB & 0b11011111) | 0b00001100; /* Configure SCK/MOSI/CS as output */ DDRB = (DDRB & 0b11101111) | 0b00101100; PORTD = (PORTD & 0b11011011) | 0b00011000; DDRD = (DDRB & 0b11011111) | 0b00011100; SPCR = 0x50; /* Enable SPI function in mode 0, Fosc/4 */ SPSR = 0x00; /* SPI 1x mode */ usart_write_string("prepare vs1011e, now wakeup..."); /* Reset */ /* XRESET<-H, and wait 2ms, and wait until DREQ->H */ delay_ms(10); PORTD |= XRESET; delay_ms(3); do {} while (! (PIND & DREQ) ); usart_write_string("wakeup done, set SDI New mode..."); /* SDI New Mode */ PORTD &= ~XCS; /* Chip Select */ xchg_spi(0x02); /* Write */ xchg_spi(0x00); /* Address = MODE */ xchg_spi(0x08); /* SM_SDINEW = 1 */ xchg_spi(0x20); /* SM_TESTS = 1 */ PORTD |= XCS; delay_ms(1); do {} while (! (PIND & DREQ) ); usart_write_string("set clock doubler..."); /* Clock doubler */ PORTD &= ~XCS; /* Chip Select */ xchg_spi(0x02); /* Write */ xchg_spi(0x03); /* Address = CLOCKF */ xchg_spi(0x98); /* clock source : 12.288MHz */ xchg_spi(0x00); PORTD |= XCS; delay_ms(1); do {} while (! (PIND & DREQ) ); usart_write_string("set volume..."); /* Volume */ PORTD &= ~XCS; /* Chip Select */ xchg_spi(0x02); /* Write */ xchg_spi(0x0B); /* Address = VOL */ xchg_spi(0x20); /* L ch */ xchg_spi(0xFF); /* R ch */ PORTD |= XCS; delay_ms(1); do {} while (! (PIND & DREQ) ); usart_write_string("prepare done\r\n"); #if 0 BYTE dh, dl; PORTD &= ~XCS; xchg_spi(0x03); xchg_spi(0x01); dh = xchg_spi(0xff); dl = xchg_spi(0xff); PORTD |= XCS; delay_ms(1); do {} while (! (PIND & DREQ) ); usart_write( "0123456789ABCDEF"[ (dh >> 4) ] ); usart_write( "0123456789ABCDEF"[ (dh & 0x0f) ] ); usart_write( ' ' ); usart_write( "0123456789ABCDEF"[ (dl >> 4) ] ); usart_write( "0123456789ABCDEF"[ (dl & 0x0f) ] ); usart_write_cr(); PORTD &= ~XCS; xchg_spi(0x03); xchg_spi(0x00); dh = xchg_spi(0xff); dl = xchg_spi(0xff); PORTD |= XCS; delay_ms(1); do {} while (! (PIND & DREQ) ); usart_write( "0123456789ABCDEF"[ (dh >> 4) ] ); usart_write( "0123456789ABCDEF"[ (dh & 0x0f) ] ); usart_write( ' ' ); usart_write( "0123456789ABCDEF"[ (dl >> 4) ] ); usart_write( "0123456789ABCDEF"[ (dl & 0x0f) ] ); usart_write_cr(); PORTD &= ~XCS; xchg_spi(0x03); xchg_spi(0x03); dh = xchg_spi(0xff); dl = xchg_spi(0xff); PORTD |= XCS; delay_ms(1); do {} while (! (PIND & DREQ) ); usart_write( "0123456789ABCDEF"[ (dh >> 4) ] ); usart_write( "0123456789ABCDEF"[ (dh & 0x0f) ] ); usart_write( ' ' ); usart_write( "0123456789ABCDEF"[ (dl >> 4) ] ); usart_write( "0123456789ABCDEF"[ (dl & 0x0f) ] ); usart_write_cr(); PORTD &= ~XCS; xchg_spi(0x03); xchg_spi(0x0B); dh = xchg_spi(0xff); dl = xchg_spi(0xff); PORTD |= XCS; delay_ms(1); do {} while (! (PIND & DREQ) ); usart_write( "0123456789ABCDEF"[ (dh >> 4) ] ); usart_write( "0123456789ABCDEF"[ (dh & 0x0f) ] ); usart_write( ' ' ); usart_write( "0123456789ABCDEF"[ (dl >> 4) ] ); usart_write( "0123456789ABCDEF"[ (dl & 0x0f) ] ); usart_write_cr(); #endif }