void __init u8500_map_io(void) { /* * Map the UARTs early so that the DEBUG_LL stuff continues to work. */ iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc)); /* * STE NMF CM driver only used on the U8500 allocate using * dma_alloc_coherent: * 8M for SIA and SVA data + 2M for SIA code + 2M for SVA code * Can't be higher than 14M with VMALLOC_END at 0xFF000000 */ init_consistent_dma_size(14*SZ_1M); ux500_map_io(); iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc)); if (cpu_is_ux540_family()) iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc)); else iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); _PRCMU_BASE = __io_address(U8500_PRCMU_BASE); }
void __init u8500_map_io(void) { /* * Map the UARTs early so that the DEBUG_LL stuff continues to work. */ iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc)); ux500_map_io(); iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc)); if (cpu_is_u9540()) iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc)); else iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); _PRCMU_BASE = __io_address(U8500_PRCMU_BASE); #ifdef CONFIG_CACHE_L2X0 /* L2 cache may already be enabled and must be initialized for * ramdumping to work. This is the earliest possible place. */ ux500_l2x0_init(); #endif }
void __init u5500_map_io(void) { iotable_init(u5500_uart_io_desc, ARRAY_SIZE(u5500_uart_io_desc)); ux500_map_io(); iotable_init(u5500_io_desc, ARRAY_SIZE(u5500_io_desc)); _PRCMU_BASE = __io_address(U5500_PRCMU_BASE); }
void __init u5500_map_io(void) { /* * Map the UARTs early so that the DEBUG_LL stuff continues to work. */ iotable_init(u5500_uart_io_desc, ARRAY_SIZE(u5500_uart_io_desc)); ux500_map_io(); iotable_init(u5500_io_desc, ARRAY_SIZE(u5500_io_desc)); _PRCMU_BASE = __io_address(U5500_PRCMU_BASE); }
void __init u8500_map_io(void) { /* * Map the UARTs early so that the DEBUG_LL stuff continues to work. */ iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc)); ux500_map_io(); iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc)); if (cpu_is_ux540_family()) iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc)); else iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); }
void __init u8500_map_io(void) { /* * Map the UARTs early so that the DEBUG_LL stuff continues to work. */ iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc)); ux500_map_io(); iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); if (cpu_is_u8500ed()) iotable_init(u8500_ed_io_desc, ARRAY_SIZE(u8500_ed_io_desc)); else if (cpu_is_u8500v1()) iotable_init(u8500_v1_io_desc, ARRAY_SIZE(u8500_v1_io_desc)); else if (cpu_is_u8500v2()) iotable_init(u8500_v2_io_desc, ARRAY_SIZE(u8500_v2_io_desc)); _PRCMU_BASE = __io_address(U8500_PRCMU_BASE); }
void __init u5500_map_io(void) { ux500_map_io(); iotable_init(u5500_io_desc, ARRAY_SIZE(u5500_io_desc)); }