static void
write_texture_p1(struct vc5_job *job,
                 struct vc5_cl_out **uniforms,
                 struct vc5_texture_stateobj *texstate,
                 uint32_t unit)
{
        struct pipe_sampler_view *psview = texstate->textures[unit];
        struct vc5_sampler_view *sview = vc5_sampler_view(psview);

        struct V3D33_TEXTURE_UNIFORM_PARAMETER_1_CFG_MODE1 unpacked = {
                .texture_state_record_base_address = texstate->texture_state[unit],
        };

        uint32_t packed;
        V3D33_TEXTURE_UNIFORM_PARAMETER_1_CFG_MODE1_pack(&job->indirect,
                                                         (uint8_t *)&packed,
                                                         &unpacked);

        cl_aligned_u32(uniforms, packed | sview->p1);
}

struct vc5_cl_reloc
vc5_write_uniforms(struct vc5_context *vc5, struct vc5_compiled_shader *shader,
                   struct vc5_constbuf_stateobj *cb,
                   struct vc5_texture_stateobj *texstate)
{
        struct v3d_uniform_list *uinfo = &shader->prog_data.base->uniforms;
        struct vc5_job *job = vc5->job;
        const uint32_t *gallium_uniforms = cb->cb[0].user_buffer;
        struct vc5_bo *ubo = vc5_upload_ubo(vc5, shader, gallium_uniforms);

        /* We always need to return some space for uniforms, because the HW
         * will be prefetching, even if we don't read any in the program.
         */
        vc5_cl_ensure_space(&job->indirect, MAX2(uinfo->count, 1) * 4, 4);

        struct vc5_cl_reloc uniform_stream = cl_get_address(&job->indirect);
        vc5_bo_reference(uniform_stream.bo);

        struct vc5_cl_out *uniforms =
                cl_start(&job->indirect);

        for (int i = 0; i < uinfo->count; i++) {

                switch (uinfo->contents[i]) {
                case QUNIFORM_CONSTANT:
                        cl_aligned_u32(&uniforms, uinfo->data[i]);
                        break;
                case QUNIFORM_UNIFORM:
                        cl_aligned_u32(&uniforms,
                                       gallium_uniforms[uinfo->data[i]]);
                        break;
                case QUNIFORM_VIEWPORT_X_SCALE:
                        cl_aligned_f(&uniforms, vc5->viewport.scale[0] * 256.0f);
                        break;
                case QUNIFORM_VIEWPORT_Y_SCALE:
                        cl_aligned_f(&uniforms, vc5->viewport.scale[1] * 256.0f);
                        break;

                case QUNIFORM_VIEWPORT_Z_OFFSET:
                        cl_aligned_f(&uniforms, vc5->viewport.translate[2]);
                        break;
                case QUNIFORM_VIEWPORT_Z_SCALE:
                        cl_aligned_f(&uniforms, vc5->viewport.scale[2]);
                        break;

                case QUNIFORM_USER_CLIP_PLANE:
                        cl_aligned_f(&uniforms,
                                     vc5->clip.ucp[uinfo->data[i] / 4][uinfo->data[i] % 4]);
                        break;

                case QUNIFORM_TEXTURE_CONFIG_P1:
                        write_texture_p1(job, &uniforms, texstate,
                                         uinfo->data[i]);
                        break;

#if 0
                case QUNIFORM_TEXTURE_FIRST_LEVEL:
                        write_texture_first_level(job, &uniforms, texstate,
                                                  uinfo->data[i]);
                        break;
#endif

                case QUNIFORM_TEXRECT_SCALE_X:
                case QUNIFORM_TEXRECT_SCALE_Y:
                        cl_aligned_u32(&uniforms,
                                       get_texrect_scale(texstate,
                                                         uinfo->contents[i],
                                                         uinfo->data[i]));
                        break;

                case QUNIFORM_TEXTURE_WIDTH:
                case QUNIFORM_TEXTURE_HEIGHT:
                case QUNIFORM_TEXTURE_DEPTH:
                case QUNIFORM_TEXTURE_ARRAY_SIZE:
                case QUNIFORM_TEXTURE_LEVELS:
                        cl_aligned_u32(&uniforms,
                                       get_texture_size(texstate,
                                                        uinfo->contents[i],
                                                        uinfo->data[i]));
                        break;

                case QUNIFORM_STENCIL:
                        cl_aligned_u32(&uniforms,
                                       vc5->zsa->stencil_uniforms[uinfo->data[i]] |
                                       (uinfo->data[i] <= 1 ?
                                        (vc5->stencil_ref.ref_value[uinfo->data[i]] << 8) :
                                        0));
                        break;

                case QUNIFORM_ALPHA_REF:
                        cl_aligned_f(&uniforms,
                                     vc5->zsa->base.alpha.ref_value);
                        break;

                case QUNIFORM_SAMPLE_MASK:
                        cl_aligned_u32(&uniforms, vc5->sample_mask);
                        break;

                case QUNIFORM_UBO_ADDR:
                        if (uinfo->data[i] == 0) {
                                cl_aligned_reloc(&job->indirect, &uniforms,
                                                 ubo, 0);
                        } else {
                                int ubo_index = uinfo->data[i];
                                struct vc5_resource *rsc =
                                        vc5_resource(cb->cb[ubo_index].buffer);

                                cl_aligned_reloc(&job->indirect, &uniforms,
                                                 rsc->bo,
                                                 cb->cb[ubo_index].buffer_offset);
                        }
                        break;

                case QUNIFORM_TEXTURE_FIRST_LEVEL:
                case QUNIFORM_TEXTURE_MSAA_ADDR:
                case QUNIFORM_TEXTURE_BORDER_COLOR:
                        /* XXX */
                        break;

                default:
                        assert(quniform_contents_is_texture_p0(uinfo->contents[i]));

                        write_texture_p0(job, &uniforms, texstate,
                                         uinfo->contents[i] -
                                         QUNIFORM_TEXTURE_CONFIG_P0_0,
                                         uinfo->data[i]);
                        break;

                }
#if 0
                uint32_t written_val = *((uint32_t *)uniforms - 1);
                fprintf(stderr, "shader %p[%d]: 0x%08x / 0x%08x (%f)\n",
                        shader, i, __gen_address_offset(&uniform_stream) + i * 4,
                        written_val, uif(written_val));
#endif
        }

        cl_end(&job->indirect, uniforms);

        vc5_bo_unreference(&ubo);

        return uniform_stream;
}

void
vc5_set_shader_uniform_dirty_flags(struct vc5_compiled_shader *shader)
{
        uint32_t dirty = 0;

        for (int i = 0; i < shader->prog_data.base->uniforms.count; i++) {
                switch (shader->prog_data.base->uniforms.contents[i]) {
                case QUNIFORM_CONSTANT:
                        break;
                case QUNIFORM_UNIFORM:
                case QUNIFORM_UBO_ADDR:
                        dirty |= VC5_DIRTY_CONSTBUF;
                        break;

                case QUNIFORM_VIEWPORT_X_SCALE:
                case QUNIFORM_VIEWPORT_Y_SCALE:
                case QUNIFORM_VIEWPORT_Z_OFFSET:
                case QUNIFORM_VIEWPORT_Z_SCALE:
                        dirty |= VC5_DIRTY_VIEWPORT;
                        break;

                case QUNIFORM_USER_CLIP_PLANE:
                        dirty |= VC5_DIRTY_CLIP;
                        break;

                case QUNIFORM_TEXTURE_CONFIG_P1:
                case QUNIFORM_TEXTURE_BORDER_COLOR:
                case QUNIFORM_TEXTURE_FIRST_LEVEL:
                case QUNIFORM_TEXTURE_MSAA_ADDR:
                case QUNIFORM_TEXRECT_SCALE_X:
                case QUNIFORM_TEXRECT_SCALE_Y:
                case QUNIFORM_TEXTURE_WIDTH:
                case QUNIFORM_TEXTURE_HEIGHT:
                case QUNIFORM_TEXTURE_DEPTH:
                case QUNIFORM_TEXTURE_ARRAY_SIZE:
                case QUNIFORM_TEXTURE_LEVELS:
                        /* We could flag this on just the stage we're
                         * compiling for, but it's not passed in.
                         */
                        dirty |= VC5_DIRTY_FRAGTEX | VC5_DIRTY_VERTTEX;
                        break;

                case QUNIFORM_STENCIL:
                case QUNIFORM_ALPHA_REF:
                        dirty |= VC5_DIRTY_ZSA;
                        break;

                case QUNIFORM_SAMPLE_MASK:
                        dirty |= VC5_DIRTY_SAMPLE_MASK;
                        break;

                default:
                        assert(quniform_contents_is_texture_p0(shader->prog_data.base->uniforms.contents[i]));
                        dirty |= VC5_DIRTY_FRAGTEX | VC5_DIRTY_VERTTEX;
                        break;
                }
        }

        shader->uniform_dirty_bits = dirty;
}
Esempio n. 2
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/** Writes the V3D 3.x P1 (CFG_MODE=1) texture parameter. */
static void
write_texture_p1(struct vc5_job *job,
                 struct vc5_cl_out **uniforms,
                 struct vc5_texture_stateobj *texstate,
                 uint32_t data)
{
        /* Extract the texture unit from the top bits, and the compiler's
         * packed p1 from the bottom.
         */
        uint32_t unit = data >> 5;
        uint32_t p1 = data & 0x1f;

        struct pipe_sampler_view *psview = texstate->textures[unit];
        struct vc5_sampler_view *sview = vc5_sampler_view(psview);

        struct V3D33_TEXTURE_UNIFORM_PARAMETER_1_CFG_MODE1 unpacked = {
                .texture_state_record_base_address = texstate->texture_state[unit],
        };

        uint32_t packed;
        V3D33_TEXTURE_UNIFORM_PARAMETER_1_CFG_MODE1_pack(&job->indirect,
                                                         (uint8_t *)&packed,
                                                         &unpacked);

        cl_aligned_u32(uniforms, p1 | packed | sview->p1);
}

/** Writes the V3D 4.x TMU configuration parameter 0. */
static void