__s32 BSP_disp_vga_open(__u32 sel) { if (!(gdisp.screen[sel].status & VGA_ON)) { __disp_vga_mode_t vga_mode; __u32 i = 0; vga_mode = gdisp.screen[sel].vga_mode; lcdc_clk_on(sel); image_clk_on(sel); /* * set image normal channel start bit , because every * de_clk_off( ) will reset this bit */ Image_open(sel); tve_clk_on(sel); disp_clk_cfg(sel, DISP_OUTPUT_TYPE_VGA, vga_mode); Disp_lcdc_pin_cfg(sel, DISP_OUTPUT_TYPE_VGA, 1); #ifdef CONFIG_ARCH_SUN4I BSP_disp_set_output_csc(sel, DISP_OUTPUT_TYPE_VGA); #else BSP_disp_set_output_csc(sel, DISP_OUTPUT_TYPE_VGA, gdisp.screen[sel]. iep_status & DRC_USED); #endif DE_BE_set_display_size(sel, vga_mode_to_width(vga_mode), vga_mode_to_height(vga_mode)); DE_BE_Output_Select(sel, sel); TCON1_set_vga_mode(sel, vga_mode); TVE_set_vga_mode(sel); Disp_TVEC_Open(sel); TCON1_open(sel); for (i = 0; i < 4; i++) { if (gdisp.screen[sel].dac_source[i] == DISP_TV_DAC_SRC_COMPOSITE) { TVE_dac_set_source(1 - sel, i, DISP_TV_DAC_SRC_COMPOSITE); TVE_dac_sel(1 - sel, i, i); } } Disp_Switch_Dram_Mode(DISP_OUTPUT_TYPE_VGA, vga_mode); gdisp.screen[sel].b_out_interlace = 0; gdisp.screen[sel].status |= VGA_ON; gdisp.screen[sel].lcdc_status |= LCDC_TCON1_USED; gdisp.screen[sel].output_type = DISP_OUTPUT_TYPE_VGA; Display_set_fb_timing(sel); } return DIS_SUCCESS; }
__s32 bsp_disp_vga_open(__u32 screen_id) { if(!(gdisp.screen[screen_id].status & VGA_ON)) { __disp_vga_mode_t vga_mode; __u32 i = 0; vga_mode = gdisp.screen[screen_id].vga_mode; lcdc_clk_on(screen_id, 1, 0); lcdc_clk_on(screen_id, 1, 1); tcon_init(screen_id); image_clk_on(screen_id, 1); Image_open(screen_id);//set image normal channel start bit , because every de_clk_off( )will reset this bit tve_clk_on(screen_id); disp_clk_cfg(screen_id,DISP_OUTPUT_TYPE_VGA, vga_mode); gdisp.screen[screen_id].output_csc_type = DISP_OUT_CSC_TYPE_VGA; bsp_disp_set_output_csc(screen_id, gdisp.screen[screen_id].output_csc_type, bsp_disp_drc_get_input_csc(screen_id)); DE_BE_set_display_size(screen_id, vga_mode_to_width(vga_mode), vga_mode_to_height(vga_mode)); DE_BE_Output_Select(screen_id, screen_id); tcon1_set_vga_mode(screen_id,vga_mode); TVE_set_vga_mode(screen_id); Disp_TVEC_Open(screen_id); tcon1_open(screen_id); for(i=0; i<4; i++) { if(gdisp.screen[screen_id].dac_source[i] == DISP_TV_DAC_SRC_COMPOSITE) { TVE_dac_set_source(1-screen_id, i, DISP_TV_DAC_SRC_COMPOSITE); TVE_dac_sel(1-screen_id, i, i); } } Disp_Switch_Dram_Mode(DISP_OUTPUT_TYPE_VGA, vga_mode); gdisp.screen[screen_id].b_out_interlace = 0; gdisp.screen[screen_id].status |= VGA_ON; gdisp.screen[screen_id].lcdc_status |= LCDC_TCON1_USED; gdisp.screen[screen_id].output_type = DISP_OUTPUT_TYPE_VGA; #ifdef __LINUX_OSAL__ Display_set_fb_timming(screen_id); #endif } return DIS_SUCCESS; }
__s32 BSP_disp_get_screen_width(__u32 sel) { __u32 width = 0; if(gdisp.screen[sel].output_type == DISP_OUTPUT_TYPE_HDMI) { width = tv_mode_to_width(gdisp.screen[sel].hdmi_mode); } else if(gdisp.screen[sel].output_type == DISP_OUTPUT_TYPE_TV) { width = tv_mode_to_width(gdisp.screen[sel].tv_mode); } else if(gdisp.screen[sel].output_type == DISP_OUTPUT_TYPE_VGA) { width = vga_mode_to_width(gdisp.screen[sel].vga_mode); } else { width = gpanel_info[sel].lcd_x; } return width; }