Esempio n. 1
0
int Tilt::read(Result &result){
  if(! (result.get_type() == XYZ_RESULT)){
    return 0;
  }
  if(!this->has_init){
    init();
  }
  Result *temp = (Result *) &result;
  Xyz_position *position = (Xyz_position *) temp;
  unsigned char rx_buffer[I2C_BUFFER_SIZE];
  unsigned char command[2];
  command[0]= TILT_ADDRESS;
  command[1]= X_UPPER;
  i2c_write(&command[0], 2, 6);
  wait_for_bytes(6);
  i2c_read(&rx_buffer[0], 6);

  position->x=rx_buffer[1];                //load x axis upper 8 bits
  position->y=rx_buffer[2];                //load Y axis upper 8 bits
  position->z=rx_buffer[3];                //load z axis upper 8 bits

  if(position->x > 127) position->x -=256;//convert x to 10 bit value
    position->x=position->x*4 + rx_buffer[4];
  if (position->y > 127) position->y-=256;//convert y to 10 bit value
    position->y=position->y*4 + rx_buffer[5];
  if (position->z > 127) position->z-=256;//convert z to 10 bit value
    position->z=position->z*4 + rx_buffer[6];
  return 1;
}
Esempio n. 2
0
void Sonar::write_register(int reg_adr, int value) {
    unsigned char command[3];
    command[0]=SONAR_ADDRESS;
    command[1]=reg_adr;
    command[2]=value;
    i2c_write(&command[0],3,0x00);
    wait_for_bytes(0);
}
Esempio n. 3
0
void Io_8574::set(unsigned int value){
  if(!this->has_init){
    init();
  }
  unsigned char command[2];
  command[0] = i2c_address;
  command[1] = value;
  i2c_write(&command[0], 2, 0);
  wait_for_bytes(0);//wait for byte to be ready
}
Esempio n. 4
0
int Sonar::read_register(int reg_adr) {
    unsigned char rx_buffer[I2C_BUFFER_SIZE];
    unsigned char command[2];
    command[0]=SONAR_ADDRESS;
    command[1]=reg_adr;
    i2c_write(&command[0], 2, 1);
    wait_for_bytes(1);
    i2c_read(&rx_buffer[0], 1);
    return 0xff & rx_buffer[1]; //returns signed value
}
Esempio n. 5
0
int Io_8574::read(){
  if(!this->has_init){
    init();
  }
  unsigned char rx_buffer[I2C_BUFFER_SIZE];
  unsigned char command[1];
  command[0]=i2c_address;
  i2c_write(&command[0], 1, 1);
  wait_for_bytes(1);
  i2c_read(&rx_buffer[0], 1);
  return  rx_buffer[1] & 0xff; //returns unsigned value
}
Esempio n. 6
0
int Compass::read(){
  if(!this->has_init){
    init();
  }
  unsigned char rx_buffer[I2C_BUFFER_SIZE];
  unsigned char command[2];
  command[0]= COMPASS_ADDRESS;
  command[1]= DEGREE;
  i2c_write(&command[0], 2, 2);
  wait_for_bytes(2);
  i2c_read(&rx_buffer[0], 2);
  return (0xff & rx_buffer[1])*2 + rx_buffer[2];
}
Esempio n. 7
0
void I2c::i2c_read(unsigned char* rx_buffer, int rx_length){
  int i;
  unsigned char command[5];
  wait_for_bytes(rx_length);
  command[0]=0x03;
  command[1]=0x00;
  command[2]=0x00;
  command[3]=0x10;
  command[4]=sensor_port;
  connection->send(&command[0],5);
  connection->receive(rx_buffer,22);
  if(rx_buffer[4]){
    throw Nxt_exception::Nxt_exception("read","I2C", 0x00ff & rx_buffer[4]);
  }
  i=0;
  //printf("\nI2C read:\n");
  while(i<16){
     rx_buffer[i]=rx_buffer[i+5];
     //printf("read[%d]: %d\n", i, rx_buffer[i]);
     i++;
  }
}
Esempio n. 8
0
File: spi.c Progetto: longsleep/ec
/**
 * Handle an event on the NSS pin
 *
 * A falling edge of NSS indicates that the master is starting a new
 * transaction. A rising edge indicates that we have finsihed
 *
 * @param signal	GPIO signal for the NSS pin
 */
void spi_event(enum gpio_signal signal)
{
	stm32_dma_chan_t *rxdma;
	uint16_t *nss_reg;
	uint32_t nss_mask;
	uint16_t i;

	/* If not enabled, ignore glitches on NSS */
	if (!enabled)
		return;

	/* Check chip select.  If it's high, the AP ended a transaction. */
	nss_reg = gpio_get_level_reg(GPIO_SPI1_NSS, &nss_mask);
	if (REG16(nss_reg) & nss_mask) {
		enable_sleep(SLEEP_MASK_SPI);

		/*
		 * If the buffer is still used by the host command, postpone
		 * the DMA rx setup.
		 */
		if (state == SPI_STATE_PROCESSING) {
			setup_transaction_later = 1;
			return;
		}

		/* Set up for the next transaction */
		spi_init(); /* Fix for bug chrome-os-partner:31390 */
		return;
	}
	disable_sleep(SLEEP_MASK_SPI);

	/* Chip select is low = asserted */
	if (state != SPI_STATE_READY_TO_RX) {
		/*
		 * AP started a transaction but we weren't ready for it.
		 * Tell AP we weren't ready, and ignore the received data.
		 */
		CPRINTS("SPI not ready");
		tx_status(EC_SPI_NOT_READY);
		state = SPI_STATE_RX_BAD;
		return;
	}

	/* We're now inside a transaction */
	state = SPI_STATE_RECEIVING;
	tx_status(EC_SPI_RECEIVING);
	rxdma = dma_get_channel(STM32_DMAC_SPI1_RX);

	/* Wait for version, command, length bytes */
	if (wait_for_bytes(rxdma, 3, nss_reg, nss_mask))
		goto spi_event_error;

	if (in_msg[0] == EC_HOST_REQUEST_VERSION) {
		/* Protocol version 3 */
		struct ec_host_request *r = (struct ec_host_request *)in_msg;
		int pkt_size;

		/* Wait for the rest of the command header */
		if (wait_for_bytes(rxdma, sizeof(*r), nss_reg, nss_mask))
			goto spi_event_error;

		/*
		 * Check how big the packet should be.  We can't just wait to
		 * see how much data the host sends, because it will keep
		 * sending dummy data until we respond.
		 */
		pkt_size = host_request_expected_size(r);
		if (pkt_size == 0 || pkt_size > sizeof(in_msg))
			goto spi_event_error;

		/* Wait for the packet data */
		if (wait_for_bytes(rxdma, pkt_size, nss_reg, nss_mask))
			goto spi_event_error;

		spi_packet.send_response = spi_send_response_packet;

		spi_packet.request = in_msg;
		spi_packet.request_temp = NULL;
		spi_packet.request_max = sizeof(in_msg);
		spi_packet.request_size = pkt_size;

		/* Response must start with the preamble */
		memcpy(out_msg, out_preamble, sizeof(out_preamble));
		spi_packet.response = out_msg + sizeof(out_preamble);
		/* Reserve space for the preamble and trailing past-end byte */
		spi_packet.response_max = sizeof(out_msg)
			- sizeof(out_preamble) - EC_SPI_PAST_END_LENGTH;
		spi_packet.response_size = 0;

		spi_packet.driver_result = EC_RES_SUCCESS;

		/* Move to processing state */
		state = SPI_STATE_PROCESSING;
		tx_status(EC_SPI_PROCESSING);

		host_packet_receive(&spi_packet);
		return;

	} else if (in_msg[0] >= EC_CMD_VERSION0) {
		/*
		 * Protocol version 2
		 *
		 * TODO(crosbug.com/p/20257): Remove once kernel supports
		 * version 3.
		 */

#ifdef CHIP_FAMILY_STM32F0
		CPRINTS("WARNING: Protocol version 2 is not supported on the F0"
			" line due to crbug.com/31390");
#endif

		args.version = in_msg[0] - EC_CMD_VERSION0;
		args.command = in_msg[1];
		args.params_size = in_msg[2];

		/* Wait for parameters */
		if (wait_for_bytes(rxdma, 3 + args.params_size,
				   nss_reg, nss_mask))
			goto spi_event_error;

		/*
		 * Params are not 32-bit aligned in protocol version 2.  As a
		 * workaround, move them to the beginning of the input buffer
		 * so they are aligned.
		 */
		if (args.params_size)
			memmove(in_msg, in_msg + 3, args.params_size);

		args.params = in_msg;
		args.send_response = spi_send_response;

		/* Allow room for the header bytes */
		args.response = out_msg + SPI_PROTO2_OFFSET;
		args.response_max = sizeof(out_msg) - SPI_PROTO2_OVERHEAD;
		args.response_size = 0;
		args.result = EC_RES_SUCCESS;

		/* Move to processing state */
		state = SPI_STATE_PROCESSING;
		tx_status(EC_SPI_PROCESSING);

		host_command_received(&args);
		return;
	}

 spi_event_error:
	/* Error, timeout, or protocol we can't handle.  Ignore data. */
	tx_status(EC_SPI_RX_BAD_DATA);
	state = SPI_STATE_RX_BAD;
	CPRINTS("SPI rx bad data");

	CPRINTF("in_msg=[");
	for (i = 0; i < dma_bytes_done(rxdma, sizeof(in_msg)); i++)
		CPRINTF("%02x ", in_msg[i]);
	CPRINTF("]\n");
}