int main(void)
{
sysclk_init();
board_init();
// Start TC and configure pin to get PWM output to LED.
tc_init();
while (1) {
struct pll_config pcfg;
/*
* Initial state: Running from RC32M prescalers with 16x
* prescaling of CLKsys, 2x prescaling for CLKper2 and 2x
* prescaling for CLKper.
*/
wait_for_switches();
/*
* Prescale CLKsys by 128x, prescale all peripheral clocks by 1.
*/
sysclk_set_prescalers(SYSCLK_PSADIV_128, SYSCLK_PSBCDIV_1_1);
wait_for_switches();
/*
* Switch to RC2M with 4x prescaling of CLKsys, 4x prescaling
* for CLKper2 and 1x prescaling for CLKper.
*/
osc_enable(OSC_ID_RC2MHZ);
do {} while (!osc_is_ready(OSC_ID_RC2MHZ));
sysclk_set_source(SYSCLK_SRC_RC2MHZ);
sysclk_set_prescalers(SYSCLK_PSADIV_4, SYSCLK_PSBCDIV_4_1);
osc_disable(OSC_ID_RC32MHZ);
wait_for_switches();
/*
* Switch to PLL with RC2M as reference and 4x multiplier.
* Prescale CLKsys by 128x, and all peripheral clocks by 1x.
*/
pll_config_init(&pcfg, PLL_SRC_RC2MHZ, 1, 4);
pll_enable(&pcfg, 0);
do {} while (!pll_is_locked(0));
sysclk_set_prescalers(SYSCLK_PSADIV_128, SYSCLK_PSBCDIV_1_1);
sysclk_set_source(SYSCLK_SRC_PLL);
wait_for_switches();
/*
* Go back to the initial state and start over.
*/
osc_enable(OSC_ID_RC32MHZ);
do {} while(!osc_is_ready(OSC_ID_RC32MHZ));
sysclk_set_source(SYSCLK_SRC_RC32MHZ);
sysclk_set_prescalers(SYSCLK_PSADIV_16, SYSCLK_PSBCDIV_2_2);
pll_disable(0);
osc_disable(OSC_ID_RC2MHZ);
}
}
/**
* \brief Switch between various system clock sources and prescalers at
* run time.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
struct genclk_config gcfg;
sysclk_init();
board_init();
/* Setup SysTick Timer for 1 msec interrupts */
if (SysTick_Config(SystemCoreClock / 1000)) {
while (1); // Capture error
}
/* Enable PIO module related clock */
sysclk_enable_peripheral_clock(PIN_PUSHBUTTON_1_ID);
/* Configure specific CLKOUT pin */
ioport_set_pin_mode(GCLK_PIN, GCLK_PIN_MUX);
ioport_disable_pin(GCLK_PIN);
/* Configure the output clock source and frequency */
genclk_config_defaults(&gcfg, GCLK_ID);
genclk_config_set_source(&gcfg, GENCLK_PCK_SRC_PLLACK);
genclk_config_set_divider(&gcfg, GENCLK_PCK_PRES_1);
genclk_enable(&gcfg, GCLK_ID);
while (1) {
/*
* Initial state.
*/
wait_for_switches();
/*
* Divide MCK frequency by 2.
*/
sysclk_set_prescalers(SYSCLK_PRES_2);
genclk_config_set_divider(&gcfg, GENCLK_PCK_PRES_2);
genclk_enable(&gcfg, GCLK_ID);
wait_for_switches();
#ifdef BOARD_NO_32K_XTAL
/*
* Switch to the slow clock with all prescalers disabled.
*/
sysclk_set_source(SYSCLK_SRC_SLCK_RC);
sysclk_set_prescalers(SYSCLK_PRES_1);
genclk_config_set_source(&gcfg, GENCLK_PCK_SRC_SLCK_RC);
genclk_config_set_divider(&gcfg, GENCLK_PCK_PRES_1);
genclk_enable(&gcfg, GCLK_ID);
osc_disable(OSC_MAINCK_XTAL);
wait_for_switches();
#endif
/*
* Switch to internal 8 MHz RC.
*/
/* Switch to slow clock before switch main clock */
sysclk_set_source(SYSCLK_SRC_SLCK_RC);
osc_enable(OSC_MAINCK_8M_RC);
osc_wait_ready(OSC_MAINCK_8M_RC);
sysclk_set_source(SYSCLK_SRC_MAINCK_8M_RC);
genclk_config_set_source(&gcfg, GENCLK_PCK_SRC_MAINCK_8M_RC);
genclk_enable(&gcfg, GCLK_ID);
wait_for_switches();
#if BOARD_FREQ_MAINCK_XTAL
/*
* Switch to external crystal (8MHz or 12MHz, depend on the board).
*/
osc_enable(OSC_MAINCK_XTAL);
osc_wait_ready(OSC_MAINCK_XTAL);
sysclk_set_source(SYSCLK_SRC_MAINCK_XTAL);
genclk_config_set_source(&gcfg, GENCLK_PCK_SRC_MAINCK_XTAL);
genclk_enable(&gcfg, GCLK_ID);
osc_disable(OSC_MAINCK_8M_RC);
wait_for_switches();
#endif
/*
* Go back to the initial state and start over.
*/
sysclk_init();
genclk_config_set_source(&gcfg, GENCLK_PCK_SRC_PLLACK);
genclk_config_set_divider(&gcfg, GENCLK_PCK_PRES_1);
genclk_enable(&gcfg, GCLK_ID);
}
}
/**
* \brief Application entry point for LCDCA example.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
/* LCDCA configuration */
struct lcdca_config lcdca_cfg;
/* Automated display configuration */
struct lcdca_automated_char_config automated_char_cfg;
/* String for sequential display */
uint8_t const sequential_str[] = \
"Sequen tial string display,Press PB0 to Cont. ";
/* String for scrolling display */
uint8_t const scrolling_str[] = \
"Scrolling string display, Press PB0 to cont. ";
/* String for lowpower display */
#define MAX_NUM_LOWPOWER_STR 4
uint8_t const lowpower_str[MAX_NUM_LOWPOWER_STR][7] = {
"In ",
"Power ",
"Save ",
"Mode ",
};
uint32_t str_id = 0;
struct lcdca_blink_config blink_cfg;
struct lcdca_circular_shift_config cs_cfg;
/* Initialize the SAM system */
sysclk_init();
board_init();
sleepmgr_init();
/* Initialize the console uart */
configure_console();
/* Output example information */
printf("-- LCDCA Controller Example --\r\n");
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
/*
* LCDCA Controller initialization
* - Clock,
* - Connect to C42364A glass LCD component,
* - Timing: 64 Hz frame rate & low power waveform, FC0, FC1, FC2
* - Interrupt: off
*/
lcdca_clk_init();
lcdca_cfg.port_mask = PORT_MASK;
lcdca_cfg.x_bias = false;
lcdca_cfg.lp_wave = true;
lcdca_cfg.duty_type = LCD_DUTY;
lcdca_cfg.lcd_pres = false;
lcdca_cfg.lcd_clkdiv = 3;
lcdca_cfg.fc0 = 16;
lcdca_cfg.fc1 = 2;
lcdca_cfg.fc2 = 6;
lcdca_cfg.contrast = LCD_CONTRAST_LEVEL;
lcdca_set_config(&lcdca_cfg);
lcdca_enable();
lcdca_enable_timer(LCDCA_TIMER_FC0);
lcdca_enable_timer(LCDCA_TIMER_FC1);
lcdca_enable_timer(LCDCA_TIMER_FC2);
/* Turn on LCD back light */
ioport_set_pin_level(LCD_BL_GPIO, IOPORT_PIN_LEVEL_HIGH);
/* Display some texts and icon on segment LCD */
lcdca_set_pixel(ICON_ARM);
c42364a_write_num_packet((const uint8_t *)"0123");
c42364a_write_alpha_packet((const uint8_t *)"Welcome");
/* Blink "error" icon */
blink_cfg.lcd_blink_timer = LCDCA_TIMER_FC1;
blink_cfg.lcd_blink_mode = LCDCA_BLINK_SELECTED;
lcdca_blink_set_config(&blink_cfg);
lcdca_set_pixel(ICON_ERROR);
lcdca_set_blink_pixel(ICON_ERROR);
lcdca_blink_enable();
/* Autonomous segment animation of 7-pixels area of the LCD */
cs_cfg.lcd_csr_timer = LCDCA_TIMER_FC1;
cs_cfg.lcd_csr_dir = LCDCA_CSR_RIGHT;
cs_cfg.size = 7; /* Total 7-pixels */
cs_cfg.data = 0x03; /* Display 2 pixel at one time */
lcdca_circular_shift_set_config(&cs_cfg);
lcdca_circular_shift_enable();
/* Automated sequential character string display */
automated_char_cfg.automated_mode = LCDCA_AUTOMATED_MODE_SEQUENTIAL;
automated_char_cfg.automated_timer = LCDCA_TIMER_FC2;
automated_char_cfg.lcd_tdg = LCDCA_TDG_14SEG4COM;
automated_char_cfg.stseg = FIRST_14SEG_4C;
automated_char_cfg.dign = WIDTH_14SEG_4C;
automated_char_cfg.steps = 0;
automated_char_cfg.dir_reverse = LCDCA_AUTOMATED_DIR_REVERSE;
lcdca_automated_char_set_config(&automated_char_cfg);
lcdca_automated_char_start(sequential_str, strlen((char const *)sequential_str));
printf("Press PB0 to stop automated sequential mode and continue.\n\r");
wait_for_switches();
lcdca_automated_char_stop();
/* Automated scrolling of character string display */
automated_char_cfg.automated_mode = LCDCA_AUTOMATED_MODE_SCROLLING;
automated_char_cfg.automated_timer = LCDCA_TIMER_FC2;
automated_char_cfg.lcd_tdg = LCDCA_TDG_14SEG4COM;
automated_char_cfg.stseg = FIRST_14SEG_4C;
automated_char_cfg.dign = WIDTH_14SEG_4C;
/* STEPS = string length - DIGN + 1 */
automated_char_cfg.steps = sizeof(scrolling_str) - WIDTH_14SEG_4C + 1;
automated_char_cfg.dir_reverse = LCDCA_AUTOMATED_DIR_REVERSE;
lcdca_automated_char_set_config(&automated_char_cfg);
lcdca_automated_char_start(scrolling_str, strlen((char const *)scrolling_str));
printf("Press PB0 to stop automated scrolling mode and continue.\n\r");
wait_for_switches();
lcdca_automated_char_stop();
/* Set callback for LCDCA interrupt */
lcdca_set_callback(lcdca_callback, LCDCA_IRQn, 1);
/* Enable LCDCA wakeup */
lcdca_enable_wakeup();
printf("Enter power save mode.\n\r");
printf("It'll display power save string sequence and"
"blink wireless icon when every wake up.\n\r");
while (1) {
/* Display lowpower string repeatly */
c42364a_write_alpha_packet(lowpower_str[str_id]);
str_id = (str_id + 1) % MAX_NUM_LOWPOWER_STR;
/* Toggle wireless icon */
lcdca_toggle_pixel(ICON_WLESS);
/* Enter in sleep mode */
sleepmgr_enter_sleep();
}
}
int main(void)
{
sysclk_init();
board_init();
/* Enable one wait state for flash access */
flashcalw_set_wait_state(1);
/*
* Configure systick for 200ms (CPU frequency / 5) at startup time.
*
* Note: CPU frequency will be changed with below clock switching.
*/
if (SysTick_Config(sysclk_get_cpu_hz() / 5)) {
while (1) { /* Capture error */
}
}
while (1) {
struct dfll_config dcfg;
struct pll_config pcfg;
/* avoid Cppcheck Warning */
UNUSED(pcfg);
/*
* Initial state: Running from RC80M with all
* prescalers set to 2 (Divide frequency by 4).
*/
wait_for_switches();
/*
* Divide CPU frequency by 8. This will make the LED
* blink half as fast.
*/
sysclk_set_prescalers(3, 3, 3, 3, 3);
wait_for_switches();
/*
* Switch to the DFLL running at ~48 MHz in Open Loop
* mode, with the CPU running at ~48 MHz.
*/
dfll_config_init_open_loop_mode(&dcfg);
dfll_config_tune_for_target_hz(&dcfg, 48000000);
dfll_enable_open_loop(&dcfg, 0);
sysclk_set_prescalers(1, 1, 1, 1, 1);
sysclk_set_source(SYSCLK_SRC_DFLL);
osc_disable(OSC_ID_RC80M);
wait_for_switches();
/*
* Switch to the slow clock with all prescalers
* disabled.
*/
sysclk_set_source(SYSCLK_SRC_RCSYS);
sysclk_set_prescalers(0, 0, 0, 0, 0);
dfll_disable_open_loop(0);
wait_for_switches();
/*
* Switch to the RCFAST clock with all prescalers
* disabled.
*/
osc_enable(OSC_ID_RCFAST);
sysclk_set_prescalers(0, 0, 0, 0, 0);
osc_wait_ready(OSC_ID_RCFAST);
sysclk_set_source(SYSCLK_SRC_RCFAST);
wait_for_switches();
/*
* Switch to the RC1M clock with all prescalers
* disabled.
*/
osc_enable(OSC_ID_RC1M);
sysclk_set_prescalers(0, 0, 0, 0, 0);
osc_wait_ready(OSC_ID_RC1M);
sysclk_set_source(SYSCLK_SRC_RC1M);
osc_disable(OSC_ID_RCFAST);
wait_for_switches();
/*
* Switch to external OSC0, if available.
*/
#ifdef BOARD_OSC0_HZ
osc_enable(OSC_ID_OSC0);
osc_wait_ready(OSC_ID_OSC0);
sysclk_set_source(SYSCLK_SRC_OSC0);
osc_disable(OSC_ID_RC1M);
wait_for_switches();
/*
* Switch to PLL0 running at 96 MHz. Use OSC0 as the
* source
*/
pll_config_init(&pcfg, PLL_SRC_OSC0, 1, 96000000 /
BOARD_OSC0_HZ);
pll_enable(&pcfg, 0);
sysclk_set_prescalers(2, 2, 2, 2, 2);
pll_wait_for_lock(0);
sysclk_set_source(SYSCLK_SRC_PLL0);
wait_for_switches();
#endif
/*
* Switch to the DFLL, using the 32 kHz oscillator as a
* reference if available, or failing that, the 115 kHz
* RCSYS oscillator.
*/
#ifdef BOARD_OSC32_HZ
osc_enable(OSC_ID_OSC32);
dfll_config_init_closed_loop_mode(&dcfg,
GENCLK_SRC_OSC32K, 1,
CONFIG_DFLL0_FREQ / BOARD_OSC32_HZ);
osc_wait_ready(OSC_ID_OSC32);
#else
dfll_config_init_closed_loop_mode(&dcfg,
GENCLK_SRC_RCSYS, 1,
CONFIG_DFLL0_FREQ / OSC_RCSYS_NOMINAL_HZ);
#endif
dfll_enable_closed_loop(&dcfg, 0);
sysclk_set_prescalers(1, 1, 1, 1, 1);
dfll_wait_for_fine_lock(0);
sysclk_set_source(SYSCLK_SRC_DFLL);
#ifdef BOARD_OSC0_HZ
osc_disable(OSC_ID_OSC0);
#endif
wait_for_switches();
/*
* Go back to the initial state and start over.
*/
osc_enable(OSC_ID_RC80M);
sysclk_set_prescalers(2, 2, 2, 2, 2);
osc_wait_ready(OSC_ID_RC80M);
sysclk_set_source(SYSCLK_SRC_RC80M);
dfll_disable_closed_loop(0);
#ifdef BOARD_OSC32_HZ
osc_disable(OSC_ID_OSC32);
#endif
}
}
