Esempio n. 1
0
void wcn36xx_rx_ready_work(struct work_struct *work)
{
	struct wcn36xx *wcn =
		container_of(work, struct wcn36xx, rx_ready_work);
	int int_src;

	wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_INT_SRC_RAW_REG, &int_src);

	/* RX_LOW_PRI */
	if (int_src & WCN36XX_DXE_INT_CH1_MASK) {
		wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_CLR,
					   WCN36XX_DXE_INT_CH1_MASK);
		wcn36xx_rx_handle_packets(wcn, &(wcn->dxe_rx_l_ch));
	}

	/* RX_HIGH_PRI */
	if (int_src & WCN36XX_DXE_INT_CH3_MASK) {
		/* Clean up all the INT within this channel */
		wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_CLR,
					   WCN36XX_DXE_INT_CH3_MASK);
		wcn36xx_rx_handle_packets(wcn, &(wcn->dxe_rx_h_ch));
	}

	if (!int_src)
		wcn36xx_warn("No DXE interrupt pending");

	enable_irq(wcn->rx_irq);
}
Esempio n. 2
0
File: dxe.c Progetto: Lyude/linux
void wcn36xx_dxe_rx_frame(struct wcn36xx *wcn)
{
	int int_src;

	wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_INT_SRC_RAW_REG, &int_src);

	/* RX_LOW_PRI */
	if (int_src & WCN36XX_DXE_INT_CH1_MASK)
		wcn36xx_rx_handle_packets(wcn, &wcn->dxe_rx_l_ch,
					  WCN36XX_DXE_CTRL_RX_L,
					  WCN36XX_DXE_INT_CH1_MASK,
					  WCN36XX_INT_MASK_CHAN_RX_L,
					  WCN36XX_DXE_CH_STATUS_REG_ADDR_RX_L);

	/* RX_HIGH_PRI */
	if (int_src & WCN36XX_DXE_INT_CH3_MASK)
		wcn36xx_rx_handle_packets(wcn, &wcn->dxe_rx_h_ch,
					  WCN36XX_DXE_CTRL_RX_H,
					  WCN36XX_DXE_INT_CH3_MASK,
					  WCN36XX_INT_MASK_CHAN_RX_H,
					  WCN36XX_DXE_CH_STATUS_REG_ADDR_RX_H);

	if (!int_src)
		wcn36xx_warn("No DXE interrupt pending\n");
}
Esempio n. 3
0
void wcn36xx_dxe_rx_frame(struct wcn36xx *wcn)
{
    int int_src;

    wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_INT_SRC_RAW_REG, &int_src);

    /* RX_LOW_PRI */
    if (int_src & WCN36XX_DXE_INT_CH1_MASK) {
        wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_CLR,
                                   WCN36XX_DXE_INT_CH1_MASK);
        wcn36xx_rx_handle_packets(wcn, &(wcn->dxe_rx_l_ch));
    }

    /* RX_HIGH_PRI */
    if (int_src & WCN36XX_DXE_INT_CH3_MASK) {
        /* Clean up all the INT within this channel */
        wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_CLR,
                                   WCN36XX_DXE_INT_CH3_MASK);
        wcn36xx_rx_handle_packets(wcn, &(wcn->dxe_rx_h_ch));
    }

    if (!int_src)
        wcn36xx_warn("No DXE interrupt pending\n");
}