static int wm831x_aldo_set_mode(struct regulator_dev *rdev,
unsigned int mode)
{
struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
struct wm831x *wm831x = ldo->wm831x;
int ctrl_reg = ldo->base + WM831X_LDO_CONTROL;
int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
int ret;
switch (mode) {
case REGULATOR_MODE_NORMAL:
ret = wm831x_set_bits(wm831x, on_reg,
WM831X_LDO7_ON_MODE, 0);
if (ret < 0)
return ret;
break;
case REGULATOR_MODE_IDLE:
ret = wm831x_set_bits(wm831x, ctrl_reg,
WM831X_LDO7_ON_MODE,
WM831X_LDO7_ON_MODE);
if (ret < 0)
return ret;
break;
default:
return -EINVAL;
}
return 0;
}
static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
int min_uV, int max_uV, unsigned *selector)
{
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
struct wm831x *wm831x = dcdc->wm831x;
int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
int vsel, ret;
vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
if (vsel < 0)
return vsel;
*selector = vsel;
/* If this value is already set then do a GPIO update if we can */
if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
return wm831x_buckv_set_dvs(rdev, 0);
if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
return wm831x_buckv_set_dvs(rdev, 1);
/* Always set the ON status to the minimum voltage */
ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
if (ret < 0)
return ret;
dcdc->on_vsel = vsel;
if (!dcdc->dvs_gpio)
return ret;
/* Kick the voltage transition now */
ret = wm831x_buckv_set_dvs(rdev, 0);
if (ret < 0)
return ret;
/* Set the high voltage as the DVS voltage. This is optimised
* for CPUfreq usage, most processors will keep the maximum
* voltage constant and lower the minimum with the frequency. */
vsel = wm831x_buckv_select_max_voltage(rdev, min_uV, max_uV);
if (vsel < 0) {
/* This should never happen - at worst the same vsel
* should be chosen */
WARN_ON(vsel < 0);
return 0;
}
/* Don't bother if it's the same VSEL we're already using */
if (vsel == dcdc->on_vsel)
return 0;
ret = wm831x_set_bits(wm831x, dvs_reg, WM831X_DC1_DVS_VSEL_MASK, vsel);
if (ret == 0)
dcdc->dvs_vsel = vsel;
else
dev_warn(wm831x->dev, "Failed to set DCDC DVS VSEL: %d\n",
ret);
return 0;
}
static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
unsigned int mode)
{
int ret = 0;
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
struct wm831x *wm831x = dcdc->wm831x;
u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
ret = wm831x_dcdc_set_mode_int(wm831x, reg, mode);
if (ret < 0)
goto end;
//set dcdc_x sleep slot
switch(reg){
case WM831X_DC1_SLEEP_CONTROL:
ret = wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_SLOT_MASK, WM831X_DCDC1_SLP_SLOT << WM831X_DC1_SLP_SLOT_SHIFT);
if (ret < 0)
goto end;
break;
case WM831X_DC2_SLEEP_CONTROL:
ret = wm831x_set_bits(wm831x, reg, WM831X_DC2_SLP_SLOT_MASK, WM831X_DCDC2_SLP_SLOT << WM831X_DC2_SLP_SLOT_SHIFT);
if (ret < 0)
goto end;
break;
case WM831X_DC3_SLEEP_CONTROL:
ret = wm831x_set_bits(wm831x, reg, WM831X_DC3_SLP_SLOT_MASK, WM831X_DCDC3_SLP_SLOT << WM831X_DC3_SLP_SLOT_SHIFT);
if (ret < 0)
goto end;
break;
}
end:
return ret;
}
static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
int min_uV, int max_uV, unsigned *selector)
{
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
struct wm831x *wm831x = dcdc->wm831x;
int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
int vsel, ret;
vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
if (vsel < 0)
return vsel;
*selector = vsel;
/* If this value is already set then do a GPIO update if we can */
if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
return wm831x_buckv_set_dvs(rdev, 0);
if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
return wm831x_buckv_set_dvs(rdev, 1);
/* Always set the ON status to the minimum voltage */
ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
if (ret < 0)
return ret;
dcdc->on_vsel = vsel;
if (!dcdc->dvs_gpio)
return ret;
/* Kick the voltage transition now */
ret = wm831x_buckv_set_dvs(rdev, 0);
if (ret < 0)
return ret;
/*
* If this VSEL is higher than the last one we've seen then
* remember it as the DVS VSEL. This is optimised for CPUfreq
* usage where we want to get to the highest voltage very
* quickly.
*/
if (vsel > dcdc->dvs_vsel) {
ret = wm831x_set_bits(wm831x, dvs_reg,
WM831X_DC1_DVS_VSEL_MASK,
dcdc->dvs_vsel);
if (ret == 0)
dcdc->dvs_vsel = vsel;
else
dev_warn(wm831x->dev,
"Failed to set DCDC DVS VSEL: %d\n", ret);
}
return 0;
}
static int wm831x_rtc_start_alarm(struct wm831x_rtc *wm831x_rtc)
{
wm831x_rtc->alarm_enabled = 1;
return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
WM831X_RTC_ALM_ENA, WM831X_RTC_ALM_ENA);
}
static int wm831x_gpio_set_debounce(struct wm831x *wm831x, unsigned offset,
unsigned debounce)
{
int reg = WM831X_GPIO1_CONTROL + offset;
int ret, fn;
ret = wm831x_reg_read(wm831x, reg);
if (ret < 0)
return ret;
switch (ret & WM831X_GPN_FN_MASK) {
case 0:
case 1:
break;
default:
/* Not in GPIO mode */
return -EBUSY;
}
if (debounce >= 32 && debounce <= 64)
fn = 0;
else if (debounce >= 4000 && debounce <= 8000)
fn = 1;
else
return -EINVAL;
return wm831x_set_bits(wm831x, reg, WM831X_GPN_FN_MASK, fn);
}
static int wm831x_wdt_set_timeout(struct watchdog_device *wdt_dev,
unsigned int timeout)
{
struct wm831x_wdt_drvdata *driver_data = watchdog_get_drvdata(wdt_dev);
struct wm831x *wm831x = driver_data->wm831x;
int ret, i;
for (i = 0; i < ARRAY_SIZE(wm831x_wdt_cfgs); i++)
if (wm831x_wdt_cfgs[i].time == timeout)
break;
if (i == ARRAY_SIZE(wm831x_wdt_cfgs))
return -EINVAL;
ret = wm831x_reg_unlock(wm831x);
if (ret == 0) {
ret = wm831x_set_bits(wm831x, WM831X_WATCHDOG,
WM831X_WDOG_TO_MASK,
wm831x_wdt_cfgs[i].val);
wm831x_reg_lock(wm831x);
} else {
dev_err(wm831x->dev, "Failed to unlock security key: %d\n",
ret);
}
wdt_dev->timeout = timeout;
return ret;
}
static int wm831x_aldo_set_voltage_int(struct regulator_dev *rdev, int reg,
int min_uV, int max_uV,
unsigned *selector)
{
struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
struct wm831x *wm831x = ldo->wm831x;
int vsel, ret;
if (min_uV < 1000000)
vsel = 0;
else if (min_uV < 1700000)
vsel = ((min_uV - 1000000) / 50000);
else
vsel = ((min_uV - 1700000) / 100000)
+ WM831X_ALDO_SELECTOR_LOW + 1;
ret = wm831x_aldo_list_voltage(rdev, vsel);
if (ret < 0)
return ret;
if (ret < min_uV || ret > max_uV)
return -EINVAL;
*selector = vsel;
return wm831x_set_bits(wm831x, reg, WM831X_LDO7_ON_VSEL_MASK, vsel);
}
static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
unsigned int mode)
{
int val;
switch (mode) {
case REGULATOR_MODE_FAST:
val = WM831X_DCDC_MODE_FAST;
break;
case REGULATOR_MODE_NORMAL:
val = WM831X_DCDC_MODE_NORMAL;
break;
case REGULATOR_MODE_STANDBY:
val = WM831X_DCDC_MODE_STANDBY;
break;
case REGULATOR_MODE_IDLE:
val = WM831X_DCDC_MODE_IDLE;
break;
default:
return -EINVAL;
}
return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
val << WM831X_DC1_ON_MODE_SHIFT);
}
void wm831x_device_shutdown(struct wm831x *wm831x)
{
if (wm831x->soft_shutdown) {
dev_info(wm831x->dev, "Initiating shutdown...\n");
wm831x_set_bits(wm831x, WM831X_POWER_STATE, WM831X_CHIP_ON, 0);
}
}
static int wm831x_dcdc_disable(struct regulator_dev *rdev)
{
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
struct wm831x *wm831x = dcdc->wm831x;
int mask = 1 << rdev_get_id(rdev);
return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0);
}
static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
{
struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
struct wm831x *wm831x = wm831x_gpio->wm831x;
wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset,
value << offset);
}
static int wm831x_ldo_disable(struct regulator_dev *rdev)
{
struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
struct wm831x *wm831x = ldo->wm831x;
int mask = 1 << rdev_get_id(rdev);
return wm831x_set_bits(wm831x, WM831X_LDO_ENABLE, mask, 0);
}
static int wm831x_isink_disable(struct regulator_dev *rdev)
{
struct wm831x_isink *isink = rdev_get_drvdata(rdev);
struct wm831x *wm831x = isink->wm831x;
int ret;
ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_DRIVE, 0);
if (ret < 0)
return ret;
ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA, 0);
if (ret < 0)
return ret;
return ret;
}
static void rk30_pm_power_off(void)
{
printk(KERN_ERR "rk30_pm_power_off start...\n");
gpio_direction_output(POWER_ON_PIN, GPIO_LOW);
#if defined(CONFIG_MFD_WM831X)
wm831x_set_bits(Wm831x,WM831X_GPIO_LEVEL,0x0001,0x0000); //set sys_pwr 0
wm831x_device_shutdown(Wm831x);//wm8326 shutdown
#endif
while (1);
}
/*
* Set up DVS control. We just log errors since we can still run
* (with reduced performance) if we fail.
*/
static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
struct wm831x_buckv_pdata *pdata)
{
struct wm831x *wm831x = dcdc->wm831x;
int ret;
u16 ctrl;
if (!pdata || !pdata->dvs_gpio)
return;
switch (pdata->dvs_control_src) {
case 1:
ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
break;
case 2:
ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
break;
default:
dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
pdata->dvs_control_src, dcdc->name);
return;
}
ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
WM831X_DC1_DVS_SRC_MASK, ctrl);
if (ret < 0) {
dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
dcdc->name, ret);
return;
}
ret = gpio_request(pdata->dvs_gpio, "DCDC DVS");
if (ret < 0) {
dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
dcdc->name, ret);
return;
}
/* gpiolib won't let us read the GPIO status so pick the higher
* of the two existing voltages so we take it as platform data.
*/
dcdc->dvs_gpio_state = pdata->dvs_init_state;
ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state);
if (ret < 0) {
dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n",
dcdc->name, ret);
gpio_free(pdata->dvs_gpio);
return;
}
dcdc->dvs_gpio = pdata->dvs_gpio;
}
/* Unconditionally disable the alarm */
static int wm831x_rtc_freeze(struct device *dev)
{
struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
int ret;
ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
WM831X_RTC_ALM_ENA, 0);
if (ret != 0)
dev_err(dev, "Failed to stop RTC alarm: %d\n", ret);
return 0;
}
static int wm831x_isink_enable(struct regulator_dev *rdev)
{
struct wm831x_isink *isink = rdev_get_drvdata(rdev);
struct wm831x *wm831x = isink->wm831x;
int ret;
/* We have a two stage enable: first start the ISINK... */
ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA,
WM831X_CS1_ENA);
if (ret != 0)
return ret;
/* ...then enable drive */
ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_DRIVE,
WM831X_CS1_DRIVE);
if (ret != 0)
wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA, 0);
return ret;
}
static int wm831x_pre_init(struct wm831x *parm)
{
int ret;
Wm831x = parm;
// printk("%s\n", __func__);
gpio_request(PMU_POWER_SLEEP, "NULL");
gpio_direction_output(PMU_POWER_SLEEP, GPIO_HIGH);
ret = wm831x_reg_read(parm, WM831X_POWER_STATE) & 0xffff;
wm831x_reg_write(parm, WM831X_POWER_STATE, (ret & 0xfff8) | 0x04);
//BATT_FET_ENA = 1
wm831x_reg_write(parm, WM831X_SECURITY_KEY, 0x9716); // unlock security key
wm831x_set_bits(parm, WM831X_RESET_CONTROL, 0x1000, 0x1000);
ret = wm831x_reg_read(parm, WM831X_RESET_CONTROL) & 0xffff & UNLOCK_SECURITY_KEY; // enternal reset active in sleep
// printk("%s:WM831X_RESET_CONTROL=0x%x\n", __func__, ret);
wm831x_reg_write(parm, WM831X_RESET_CONTROL, ret);
wm831x_set_bits(parm,WM831X_DC1_ON_CONFIG ,0x0300,0x0000); //set dcdc mode is FCCM
wm831x_set_bits(parm,WM831X_DC2_ON_CONFIG ,0x0300,0x0000);
wm831x_set_bits(parm,WM831X_DC3_ON_CONFIG ,0x0300,0x0000);
// wm831x_set_bits(parm,0x4066,0x0300,0x0000);
// wm831x_set_bits(parm,WM831X_LDO10_CONTROL ,0x0040,0x0040);// set ldo10 in switch mode
wm831x_set_bits(parm,WM831X_STATUS_LED_1 ,0xc300,0xc100);// set led1 on(in manual mode)
wm831x_set_bits(parm,WM831X_STATUS_LED_2 ,0xc300,0xc000);//set led2 off(in manual mode)
wm831x_reg_write(parm, WM831X_SECURITY_KEY, LOCK_SECURITY_KEY); // lock security key
return 0;
}
static int wm831x_alive_ldo_set_suspend_voltage(struct regulator_dev *rdev,
int uV)
{
struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
struct wm831x *wm831x = ldo->wm831x;
int sel, reg = ldo->base + WM831X_ALIVE_LDO_SLEEP_CONTROL;
sel = regulator_map_voltage_linear(rdev, uV, uV);
if (sel < 0)
return sel;
return wm831x_set_bits(wm831x, reg, WM831X_LDO11_ON_VSEL_MASK, sel);
}
static int wm831x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
{
struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
struct wm831x *wm831x = wm831x_gpio->wm831x;
int val = WM831X_GPN_DIR;
if (wm831x->has_gpio_ena)
val |= WM831X_GPN_TRI;
return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
WM831X_GPN_DIR | WM831X_GPN_TRI |
WM831X_GPN_FN_MASK, val);
}
static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
int uV)
{
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
struct wm831x *wm831x = dcdc->wm831x;
u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
int vsel;
vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV);
if (vsel < 0)
return vsel;
return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
}
static int wm831x_low_power_detection(struct wm831x *wm831x)
{
#ifdef CONFIG_BATTERY_RK30_VOL3V8
wm831x_reg_write(wm831x,WM831X_SYSTEM_INTERRUPTS_MASK,0xbe5c);
wm831x_set_bits(wm831x,WM831X_INTERRUPT_STATUS_1_MASK,0x8000,0x0000);
wm831x_set_bits(wm831x,WM831X_SYSVDD_CONTROL ,0xc077,0x0035); //set pvdd low voltage is 3.1v hi voltage is 3.3v
#else
wm831x_reg_write(wm831x,WM831X_AUXADC_CONTROL,0x803f); //open adc
wm831x_reg_write(wm831x,WM831X_AUXADC_CONTROL,0xd03f);
wm831x_reg_write(wm831x,WM831X_AUXADC_SOURCE,0x0001);
wm831x_reg_write(wm831x,WM831X_COMPARATOR_CONTROL,0x0001);
wm831x_reg_write(wm831x,WM831X_COMPARATOR_1,0x2844); //set the low power is 3.1v
wm831x_reg_write(wm831x,WM831X_INTERRUPT_STATUS_1_MASK,0x99ee);
wm831x_set_bits(wm831x,WM831X_SYSTEM_INTERRUPTS_MASK,0x0100,0x0000);
if (wm831x_reg_read(wm831x,WM831X_AUXADC_DATA)< 0x1844){
printk("The vbat is too low.\n");
wm831x_device_shutdown(wm831x);
}
#endif
return 0;
}
static int wm831x_set_config(struct gpio_chip *chip, unsigned int offset,
unsigned long config)
{
struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
struct wm831x *wm831x = wm831x_gpio->wm831x;
int reg = WM831X_GPIO1_CONTROL + offset;
switch (pinconf_to_config_param(config)) {
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
return wm831x_set_bits(wm831x, reg,
WM831X_GPN_OD_MASK, WM831X_GPN_OD);
case PIN_CONFIG_DRIVE_PUSH_PULL:
return wm831x_set_bits(wm831x, reg,
WM831X_GPN_OD_MASK, 0);
case PIN_CONFIG_INPUT_DEBOUNCE:
return wm831x_gpio_set_debounce(wm831x, offset,
pinconf_to_config_argument(config));
default:
break;
}
return -ENOTSUPP;
}
static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
int min_uA, int max_uA)
{
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
struct wm831x *wm831x = dcdc->wm831x;
u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
int i;
for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) {
if (max_uA <= wm831x_dcdc_ilim[i])
break;
}
if (i == ARRAY_SIZE(wm831x_dcdc_ilim))
return -EINVAL;
return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK, i);
}
/* Turn off the alarm if it should not be a wake source. */
static int wm831x_rtc_suspend(struct device *dev)
{
struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
int ret, enable;
if (wm831x_rtc->alarm_enabled && device_may_wakeup(dev))
enable = WM831X_RTC_ALM_ENA;
else
enable = 0;
ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
WM831X_RTC_ALM_ENA, enable);
if (ret != 0)
dev_err(dev, "Failed to update RTC alarm: %d\n", ret);
return 0;
}
static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg,
int min_uV, int max_uV)
{
struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
struct wm831x *wm831x = dcdc->wm831x;
u16 vsel;
if (min_uV <= 34000000)
vsel = (min_uV - 850000) / 25000;
else
return -EINVAL;
if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV)
return -EINVAL;
return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel);
}
static int wm831x_low_power_detection(struct wm831x *wm831x)
{
wm831x_reg_write(wm831x,WM831X_AUXADC_CONTROL,0x803f); //open adc
wm831x_reg_write(wm831x,WM831X_AUXADC_CONTROL,0xd03f);
wm831x_reg_write(wm831x,WM831X_AUXADC_SOURCE,0x0001);
wm831x_reg_write(wm831x,WM831X_COMPARATOR_CONTROL,0x0001);
wm831x_reg_write(wm831x,WM831X_COMPARATOR_1,0x2910); //set the low power is 3.4v
wm831x_reg_write(wm831x,WM831X_INTERRUPT_STATUS_1_MASK,0x99ee);
wm831x_set_bits(wm831x,WM831X_SYSTEM_INTERRUPTS_MASK,0x0100,0x0000);
if (wm831x_reg_read(wm831x,WM831X_AUXADC_DATA)< 0x1900){
printk("The vbat is too low.\n");
wm831x_device_shutdown(wm831x);
}
return 0;
}
static int wm831x_alive_ldo_set_voltage_int(struct regulator_dev *rdev,
int reg,
int min_uV, int max_uV)
{
struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
struct wm831x *wm831x = ldo->wm831x;
int vsel, ret;
vsel = (min_uV - 800000) / 50000;
ret = wm831x_alive_ldo_list_voltage(rdev, vsel);
if (ret < 0)
return ret;
if (ret < min_uV || ret > max_uV)
return -EINVAL;
return wm831x_set_bits(wm831x, reg, WM831X_LDO11_ON_VSEL_MASK, vsel);
}
static int wm831x_isink_set_current(struct regulator_dev *rdev,
int min_uA, int max_uA)
{
struct wm831x_isink *isink = rdev_get_drvdata(rdev);
struct wm831x *wm831x = isink->wm831x;
int ret, i;
for (i = 0; i < ARRAY_SIZE(wm831x_isinkv_values); i++) {
int val = wm831x_isinkv_values[i];
if (min_uA <= val && val <= max_uA) {
ret = wm831x_set_bits(wm831x, isink->reg,
WM831X_CS1_ISEL_MASK, i);
return ret;
}
}
return -EINVAL;
}