void applyFPSPatch() {
enableGFWLCompatibility();
// Get imageBase
HANDLE exeHandle = NULL;
originalBase = 0x0400000;
exeHandle = GetModuleHandle(NULL);
if(exeHandle != NULL)
imageBase = (DWORD)exeHandle;
// Patches
//--------------------------------------------------------------
DWORD address;
DWORD data;
// Override D3D Presentation Interval
address = convertAddress(0x010275AE);
data = 5; //Set to immediate
writeToAddress(&data, address, sizeof(data));
// Detour Render loop entry
address = convertAddress(0x00BD6000);
DetourApply((BYTE*)address, (BYTE*)renderLoopEntry, 6, 0);
SDLOG(0, "FPS rate unlocked\n");
}
//----------------------------------------------------------------------------------------
// Game Patches
//----------------------------------------------------------------------------------------
void applyFPSPatch() {
enableGFWLCompatibility();
// Get imageBase
HANDLE exeHandle = NULL;
originalBase = 0x0400000;
exeHandle = GetModuleHandle(NULL);
if(exeHandle != NULL)
imageBase = (DWORD)exeHandle;
// Init counter for frame-rate calculations
lastRenderTime = 0.0f;
QueryPerformanceFrequency(&timerFreq);
QueryPerformanceCounter(&counterAtStart);
// Binary patches
//--------------------------------------------------------------
DWORD address;
DWORD data;
// Override D3D Presentation Interval
address = convertAddress(ADDR_PRESINT);
data = 5; //Set to immediate
writeToAddress(&data, address, sizeof(data));
// Detour call to getDrawThreadMsgCommand
address = convertAddress(ADDR_GETCMD);
DetourApply((BYTE*)address, (BYTE*)getDrawThreadMsgCommand, 5, CALLOP);
SDLOG(0, "FPS rate unlocked\n");
}
int writeToCache(int tagArray[], int LRUArray[], int dataSet, int dataTag, int lineSize){
int line;
int i;
for (i = 0; i<lineSize; i++){
if(LRUArray[i+lineSize*dataSet] == (lineSize - 1)){
line = i;
}
}
//Iterate through the set(index) to find the [line][set] with LRU
writeToAddress(tagArray, dataSet, line, dataTag, lineSize);
return line;
}
void updateAnimationStepTime(float stepTime, float minFPS, float maxFPS) {
float FPS = 1.0f/(stepTime/1000);
if (FPS < minFPS)
stepTime = minFPS;
else if (stepTime > maxFPS)
FPS = maxFPS;
float cappedStep = 1/(float)FPS;
DWORD data = *(DWORD*)&cappedStep;
writeToAddress(&data, convertAddress(0x012497F0), sizeof(data));
}
// Memory
//------------------------------------
void updateAnimationStepTime(float stepTime, float minFPS, float maxFPS) {
float FPS = 1.0f/(stepTime/1000);
if (FPS < minFPS)
FPS = minFPS;
else if (FPS > maxFPS)
FPS = maxFPS;
float cappedStep = 1/(float)FPS;
if(RSManager::get().isPaused()) cappedStep = 0.000000000000000001f;
DWORD data = *(DWORD*)&cappedStep;
writeToAddress(&data, convertAddress(ADDR_TS), sizeof(data));
}
//----------------------------------------------------------------------------------------
// Game Patches
//----------------------------------------------------------------------------------------
void applyFPSPatch() {
SDLOG(0, "Starting FPS unlock...\n");
#ifndef WITHOUT_GFWL_LIB
SDLOG(0, "Applying GFWL compatibility\n");
enableGFWLCompatibility();
#endif
// Get image info
MODULEINFO moduleInfo;
PIMAGE_DOS_HEADER dosHeader;
PIMAGE_NT_HEADERS ntHeader;
IMAGE_FILE_HEADER header;
if(GetModuleInformation(GetCurrentProcess(), GetModuleHandle(NULL), &moduleInfo, sizeof(moduleInfo)))
{
ImageBase = (DWORD)moduleInfo.lpBaseOfDll;
SDLOG(0, "ImageBase at 0x%08X\n", ImageBase);
dosHeader = (PIMAGE_DOS_HEADER)ImageBase;
ntHeader = (PIMAGE_NT_HEADERS)((DWORD)(dosHeader) + (dosHeader->e_lfanew));
header = ntHeader->FileHeader;
DWORD TimeStamp = header.TimeDateStamp;
SDLOG(0, "Executable timestamp: 0x%08X, config: 0x%08X\n", TimeStamp, EXE_TIMESTAMP);
// Perform pattern matching if timestamp differs
if (TimeStamp != EXE_TIMESTAMP) {
SDLOG(0, "Trying pattern matching...\n");
DWORD address;
address = GetMemoryAddressFromPattern(NULL, TS_PATTERN, TS_OFFSET);
if(address != NULL) {
SDLOG(0, "ADDR_TS found at 0x%08X\n", address);
ADDR_TS = address;
}
else {
SDLOG(0, "Could not match ADDR_TS pattern, FPS not unlocked\n");
return;
}
address = GetMemoryAddressFromPattern(NULL, PRESINT_PATTERN, PRESINT_OFFSET);
if(address != NULL) {
SDLOG(0, "ADDR_PRESINT found at 0x%08X\n", address);
ADDR_PRESINT = address;
}
else {
SDLOG(0, "Could not match ADDR_PRESINT pattern, FPS not unlocked\n");
return;
}
address = GetMemoryAddressFromPattern(NULL, GETCMD_PATTERN, GETCMD_OFFSET);
if(address != NULL) {
SDLOG(0, "ADDR_GETCMD found at 0x%08X\n", address);
ADDR_GETCMD = address;
}
else {
SDLOG(0, "Could not match ADDR_GETCMD pattern, FPS not unlocked\n");
return;
}
SDLOG(0, "Pattern matching successful\n");
}
else
SDLOG(0, "Using configured addresses\n");
}
else
{
SDLOG(0, "GetModuleInformation failed, FPS not unlocked\n");
return;
}
// Init counter for frame-rate calculations
lastRenderTime = 0.0f;
QueryPerformanceFrequency(&timerFreq);
QueryPerformanceCounter(&counterAtStart);
// Binary patches
//--------------------------------------------------------------
DWORD address;
DWORD data;
// Override D3D Presentation Interval
address = convertAddress(ADDR_PRESINT);
data = 5; //Set to immediate
writeToAddress(&data, address, sizeof(data));
// Detour call to getDrawThreadMsgCommand
address = convertAddress(ADDR_GETCMD);
DetourApply((BYTE*)address, (BYTE*)getDrawThreadMsgCommand, 5, CALLOP);
SDLOG(0, "FPS unlocked\n");
}
void simulator(int C, int K, int L){
int setSize = calculateSetSize(C, K, L);
int lineSize = calculateLineSize(C, K, L);
//First set of arrays for data
int LRUArray[lineSize*setSize], tagArray[lineSize*setSize], validBitArray[lineSize*setSize];
//First set of arrays for data
int dataLRUArray[lineSize*setSize], dataTagArray[lineSize*setSize], dataValidBitArray[lineSize*setSize];
//Second set of arrays for instruction
int instructionLRUArray[lineSize*setSize], instructionTagArray[lineSize*setSize], instructionValidBitArray[lineSize*setSize];
//Initializes all array entries to 0
int i,j;
//Initializing every LRU of the cache to a value between 0 - (lineSize-1)
for(i = 0; i<lineSize; i++ ){
for(j = 0; j<setSize; j++){
LRUArray[i+j*lineSize] = i;
validBitArray[i+j*lineSize] = 0;
tagArray[i+j*lineSize] = 0;
dataLRUArray[i+j*lineSize] = i;
dataValidBitArray[i+j*lineSize] = 0;
dataTagArray[i+j*lineSize] = 0;
instructionLRUArray[i+j*lineSize] = i;
instructionValidBitArray[i+j*lineSize] = 0;
instructionTagArray[i+j*lineSize] = 0;
}
}
int instruction, address, tag, set, setLine;
double missNumber, totalMemoryReferences, dataMiss, instructionMiss, dataReferences, instructionReferences; //miss will take care of maintaining track of how many misses the simulator has, toatlIteratiosn just counts how many total addresses the simulator has.
missNumber = 0;
dataMiss = 0;
instructionMiss = 0;
dataReferences = 0;
instructionReferences = 0;
totalMemoryReferences = 0;
instruction = 1;
address = 0;
FILE *ifp; //Pointer to a file is declared
ifp = fopen("trace.txt", "r"); // ifp points to file
// trace.txt, opened for
// reading
while (!feof(ifp)) { // exit if end-of-file reached
fscanf(ifp, "%d %x", &instruction, &address); // read next line
switch (instruction){ // cases 0 -3 run the same thing
case 0:
case 1:
tag = decodeTag(address, C, K, L, setSize);
set = decodeSet(address, C, K, L, setSize);
//Printing information
//printf("Address: %x \n Tag: %d \n Set: %d \n\n", address, tag, set);
if((setLine = tagHit(dataTagArray, set, tag, lineSize)) > -1){
if(dataValid(dataValidBitArray, set, setLine, lineSize)>0){
updateLRU(dataLRUArray, set, setLine, lineSize);
}else{
writeToAddress(dataTagArray, set, tag, setLine, lineSize);
validateData(dataValidBitArray, set, setLine, lineSize);
updateLRU(dataLRUArray, set, setLine, lineSize);
dataMiss++;
missNumber++;
}
}else{
setLine = writeToCache(dataTagArray, dataLRUArray, set, tag, lineSize);
validateData(dataValidBitArray, set, setLine, lineSize);
updateLRU(dataLRUArray, set, setLine, lineSize);
dataMiss++;
missNumber++;
}
dataReferences++;
totalMemoryReferences++;
break;
case 2:
tag = decodeTag(address, C, K, L, setSize);
set = decodeSet(address, C, K, L, setSize);
//Printing information
//printf("Address: %x \n Tag: %d \n Set: %d \n\n", address, tag, set);
if((setLine = tagHit(instructionTagArray, set, tag, lineSize)) > -1){
if(dataValid(instructionValidBitArray, set, setLine, lineSize)>0){
updateLRU(instructionLRUArray, set, setLine, lineSize);
}else{
writeToAddress(instructionTagArray, set, tag, setLine, lineSize);
validateData(instructionValidBitArray, set, setLine, lineSize);
updateLRU(instructionLRUArray, set, setLine, lineSize);
instructionMiss++;
missNumber++;
}
}else{
setLine = writeToCache(instructionTagArray, LRUArray, set, tag, lineSize);
validateData(instructionValidBitArray, set, setLine, lineSize);
updateLRU(instructionLRUArray, set, setLine, lineSize);
instructionMiss++;
missNumber++;
}
instructionReferences++;
totalMemoryReferences++;
break;
//End iteration
//address++;
case 3:break;
case 4:
clearCache(dataValidBitArray, lineSize, setSize);
clearCache(instructionValidBitArray, lineSize, setSize);
break;
}
}
fclose(ifp); // Close file
double missRate = missNumber/totalMemoryReferences*100;
//printCache(tagArray, validBitArray, LRUArray, setSize, lineSize);
printf("%.0f misses, ", missNumber);
printf("%.0f total memory references, ", totalMemoryReferences);
printf("%2.4f miss rate, \n\n", missRate);
}
void main ()
{
int rc;
sBSP430m25p m25p_data;
hBSP430m25p m25p;
unsigned long addr;
unsigned long t0;
unsigned long t1;
vBSP430platformInitialize_ni();
(void)iBSP430consoleInitialize();
cprintf("\nBuild " __DATE__ " " __TIME__ "\n");
cprintf("SPI is %s: %s\n",
xBSP430serialName(BSP430_PLATFORM_M25P_SPI_PERIPH_HANDLE),
xBSP430platformPeripheralHelp(BSP430_PLATFORM_M25P_SPI_PERIPH_HANDLE, 0));
#ifdef BSP430_PLATFORM_M25P_PWR_PORT_PERIPH_HANDLE
cprintf("PWR at %s.%u\n",
xBSP430portName(BSP430_PLATFORM_M25P_PWR_PORT_PERIPH_HANDLE),
iBSP430portBitPosition(BSP430_PLATFORM_M25P_PWR_PORT_BIT));
#else /* BSP430_PLATFORM_M25P_PWR_PORT_PERIPH_HANDLE */
cprintf("PWR is hard-wired\n");
#endif /* BSP430_PLATFORM_M25P_PWR_PORT_PERIPH_HANDLE */
#ifdef BSP430_PLATFORM_M25P_RSTn_PORT_PERIPH_HANDLE
cprintf("RSTn at %s.%u\n",
xBSP430portName(BSP430_PLATFORM_M25P_RSTn_PORT_PERIPH_HANDLE),
iBSP430portBitPosition(BSP430_PLATFORM_M25P_RSTn_PORT_BIT));
#else /* BSP430_PLATFORM_M25P_RSTn_PORT_PERIPH_HANDLE */
cprintf("RSTn is hard-wired\n");
#endif /* BSP430_PLATFORM_M25P_RSTn_PORT_PERIPH_HANDLE */
cprintf("CSn at %s.%u\n",
xBSP430portName(BSP430_PLATFORM_M25P_CSn_PORT_PERIPH_HANDLE),
iBSP430portBitPosition(BSP430_PLATFORM_M25P_CSn_PORT_BIT));
memset(&m25p_data, 0, sizeof(m25p_data));
m25p_data.spi = hBSP430serialLookup(BSP430_PLATFORM_M25P_SPI_PERIPH_HANDLE);
m25p_data.csn_port = xBSP430hplLookupPORT(BSP430_PLATFORM_M25P_CSn_PORT_PERIPH_HANDLE);
m25p_data.csn_bit = BSP430_PLATFORM_M25P_CSn_PORT_BIT;
#ifdef BSP430_PLATFORM_M25P_RSTn_PORT_PERIPH_HANDLE
m25p_data.rstn_port = xBSP430hplLookupPORT(BSP430_PLATFORM_M25P_RSTn_PORT_PERIPH_HANDLE);
m25p_data.rstn_bit = BSP430_PLATFORM_M25P_RSTn_PORT_BIT;
#endif /* BSP430_PLATFORM_M25P_RSTn_PORT_PERIPH_HANDLE */
m25p = hBSP430m25pInitialize(&m25p_data,
BSP430_SERIAL_ADJUST_CTL0_INITIALIZER(UCCKPL | UCMSB | UCMST),
UCSSEL_2, 1);
if (NULL == m25p) {
cprintf("M25P device initialization failed.\n");
return;
}
#ifdef BSP430_PLATFORM_M25P_PWR_PORT_PERIPH_HANDLE
{
volatile sBSP430hplPORT * pwr_hpl;
/* Turn on power, then wait 10 ms for chip to stabilize before releasing RSTn. */
pwr_hpl = xBSP430hplLookupPORT(BSP430_PLATFORM_M25P_PWR_PORT_PERIPH_HANDLE);
pwr_hpl->out &= ~BSP430_PLATFORM_M25P_PWR_PORT_BIT;
pwr_hpl->dir |= BSP430_PLATFORM_M25P_PWR_PORT_BIT;
pwr_hpl->out |= BSP430_PLATFORM_M25P_PWR_PORT_BIT;
BSP430_CORE_DELAY_CYCLES(10 * (BSP430_CLOCK_NOMINAL_MCLK_HZ / 1000));
}
#endif /* BSP430_PLATFORM_M25P_PWR_PORT_PERIPH_HANDLE */
BSP430_M25P_RESET_CLEAR(m25p);
cprintf("Status register %d\n", iBSP430m25pStatus_ni(m25p));
rc = iBSP430m25pStrobeCommand_ni(m25p, BSP430_M25P_CMD_WREN);
cprintf("WREN got %d, status register %d\n", rc, iBSP430m25pStatus_ni(m25p));
rc = iBSP430m25pStrobeCommand_ni(m25p, BSP430_M25P_CMD_WRDI);
cprintf("WRDI got %d, status register %d\n", rc, iBSP430m25pStatus_ni(m25p));
rc = iBSP430m25pInitiateCommand_ni(m25p, BSP430_M25P_CMD_RDID);
if (0 == rc) {
rc = iBSP430m25pCompleteTxRx_ni(m25p, NULL, 0, 20, buffer);
}
BSP430_CORE_ENABLE_INTERRUPT();
cprintf("READ_IDENTIFICATION got %d\n", rc);
if (0 <= rc) {
dumpMemory(buffer, rc, 0);
}
cprintf("Config identified %u sectors of %lu bytes each: %lu bytes total\n",
BSP430_PLATFORM_M25P_SECTOR_COUNT,
(unsigned long)BSP430_PLATFORM_M25P_SECTOR_SIZE,
BSP430_PLATFORM_M25P_SECTOR_COUNT * (unsigned long)BSP430_PLATFORM_M25P_SECTOR_SIZE);
#if (BSP430_PLATFORM_M25P_SUBSECTOR_SIZE - 0)
cprintf("Config supports access as %u sub-sectors of %u bytes each\n",
(unsigned int)(BSP430_PLATFORM_M25P_SECTOR_COUNT * (BSP430_PLATFORM_M25P_SECTOR_SIZE / BSP430_PLATFORM_M25P_SUBSECTOR_SIZE)),
(unsigned int)BSP430_PLATFORM_M25P_SUBSECTOR_SIZE);
#else /* BSP430_PLATFORM_M25P_SUBSECTOR_SIZE */
cprintf("Config indicates device is not sub-sector addressable\n");
#endif /* BSP430_PLATFORM_M25P_SUBSECTOR_SIZE */
cprintf("RDID identified %lu bytes total capacity\n", 0x1UL << buffer[2]);
addr = 0;
rc = readFromAddress(m25p, addr, sizeof(flashContents));
if (sizeof(flashContents) != rc) {
cprintf("ERROR %d reading initial block\n", rc);
} else {
dumpMemory(buffer, rc, addr);
if (0 == memcmp(flashContents, buffer, rc)) {
cprintf("Found expected contents.\n");
}
}
#if (BSP430_PLATFORM_M25P_SUPPORTS_PE - 0)
rc = writeToAddress(m25p, BSP430_M25P_CMD_PE, addr, NULL, 0);
cprintf("PAGE_ERASE got %d\n", rc);
#else /* BSP430_PLATFORM_M25P_SUPPORTS_PE */
rc = writeToAddress(m25p, BSP430_M25P_CMD_SE, addr, NULL, 0);
cprintf("SECTOR_ERASE got %d\n", rc);
#endif /* BSP430_PLATFORM_M25P_SUPPORTS_PE */
rc = readFromAddress(m25p, addr, sizeof(buffer));
if (0 < rc) {
dumpMemory(buffer, rc, addr);
}
rc = writeToAddress(m25p, BSP430_M25P_CMD_PP, addr, flashContents, sizeof(flashContents));
cprintf("PAGE_PROGRAM got %d\n", rc);
rc = readFromAddress(m25p, addr, sizeof(buffer));
if (0 < rc) {
dumpMemory(buffer, rc, addr);
}
/* PAGE PROGRAM is the one that only clears 1s to 0s so needs a
* prior page or sector erase */
rc = writeToAddress(m25p, BSP430_M25P_CMD_PP, addr, flashContents + 4, 4);
cprintf("PAGE_PROGRAM to %lx returned %d\n", addr, rc);
rc = readFromAddress(m25p, 0, sizeof(flashContents));
dumpMemory(buffer, rc, 0);
/*
Write 4 took 8
PAGE_PROGRAM to 0 returned 4
00000000 88 11 03 30 cc 33 c3 3c 01 23 45 67 89 ab cd ef ...0.3.<.#Eg....
*/
/* PAGE_WRITE is the one that does not need a prior erase cycle */
addr = 8;
#if (BSP430_PLATFORM_M25P_SUPPORTS_PW - 0)
rc = writeToAddress(m25p, BSP430_M25P_CMD_PW, addr, flashContents + 4, 4);
cprintf("PAGE_WRITE to %lx returned %d\n", addr, rc);
#else
rc = writeToAddress(m25p, BSP430_M25P_CMD_PP, addr, flashContents + 4, 4);
cprintf("overwrite PAGE_PROGRAM to unerased %lx returned %d\n", addr, rc);
#endif
rc = readFromAddress(m25p, 0, sizeof(flashContents));
dumpMemory(buffer, rc, 0);
/*
Write 4 took 204
PAGE_WRITE to 8 returned 4
00000000 88 11 03 30 cc 33 c3 3c cc 33 c3 3c 89 ab cd ef ...0.3.<.3.<....
*/
cprintf("Initiating bulk erase...");
BSP430_CORE_DISABLE_INTERRUPT();
do {
t0 = t1 = 0;
rc = iBSP430m25pStrobeCommand_ni(m25p, BSP430_M25P_CMD_WREN);
if (0 == rc) {
rc = iBSP430m25pStrobeCommand_ni(m25p, BSP430_M25P_CMD_BE);
}
if (0 == rc) {
int sr;
t0 = ulBSP430uptime_ni();
do {
sr = iBSP430m25pStatus_ni(m25p);
} while ((0 <= sr) && (BSP430_M25P_SR_WIP & sr));
t1 = ulBSP430uptime();
}
} while (0);
BSP430_CORE_ENABLE_INTERRUPT();
cprintf("\nBULK_ERASE got %d\n", rc);
if (0 == rc) {
char tstr[BSP430_UPTIME_AS_TEXT_LENGTH];
cprintf("Bulk erase took %lu utt = %s\n", t1-t0, xBSP430uptimeAsText(t1 - t0, tstr));
}
rc = readFromAddress(m25p, 0, sizeof(flashContents));
dumpMemory(buffer, rc, 0);
rc = writeToAddress(m25p, BSP430_M25P_CMD_PP, 0, flashContents, sizeof(flashContents));
cprintf("Restore got %d\n", rc);
addr = 0;
while (addr < (256 * 1025L)) {
rc = readFromAddress(m25p, addr, sizeof(buffer));
if (0 > rc) {
break;
}
dumpMemory(buffer, rc, addr);
addr += rc;
break;
}
}
void simulator(int C, int K, int L){
int setSize = calculateSetSize(C, K, L);
int lineSize = calculateLineSize(C, K, L);
int LRUArray[lineSize*setSize], tagArray[lineSize*setSize], validBitArray[lineSize*setSize];
//Initializes all array entries to 0
int i,j;
//Initializing every LRU of the cache to a value between 0 - (lineSize-1)
for(i = 0; i<lineSize; i++ ){
for(j = 0; j<setSize; j++){
LRUArray[i+j*lineSize] = i;
validBitArray[i+j*lineSize] = 0;
tagArray[i+j*lineSize] = 0;
}
}
int iter, instruction, address, tag, set, setLine;
double missNumber, totalMemoryReferences; //miss will take care of maintaining track of how many misses the simulator has, toatlIteratiosn just counts how many total addresses the simulator has.
missNumber = 0;
totalMemoryReferences = 0;
instruction = 1;
iter = 0;
srand(4342);
while(iter < 100000){
address = rand();
//printf("%d\n", address);
switch (instruction){ // cases 0 -3 run the same thing
case 0:
case 1:
case 2:
tag = decodeTag(address, C, K, L, setSize);
set = decodeSet(address, C, K, L, setSize);
//Printing information
//printf("Address: %x \n Tag: %d \n Set: %d \n\n", address, tag, set);
if((setLine = tagHit(tagArray, set, tag, lineSize)) > -1){
if(dataValid(validBitArray, set, setLine, lineSize)>0){
updateLRU(LRUArray, set, setLine, lineSize);
}else{
writeToAddress(tagArray, set, tag, setLine, lineSize);
validateData(validBitArray, set, setLine, lineSize);
updateLRU(LRUArray, set, setLine, lineSize);
missNumber++;
}
}else{
setLine = writeToCache(tagArray, LRUArray, set, tag, lineSize);
validateData(validBitArray, set, setLine, lineSize);
updateLRU(LRUArray, set, setLine, lineSize);
missNumber++;
}
break;
case 3:break;
case 4:
clearCache(validBitArray, lineSize, setSize);
break;
}
iter++;
totalMemoryReferences++;
}
double missRate = missNumber/totalMemoryReferences*100;
//printCache(tagArray, validBitArray, LRUArray, setSize, lineSize);
printf("%.0f misses, ", missNumber);
printf("%.0f total memory references, ", totalMemoryReferences);
printf("%2.4f miss rate, \n\n", missRate);
}
