static void xilinx_drm_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { struct xilinx_drm_dp *dp = to_dp(encoder); int bw = 0; unsigned int ret; do { bw = xilinx_drm_dp_mode_configure(dp, adjusted_mode->clock, bw); if (bw < 0) return; xilinx_drm_dp_mode_set_stream(dp, adjusted_mode); xilinx_drm_dp_mode_set_transfer_unit(dp, adjusted_mode); xilinx_drm_writel(dp->iomem, XILINX_DP_TX_PHY_POWER_DOWN, 0); ret = xilinx_drm_dp_train(dp); xilinx_drm_writel(dp->iomem, XILINX_DP_TX_PHY_POWER_DOWN, XILINX_DP_TX_PHY_POWER_DOWN_ALL); if (!ret) return; } while (bw >= DP_LINK_BW_1_62); DRM_ERROR("failed to train the DP link\n"); }
static void xilinx_drm_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { struct xilinx_drm_dp *dp = to_dp(encoder); xilinx_drm_dp_mode_configure(dp, adjusted_mode->clock); xilinx_drm_dp_mode_set_stream(dp, adjusted_mode); xilinx_drm_dp_mode_set_transfer_unit(dp, adjusted_mode); }