int board_mmc_init(bd_t *bd) { int ret = 0; # if defined(CONFIG_ZYNQ_SDHCI0) ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0); # endif # if defined(CONFIG_ZYNQ_SDHCI1) ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1); # endif return ret; }
int board_mmc_init(bd_t *bd) { int ret = 0; u32 ver = zynqmp_get_silicon_version(); if (ver != ZYNQMP_CSU_VERSION_VELOCE) { #if defined(CONFIG_ZYNQ_SDHCI) # if defined(CONFIG_ZYNQ_SDHCI0) ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0); # endif # if defined(CONFIG_ZYNQ_SDHCI1) ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1); # endif #endif } return ret; }
int zynq_sdhci_of_init(const void *blob) { int offset = 0; u32 ret = 0; phys_addr_t reg; debug("ZYNQ SDHCI: Initialization\n"); do { offset = fdt_node_offset_by_compatible(blob, offset, "arasan,sdhci-8.9a"); if (offset != -1) { reg = fdtdec_get_addr(blob, offset, "reg"); if (reg != FDT_ADDR_T_NONE) { ret |= zynq_sdhci_init(reg); } else { debug("ZYNQ SDHCI: Can't get base address\n"); return -1; } } } while (offset != -1); return ret; }