bool SparcAsmParser::matchSparcAsmModifiers(const MCExpr *&EVal,
SMLoc &EndLoc)
{
AsmToken Tok = Parser.getTok();
if (!Tok.is(AsmToken::Identifier))
return false;
StringRef name = Tok.getString();
SparcMCExpr::VariantKind VK = SparcMCExpr::parseVariantKind(name);
if (VK == SparcMCExpr::VK_Sparc_None)
return false;
Parser.Lex(); // Eat the identifier.
if (Parser.getTok().getKind() != AsmToken::LParen)
return false;
Parser.Lex(); // Eat the LParen token.
const MCExpr *subExpr;
if (Parser.parseParenExpression(subExpr, EndLoc))
return false;
EVal = SparcMCExpr::Create(VK, subExpr, getContext());
return true;
}
bool SparcAsmParser::
ParseDirective(AsmToken DirectiveID)
{
StringRef IDVal = DirectiveID.getString();
if (IDVal == ".byte")
return parseDirectiveWord(1, DirectiveID.getLoc());
if (IDVal == ".half")
return parseDirectiveWord(2, DirectiveID.getLoc());
if (IDVal == ".word")
return parseDirectiveWord(4, DirectiveID.getLoc());
if (IDVal == ".nword")
return parseDirectiveWord(is64Bit() ? 8 : 4, DirectiveID.getLoc());
if (is64Bit() && IDVal == ".xword")
return parseDirectiveWord(8, DirectiveID.getLoc());
if (IDVal == ".register") {
// For now, ignore .register directive.
Parser.eatToEndOfStatement();
return false;
}
// Let the MC layer to handle other directives.
return true;
}
bool SparcAsmParser::
ParseDirective(AsmToken DirectiveID)
{
StringRef IDVal = DirectiveID.getString();
if (IDVal == ".byte")
return parseDirectiveWord(1, DirectiveID.getLoc());
if (IDVal == ".half")
return parseDirectiveWord(2, DirectiveID.getLoc());
if (IDVal == ".word")
return parseDirectiveWord(4, DirectiveID.getLoc());
if (IDVal == ".nword")
return parseDirectiveWord(is64Bit() ? 8 : 4, DirectiveID.getLoc());
if (is64Bit() && IDVal == ".xword")
return parseDirectiveWord(8, DirectiveID.getLoc());
if (IDVal == ".register") {
// For now, ignore .register directive.
Parser.eatToEndOfStatement();
return false;
}
if (IDVal == ".proc") {
// For compatibility, ignore this directive.
// (It's supposed to be an "optimization" in the Sun assembler)
Parser.eatToEndOfStatement();
return false;
}
// Let the MC layer to handle other directives.
return true;
}
bool PPCAsmParser::
MatchRegisterName(const AsmToken &Tok, unsigned &RegNo, int64_t &IntVal) {
if (Tok.is(AsmToken::Identifier)) {
StringRef Name = Tok.getString().lower();
if (Name == "lr") {
RegNo = isPPC64()? PPC::LR8 : PPC::LR;
IntVal = 8;
return false;
} else if (Name == "ctr") {
RegNo = isPPC64()? PPC::CTR8 : PPC::CTR;
IntVal = 9;
return false;
} else if (Name.startswith("r") &&
!Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) {
RegNo = isPPC64()? XRegs[IntVal] : RRegs[IntVal];
return false;
} else if (Name.startswith("f") &&
!Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) {
RegNo = FRegs[IntVal];
return false;
} else if (Name.startswith("v") &&
!Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) {
RegNo = VRegs[IntVal];
return false;
} else if (Name.startswith("cr") &&
!Name.substr(2).getAsInteger(10, IntVal) && IntVal < 8) {
RegNo = CRRegs[IntVal];
return false;
}
}
return true;
}
bool SparcAsmParser::matchSparcAsmModifiers(const MCExpr *&EVal,
SMLoc &EndLoc)
{
AsmToken Tok = Parser.getTok();
if (!Tok.is(AsmToken::Identifier))
return false;
StringRef name = Tok.getString();
SparcMCExpr::VariantKind VK = SparcMCExpr::parseVariantKind(name);
if (VK == SparcMCExpr::VK_Sparc_None)
return false;
Parser.Lex(); // Eat the identifier.
if (Parser.getTok().getKind() != AsmToken::LParen)
return false;
Parser.Lex(); // Eat the LParen token.
const MCExpr *subExpr;
if (Parser.parseParenExpression(subExpr, EndLoc))
return false;
bool isPIC = getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_;
switch(VK) {
default: break;
case SparcMCExpr::VK_Sparc_LO:
VK = (hasGOTReference(subExpr)
? SparcMCExpr::VK_Sparc_PC10
: (isPIC ? SparcMCExpr::VK_Sparc_GOT10 : VK));
break;
case SparcMCExpr::VK_Sparc_HI:
VK = (hasGOTReference(subExpr)
? SparcMCExpr::VK_Sparc_PC22
: (isPIC ? SparcMCExpr::VK_Sparc_GOT22 : VK));
break;
}
EVal = SparcMCExpr::Create(VK, subExpr, getContext());
return true;
}
static int AsLexInput(SourceMgr &SrcMgr, MCAsmInfo &MAI,
tool_output_file *Out) {
AsmLexer Lexer(MAI);
Lexer.setBuffer(SrcMgr.getMemoryBuffer(SrcMgr.getMainFileID())->getBuffer());
bool Error = false;
while (Lexer.Lex().isNot(AsmToken::Eof)) {
AsmToken Tok = Lexer.getTok();
switch (Tok.getKind()) {
default:
SrcMgr.PrintMessage(Lexer.getLoc(), SourceMgr::DK_Warning,
"unknown token");
Error = true;
break;
case AsmToken::Error:
Error = true; // error already printed.
break;
case AsmToken::Identifier:
Out->os() << "identifier: " << Lexer.getTok().getString();
break;
case AsmToken::Integer:
Out->os() << "int: " << Lexer.getTok().getString();
break;
case AsmToken::Real:
Out->os() << "real: " << Lexer.getTok().getString();
break;
case AsmToken::String:
Out->os() << "string: " << Lexer.getTok().getString();
break;
case AsmToken::Amp: Out->os() << "Amp"; break;
case AsmToken::AmpAmp: Out->os() << "AmpAmp"; break;
case AsmToken::At: Out->os() << "At"; break;
case AsmToken::Caret: Out->os() << "Caret"; break;
case AsmToken::Colon: Out->os() << "Colon"; break;
case AsmToken::Comma: Out->os() << "Comma"; break;
case AsmToken::Dollar: Out->os() << "Dollar"; break;
case AsmToken::Dot: Out->os() << "Dot"; break;
case AsmToken::EndOfStatement: Out->os() << "EndOfStatement"; break;
case AsmToken::Eof: Out->os() << "Eof"; break;
case AsmToken::Equal: Out->os() << "Equal"; break;
case AsmToken::EqualEqual: Out->os() << "EqualEqual"; break;
case AsmToken::Exclaim: Out->os() << "Exclaim"; break;
case AsmToken::ExclaimEqual: Out->os() << "ExclaimEqual"; break;
case AsmToken::Greater: Out->os() << "Greater"; break;
case AsmToken::GreaterEqual: Out->os() << "GreaterEqual"; break;
case AsmToken::GreaterGreater: Out->os() << "GreaterGreater"; break;
case AsmToken::Hash: Out->os() << "Hash"; break;
case AsmToken::LBrac: Out->os() << "LBrac"; break;
case AsmToken::LCurly: Out->os() << "LCurly"; break;
case AsmToken::LParen: Out->os() << "LParen"; break;
case AsmToken::Less: Out->os() << "Less"; break;
case AsmToken::LessEqual: Out->os() << "LessEqual"; break;
case AsmToken::LessGreater: Out->os() << "LessGreater"; break;
case AsmToken::LessLess: Out->os() << "LessLess"; break;
case AsmToken::Minus: Out->os() << "Minus"; break;
case AsmToken::Percent: Out->os() << "Percent"; break;
case AsmToken::Pipe: Out->os() << "Pipe"; break;
case AsmToken::PipePipe: Out->os() << "PipePipe"; break;
case AsmToken::Plus: Out->os() << "Plus"; break;
case AsmToken::RBrac: Out->os() << "RBrac"; break;
case AsmToken::RCurly: Out->os() << "RCurly"; break;
case AsmToken::RParen: Out->os() << "RParen"; break;
case AsmToken::Slash: Out->os() << "Slash"; break;
case AsmToken::Star: Out->os() << "Star"; break;
case AsmToken::Tilde: Out->os() << "Tilde"; break;
}
// Print the token string.
Out->os() << " (\"";
Out->os().write_escaped(Tok.getString());
Out->os() << "\")\n";
}
return Error;
}
int EDDisassembler::parseInst(SmallVectorImpl<MCParsedAsmOperand*> &operands,
SmallVectorImpl<AsmToken> &tokens,
const std::string &str) {
int ret = 0;
switch (Key.Arch) {
default:
return -1;
case Triple::x86:
case Triple::x86_64:
case Triple::arm:
case Triple::thumb:
break;
}
const char *cStr = str.c_str();
MemoryBuffer *buf = MemoryBuffer::getMemBuffer(cStr, cStr + strlen(cStr));
StringRef instName;
SMLoc instLoc;
SourceMgr sourceMgr;
sourceMgr.AddNewSourceBuffer(buf, SMLoc()); // ownership of buf handed over
MCContext context(*AsmInfo);
OwningPtr<MCStreamer> streamer(createNullStreamer(context));
OwningPtr<AsmParser> genericParser(Tgt->createAsmParser(sys::getHostTriple(),
sourceMgr, context,
*streamer, *AsmInfo));
AsmToken OpcodeToken = genericParser->Lex();
AsmToken NextToken = genericParser->Lex(); // consume next token, because specificParser expects us to
if (OpcodeToken.is(AsmToken::Identifier)) {
instName = OpcodeToken.getString();
instLoc = OpcodeToken.getLoc();
if (NextToken.isNot(AsmToken::Eof) &&
genericParser->ParseInstruction(instName, instLoc, operands))
ret = -1;
} else {
ret = -1;
}
ParserMutex.acquire();
if (!ret) {
GenericAsmLexer->setBuffer(buf);
while (SpecificAsmLexer->Lex(),
SpecificAsmLexer->isNot(AsmToken::Eof) &&
SpecificAsmLexer->isNot(AsmToken::EndOfStatement)) {
if (SpecificAsmLexer->is(AsmToken::Error)) {
ret = -1;
break;
}
tokens.push_back(SpecificAsmLexer->getTok());
}
}
ParserMutex.release();
return ret;
}
AsmToken X86AsmLexer::LexTokenATT() {
AsmToken lexedToken = lexDefinite();
switch (lexedToken.getKind()) {
default:
return lexedToken;
case AsmToken::Error:
SetError(Lexer->getErrLoc(), Lexer->getErr());
return lexedToken;
case AsmToken::Percent: {
const AsmToken &nextToken = lexTentative();
if (nextToken.getKind() != AsmToken::Identifier)
return lexedToken;
if (unsigned regID = MatchRegisterName(nextToken.getString())) {
lexDefinite();
// FIXME: This is completely wrong when there is a space or other
// punctuation between the % and the register name.
StringRef regStr(lexedToken.getString().data(),
lexedToken.getString().size() +
nextToken.getString().size());
return AsmToken(AsmToken::Register, regStr,
static_cast<int64_t>(regID));
}
// Match register name failed. If this is "db[0-7]", match it as an alias
// for dr[0-7].
if (nextToken.getString().size() == 3 &&
nextToken.getString().startswith("db")) {
int RegNo = -1;
switch (nextToken.getString()[2]) {
case '0': RegNo = X86::DR0; break;
case '1': RegNo = X86::DR1; break;
case '2': RegNo = X86::DR2; break;
case '3': RegNo = X86::DR3; break;
case '4': RegNo = X86::DR4; break;
case '5': RegNo = X86::DR5; break;
case '6': RegNo = X86::DR6; break;
case '7': RegNo = X86::DR7; break;
}
if (RegNo != -1) {
lexDefinite();
// FIXME: This is completely wrong when there is a space or other
// punctuation between the % and the register name.
StringRef regStr(lexedToken.getString().data(),
lexedToken.getString().size() +
nextToken.getString().size());
return AsmToken(AsmToken::Register, regStr,
static_cast<int64_t>(RegNo));
}
}
return lexedToken;
}
}
}
bool AMDGPUAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) {
const AsmToken Tok = Parser.getTok();
StartLoc = Tok.getLoc();
EndLoc = Tok.getEndLoc();
const StringRef &RegName = Tok.getString();
RegNo = getRegForName(RegName);
if (RegNo) {
Parser.Lex();
return false;
}
// Match vgprs and sgprs
if (RegName[0] != 's' && RegName[0] != 'v')
return true;
bool IsVgpr = RegName[0] == 'v';
unsigned RegWidth;
unsigned RegIndexInClass;
if (RegName.size() > 1) {
// We have a 32-bit register
RegWidth = 1;
if (RegName.substr(1).getAsInteger(10, RegIndexInClass))
return true;
Parser.Lex();
} else {
// We have a register greater than 32-bits.
int64_t RegLo, RegHi;
Parser.Lex();
if (getLexer().isNot(AsmToken::LBrac))
return true;
Parser.Lex();
if (getParser().parseAbsoluteExpression(RegLo))
return true;
if (getLexer().isNot(AsmToken::Colon))
return true;
Parser.Lex();
if (getParser().parseAbsoluteExpression(RegHi))
return true;
if (getLexer().isNot(AsmToken::RBrac))
return true;
Parser.Lex();
RegWidth = (RegHi - RegLo) + 1;
if (IsVgpr) {
// VGPR registers aren't aligned.
RegIndexInClass = RegLo;
} else {
// SGPR registers are aligned. Max alignment is 4 dwords.
RegIndexInClass = RegLo / std::min(RegWidth, 4u);
}
}
const MCRegisterInfo *TRC = getContext().getRegisterInfo();
unsigned RC = getRegClass(IsVgpr, RegWidth);
if (RegIndexInClass > TRC->getRegClass(RC).getNumRegs())
return true;
RegNo = TRC->getRegClass(RC).getRegister(RegIndexInClass);
return false;
}
bool SparcAsmParser::matchRegisterName(const AsmToken &Tok,
unsigned &RegNo,
bool isDFP,
bool isQFP)
{
int64_t intVal = 0;
RegNo = 0;
if (Tok.is(AsmToken::Identifier)) {
StringRef name = Tok.getString();
// %fp
if (name.equals("fp")) {
RegNo = Sparc::I6;
return true;
}
// %sp
if (name.equals("sp")) {
RegNo = Sparc::O6;
return true;
}
if (name.equals("y")) {
RegNo = Sparc::Y;
return true;
}
if (name.equals("icc")) {
RegNo = Sparc::ICC;
return true;
}
if (name.equals("xcc")) {
// FIXME:: check 64bit.
RegNo = Sparc::ICC;
return true;
}
// %fcc0 - %fcc3
if (name.substr(0, 3).equals_lower("fcc")
&& !name.substr(3).getAsInteger(10, intVal)
&& intVal < 4) {
// FIXME: check 64bit and handle %fcc1 - %fcc3
RegNo = Sparc::FCC;
return true;
}
// %g0 - %g7
if (name.substr(0, 1).equals_lower("g")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 8) {
RegNo = IntRegs[intVal];
return true;
}
// %o0 - %o7
if (name.substr(0, 1).equals_lower("o")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 8) {
RegNo = IntRegs[8 + intVal];
return true;
}
if (name.substr(0, 1).equals_lower("l")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 8) {
RegNo = IntRegs[16 + intVal];
return true;
}
if (name.substr(0, 1).equals_lower("i")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 8) {
RegNo = IntRegs[24 + intVal];
return true;
}
// %f0 - %f31
if (name.substr(0, 1).equals_lower("f")
&& !name.substr(1, 2).getAsInteger(10, intVal) && intVal < 32) {
if (isDFP && (intVal%2 == 0)) {
RegNo = DoubleRegs[intVal/2];
} else if (isQFP && (intVal%4 == 0)) {
RegNo = QuadFPRegs[intVal/4];
} else {
RegNo = FloatRegs[intVal];
}
return true;
}
// %f32 - %f62
if (name.substr(0, 1).equals_lower("f")
&& !name.substr(1, 2).getAsInteger(10, intVal)
&& intVal >= 32 && intVal <= 62 && (intVal % 2 == 0)) {
if (isDFP) {
RegNo = DoubleRegs[16 + intVal/2];
} else if (isQFP && (intVal % 4 == 0)) {
RegNo = QuadFPRegs[8 + intVal/4];
} else {
return false;
}
return true;
}
// %r0 - %r31
if (name.substr(0, 1).equals_lower("r")
&& !name.substr(1, 2).getAsInteger(10, intVal) && intVal < 31) {
RegNo = IntRegs[intVal];
return true;
}
}
return false;
}
bool SparcAsmParser::matchRegisterName(const AsmToken &Tok,
unsigned &RegNo,
unsigned &RegKind)
{
int64_t intVal = 0;
RegNo = 0;
RegKind = SparcOperand::rk_None;
if (Tok.is(AsmToken::Identifier)) {
StringRef name = Tok.getString();
// %fp
if (name.equals("fp")) {
RegNo = Sparc::I6;
RegKind = SparcOperand::rk_IntReg;
return true;
}
// %sp
if (name.equals("sp")) {
RegNo = Sparc::O6;
RegKind = SparcOperand::rk_IntReg;
return true;
}
if (name.equals("y")) {
RegNo = Sparc::Y;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.substr(0, 3).equals_lower("asr")
&& !name.substr(3).getAsInteger(10, intVal)
&& intVal > 0 && intVal < 32) {
RegNo = ASRRegs[intVal];
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("icc")) {
RegNo = Sparc::ICC;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("psr")) {
RegNo = Sparc::PSR;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("wim")) {
RegNo = Sparc::WIM;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("tbr")) {
RegNo = Sparc::TBR;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("xcc")) {
// FIXME:: check 64bit.
RegNo = Sparc::ICC;
RegKind = SparcOperand::rk_Special;
return true;
}
// %fcc0 - %fcc3
if (name.substr(0, 3).equals_lower("fcc")
&& !name.substr(3).getAsInteger(10, intVal)
&& intVal < 4) {
// FIXME: check 64bit and handle %fcc1 - %fcc3
RegNo = Sparc::FCC0 + intVal;
RegKind = SparcOperand::rk_Special;
return true;
}
// %g0 - %g7
if (name.substr(0, 1).equals_lower("g")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 8) {
RegNo = IntRegs[intVal];
RegKind = SparcOperand::rk_IntReg;
return true;
}
// %o0 - %o7
if (name.substr(0, 1).equals_lower("o")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 8) {
RegNo = IntRegs[8 + intVal];
RegKind = SparcOperand::rk_IntReg;
return true;
}
if (name.substr(0, 1).equals_lower("l")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 8) {
RegNo = IntRegs[16 + intVal];
RegKind = SparcOperand::rk_IntReg;
return true;
}
if (name.substr(0, 1).equals_lower("i")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 8) {
RegNo = IntRegs[24 + intVal];
RegKind = SparcOperand::rk_IntReg;
return true;
}
// %f0 - %f31
if (name.substr(0, 1).equals_lower("f")
&& !name.substr(1, 2).getAsInteger(10, intVal) && intVal < 32) {
RegNo = FloatRegs[intVal];
RegKind = SparcOperand::rk_FloatReg;
return true;
}
// %f32 - %f62
if (name.substr(0, 1).equals_lower("f")
&& !name.substr(1, 2).getAsInteger(10, intVal)
&& intVal >= 32 && intVal <= 62 && (intVal % 2 == 0)) {
// FIXME: Check V9
RegNo = DoubleRegs[intVal/2];
RegKind = SparcOperand::rk_DoubleReg;
return true;
}
// %r0 - %r31
if (name.substr(0, 1).equals_lower("r")
&& !name.substr(1, 2).getAsInteger(10, intVal) && intVal < 31) {
RegNo = IntRegs[intVal];
RegKind = SparcOperand::rk_IntReg;
return true;
}
}
return false;
}
bool SparcAsmParser::matchRegisterName(const AsmToken &Tok,
unsigned &RegNo,
unsigned &RegKind)
{
int64_t intVal = 0;
RegNo = 0;
RegKind = SparcOperand::rk_None;
if (Tok.is(AsmToken::Identifier)) {
StringRef name = Tok.getString();
// %fp
if (name.equals("fp")) {
RegNo = Sparc::I6;
RegKind = SparcOperand::rk_IntReg;
return true;
}
// %sp
if (name.equals("sp")) {
RegNo = Sparc::O6;
RegKind = SparcOperand::rk_IntReg;
return true;
}
if (name.equals("y")) {
RegNo = Sparc::Y;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.substr(0, 3).equals_lower("asr")
&& !name.substr(3).getAsInteger(10, intVal)
&& intVal > 0 && intVal < 32) {
RegNo = ASRRegs[intVal];
RegKind = SparcOperand::rk_Special;
return true;
}
// %fprs is an alias of %asr6.
if (name.equals("fprs")) {
RegNo = ASRRegs[6];
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("icc")) {
RegNo = Sparc::ICC;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("psr")) {
RegNo = Sparc::PSR;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("fsr")) {
RegNo = Sparc::FSR;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("fq")) {
RegNo = Sparc::FQ;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("csr")) {
RegNo = Sparc::CPSR;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("cq")) {
RegNo = Sparc::CPQ;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("wim")) {
RegNo = Sparc::WIM;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("tbr")) {
RegNo = Sparc::TBR;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("xcc")) {
// FIXME:: check 64bit.
RegNo = Sparc::ICC;
RegKind = SparcOperand::rk_Special;
return true;
}
// %fcc0 - %fcc3
if (name.substr(0, 3).equals_lower("fcc")
&& !name.substr(3).getAsInteger(10, intVal)
&& intVal < 4) {
// FIXME: check 64bit and handle %fcc1 - %fcc3
RegNo = Sparc::FCC0 + intVal;
RegKind = SparcOperand::rk_Special;
return true;
}
// %g0 - %g7
if (name.substr(0, 1).equals_lower("g")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 8) {
RegNo = IntRegs[intVal];
RegKind = SparcOperand::rk_IntReg;
return true;
}
// %o0 - %o7
if (name.substr(0, 1).equals_lower("o")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 8) {
RegNo = IntRegs[8 + intVal];
RegKind = SparcOperand::rk_IntReg;
return true;
}
if (name.substr(0, 1).equals_lower("l")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 8) {
RegNo = IntRegs[16 + intVal];
RegKind = SparcOperand::rk_IntReg;
return true;
}
if (name.substr(0, 1).equals_lower("i")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 8) {
RegNo = IntRegs[24 + intVal];
RegKind = SparcOperand::rk_IntReg;
return true;
}
// %f0 - %f31
if (name.substr(0, 1).equals_lower("f")
&& !name.substr(1, 2).getAsInteger(10, intVal) && intVal < 32) {
RegNo = FloatRegs[intVal];
RegKind = SparcOperand::rk_FloatReg;
return true;
}
// %f32 - %f62
if (name.substr(0, 1).equals_lower("f")
&& !name.substr(1, 2).getAsInteger(10, intVal)
&& intVal >= 32 && intVal <= 62 && (intVal % 2 == 0)) {
// FIXME: Check V9
RegNo = DoubleRegs[intVal/2];
RegKind = SparcOperand::rk_DoubleReg;
return true;
}
// %r0 - %r31
if (name.substr(0, 1).equals_lower("r")
&& !name.substr(1, 2).getAsInteger(10, intVal) && intVal < 31) {
RegNo = IntRegs[intVal];
RegKind = SparcOperand::rk_IntReg;
return true;
}
// %c0 - %c31
if (name.substr(0, 1).equals_lower("c")
&& !name.substr(1).getAsInteger(10, intVal)
&& intVal < 32) {
RegNo = CoprocRegs[intVal];
RegKind = SparcOperand::rk_CoprocReg;
return true;
}
if (name.equals("tpc")) {
RegNo = Sparc::TPC;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("tnpc")) {
RegNo = Sparc::TNPC;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("tstate")) {
RegNo = Sparc::TSTATE;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("tt")) {
RegNo = Sparc::TT;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("tick")) {
RegNo = Sparc::TICK;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("tba")) {
RegNo = Sparc::TBA;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("pstate")) {
RegNo = Sparc::PSTATE;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("tl")) {
RegNo = Sparc::TL;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("pil")) {
RegNo = Sparc::PIL;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("cwp")) {
RegNo = Sparc::CWP;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("cansave")) {
RegNo = Sparc::CANSAVE;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("canrestore")) {
RegNo = Sparc::CANRESTORE;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("cleanwin")) {
RegNo = Sparc::CLEANWIN;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("otherwin")) {
RegNo = Sparc::OTHERWIN;
RegKind = SparcOperand::rk_Special;
return true;
}
if (name.equals("wstate")) {
RegNo = Sparc::WSTATE;
RegKind = SparcOperand::rk_Special;
return true;
}
}
return false;
}