// Do necessary pre-scan configuration
void Fei4PixelThresholdTune::preScan() {
// Global config
g_tx->setCmdEnable(g_bk->getTxMask());
g_bk->globalFe<Fei4>()->writeRegister(&Fei4::Trig_Count, 12);
g_bk->globalFe<Fei4>()->writeRegister(&Fei4::Trig_Lat, (255-triggerDelay)-4);
g_bk->globalFe<Fei4>()->writeRegister(&Fei4::CalPulseWidth, 20); // Longer than max ToT
while(!g_tx->isCmdEmpty())
;
for(unsigned int k=0; k<g_bk->feList.size(); k++) {
Fei4 *fe = dynamic_cast<Fei4*>(g_bk->feList[k]);
if (fe->isActive()) {
// Set to single channel tx
g_tx->setCmdEnable(0x1 << fe->getTxChannel());
// Set specific pulser DAC
fe->writeRegister(&Fei4::PlsrDAC, fe->toVcal(target, useScap, useLcap));
// Reset all TDACs
for (unsigned col=1; col<81; col++)
for (unsigned row=1; row<337; row++)
fe->setTDAC(col, row, 16);
while(!g_tx->isCmdEmpty())
;
}
}
g_tx->setCmdEnable(g_bk->getTxMask());
}
// Do necessary pre-scan configuration
void Fei4PixelPreampTune::preScan() {
// Global config
g_tx->setCmdEnable(b->getTxMask());
g_fe->writeRegister(&Fei4::Trig_Count, 12);
g_fe->writeRegister(&Fei4::Trig_Lat, (255-triggerDelay)-4);
g_fe->writeRegister(&Fei4::CalPulseWidth, 20); // Longer than max ToT
while(!g_tx->isCmdEmpty());
for(unsigned int k=0; k<b->feList.size(); k++) {
Fei4 *fe = b->feList[k];
// Set to single channel tx
g_tx->setCmdEnable(0x1 << fe->getTxChannel());
// Set specific pulser DAC
fe->writeRegister(&Fei4::PlsrDAC, fe->toVcal(target, useScap, useLcap));
// Reset all FDACs
for (unsigned col=1; col<81; col++)
for (unsigned row=1; row<337; row++)
fe->setFDAC(col, row, 8);
while(!g_tx->isCmdEmpty());
}
g_tx->setCmdEnable(b->getTxMask());
}