Esempi in C++ (Cpp) per HSim__s6

Esempio n. 1

File: xsimtestbench_arch.cpp Progetto: n0x3u5/Code

    HSimConfigDecl * topModuleInstantiate() {
        HSimConfigDecl * cfgvh = 0;
        cfgvh = new HSimConfigDecl("default");
        HSim__s6 * topvh = 0;
        topvh = new Work_nandandgate_tb_testbench_arch("NANDANDGate_tb");
        topvh->constructPorts();
        topvh->vhdlArchImplement();
        topvh->architectureInstantiate(cfgvh);
        addChild(topvh);
        return cfgvh;
}

Esempio n. 2

File: xsimbehavioral.cpp Progetto: n0x3u5/Code

    HSimConfigDecl * topModuleInstantiate() {
        HSimConfigDecl * cfgvh = 0;
        cfgvh = new HSimConfigDecl("default");
        HSim__s6 * topvh = 0;
        topvh = new Work_notgate_behavioral("notgate");
        topvh->constructPorts();
        topvh->vhdlArchImplement();
        topvh->architectureInstantiate(cfgvh);
        addChild(topvh);
        return cfgvh;
}

Esempio n. 3

File: xsimtestbench_arch.cpp Progetto: vj199/Digital-System-Design

    HSimConfigDecl * topModuleInstantiate() {
        HSimConfigDecl * cfgvh = 0;
        cfgvh = new HSimConfigDecl("default");
        HSim__s6 * topvh = 0;
        topvh = new Work_waveencoder_testbench_arch("WaveEncoder");
        topvh->constructPorts();
        topvh->vhdlArchImplement();
        topvh->architectureInstantiate(cfgvh);
        addChild(topvh);
        return cfgvh;
}

Esempio n. 4

File: xsimtestbench_arch.cpp Progetto: hitwow/CPU-VHDL

    HSimConfigDecl * topModuleInstantiate() {
        HSimConfigDecl * cfgvh = 0;
        cfgvh = new HSimConfigDecl("default");
        HSim__s6 * topvh = 0;
        extern HSim__s6 * createWork_w_alublock_testbench_arch(const char*);
        topvh = createWork_w_alublock_testbench_arch("w_alublock");
        topvh->constructPorts();
        topvh->checkTopLevelPortsConstrainted();
        topvh->vhdlArchImplement();
        topvh->architectureInstantiate(cfgvh);
        addChild(topvh);
        return cfgvh;
}

Esempio n. 5

File: xsimbehavior.cpp Progetto: heshuimu/EECS645FALL2015HW2

    HSimConfigDecl * topModuleInstantiate() {
        HSimConfigDecl * cfgvh = 0;
        cfgvh = new HSimConfigDecl("default");
        (*cfgvh).registerFuseLibList("");

        HSim__s6 * topvh = 0;
        extern HSim__s6 * createWork_q2vhdlkmaptestbench_vhd_behavior(const char*);
        topvh = createWork_q2vhdlkmaptestbench_vhd_behavior("Q2VHDLKmapTestBench_vhd");
        topvh->constructPorts();
        topvh->checkTopLevelPortsConstrainted();
        topvh->vhdlArchImplement();
        topvh->architectureInstantiate(cfgvh);
        addChild(topvh);
        return cfgvh;
}

Esempio n. 6

File: xsimtestbench_arch.cpp Progetto: erik1o6/VHDL

    HSimConfigDecl * topModuleInstantiate() {
        HSimConfigDecl * cfgvh = 0;
        cfgvh = new HSimConfigDecl("default");
        (*cfgvh).registerFuseLibList("unisims_ver");

        HSim__s6 * topvh = 0;
        extern HSim__s6 * createWork_test1_testbench_arch(const char*);
        topvh = createWork_test1_testbench_arch("test1");
        topvh->constructPorts();
        topvh->checkTopLevelPortsConstrainted();
        topvh->vhdlArchImplement();
        topvh->architectureInstantiate(cfgvh);
        addChild(topvh);
        return cfgvh;
}