void MacroAssemblerX86::branchTestValue(Condition cond, const ValueOperand &value, const Value &v, Label *label) { jsval_layout jv = JSVAL_TO_IMPL(v); if (v.isMarkable()) cmpl(value.payloadReg(), ImmGCPtr(reinterpret_cast<gc::Cell *>(v.toGCThing()))); else cmpl(value.payloadReg(), Imm32(jv.s.payload.i32)); if (cond == Equal) { Label done; j(NotEqual, &done); { cmpl(value.typeReg(), Imm32(jv.s.tag)); j(Equal, label); } bind(&done); } else { MOZ_ASSERT(cond == NotEqual); j(NotEqual, label); cmpl(value.typeReg(), Imm32(jv.s.tag)); j(NotEqual, label); } }
void CodeGeneratorX86::visitCompareBitwise(LCompareBitwise* lir) { MCompare* mir = lir->mir(); Assembler::Condition cond = JSOpToCondition(mir->compareType(), mir->jsop()); const ValueOperand lhs = ToValue(lir, LCompareBitwise::LhsInput); const ValueOperand rhs = ToValue(lir, LCompareBitwise::RhsInput); const Register output = ToRegister(lir->output()); MOZ_ASSERT(IsEqualityOp(mir->jsop())); Label notEqual, done; masm.cmp32(lhs.typeReg(), rhs.typeReg()); masm.j(Assembler::NotEqual, ¬Equal); { masm.cmp32(lhs.payloadReg(), rhs.payloadReg()); masm.emitSet(cond, output); masm.jump(&done); } masm.bind(¬Equal); { masm.move32(Imm32(cond == Assembler::NotEqual), output); } masm.bind(&done); }
void MacroAssembler::branchTestValue(Condition cond, const ValueOperand& lhs, const Value& rhs, Label* label) { MOZ_ASSERT(cond == Equal || cond == NotEqual); jsval_layout jv = JSVAL_TO_IMPL(rhs); if (rhs.isMarkable()) cmpPtr(lhs.payloadReg(), ImmGCPtr(reinterpret_cast<gc::Cell*>(rhs.toGCThing()))); else cmpPtr(lhs.payloadReg(), ImmWord(jv.s.payload.i32)); if (cond == Equal) { Label done; j(NotEqual, &done); { cmp32(lhs.typeReg(), Imm32(jv.s.tag)); j(Equal, label); } bind(&done); } else { j(NotEqual, label); cmp32(lhs.typeReg(), Imm32(jv.s.tag)); j(NotEqual, label); } }
bool aliasesReg(ValueOperand reg) { #if defined(JS_NUNBOX32) return aliasesReg(reg.typeReg()) || aliasesReg(reg.payloadReg()); #else return aliasesReg(reg.valueReg()); #endif }
void CodeGeneratorMIPS::visitCompareBitwiseAndBranch(LCompareBitwiseAndBranch* lir) { MCompare* mir = lir->cmpMir(); Assembler::Condition cond = JSOpToCondition(mir->compareType(), mir->jsop()); const ValueOperand lhs = ToValue(lir, LCompareBitwiseAndBranch::LhsInput); const ValueOperand rhs = ToValue(lir, LCompareBitwiseAndBranch::RhsInput); MOZ_ASSERT(mir->jsop() == JSOP_EQ || mir->jsop() == JSOP_STRICTEQ || mir->jsop() == JSOP_NE || mir->jsop() == JSOP_STRICTNE); MBasicBlock* notEqual = (cond == Assembler::Equal) ? lir->ifFalse() : lir->ifTrue(); branchToBlock(lhs.typeReg(), rhs.typeReg(), notEqual, Assembler::NotEqual); emitBranch(lhs.payloadReg(), rhs.payloadReg(), cond, lir->ifTrue(), lir->ifFalse()); }
bool CodeGeneratorX86::visitCompareVAndBranch(LCompareVAndBranch *lir) { MCompare *mir = lir->mir(); Assembler::Condition cond = JSOpToCondition(mir->jsop()); const ValueOperand lhs = ToValue(lir, LCompareVAndBranch::LhsInput); const ValueOperand rhs = ToValue(lir, LCompareVAndBranch::RhsInput); JS_ASSERT(mir->jsop() == JSOP_EQ || mir->jsop() == JSOP_STRICTEQ || mir->jsop() == JSOP_NE || mir->jsop() == JSOP_STRICTNE); Label *notEqual; if (cond == Assembler::Equal) notEqual = lir->ifFalse()->lir()->label(); else notEqual = lir->ifTrue()->lir()->label(); masm.cmp32(lhs.typeReg(), rhs.typeReg()); masm.j(Assembler::NotEqual, notEqual); masm.cmp32(lhs.payloadReg(), rhs.payloadReg()); emitBranch(cond, lir->ifTrue(), lir->ifFalse()); return true; }
void CodeGeneratorMIPS::visitCompareBAndBranch(LCompareBAndBranch* lir) { MCompare* mir = lir->cmpMir(); const ValueOperand lhs = ToValue(lir, LCompareBAndBranch::Lhs); const LAllocation* rhs = lir->rhs(); MOZ_ASSERT(mir->jsop() == JSOP_STRICTEQ || mir->jsop() == JSOP_STRICTNE); MBasicBlock* mirNotBoolean = (mir->jsop() == JSOP_STRICTEQ) ? lir->ifFalse() : lir->ifTrue(); branchToBlock(lhs.typeReg(), ImmType(JSVAL_TYPE_BOOLEAN), mirNotBoolean, Assembler::NotEqual); Assembler::Condition cond = JSOpToCondition(mir->compareType(), mir->jsop()); if (rhs->isConstant()) emitBranch(lhs.payloadReg(), Imm32(rhs->toConstant()->toBoolean()), cond, lir->ifTrue(), lir->ifFalse()); else emitBranch(lhs.payloadReg(), ToRegister(rhs), cond, lir->ifTrue(), lir->ifFalse()); }
Register CodeGeneratorMIPS::splitTagForTest(const ValueOperand& value) { return value.typeReg(); }