void cent_update_nlimits(uint32_t i_cent)
{
/*------------------------------------------------------------------------*/
/* Local Variables */
/*------------------------------------------------------------------------*/
static uint32_t L_trace_throttle_count = 0;
uint16_t l_mba01_mba_maxn, l_mba01_chip_maxn, l_mba23_mba_maxn, l_mba23_chip_maxn;
/*------------------------------------------------------------------------*/
/* Code */
/*------------------------------------------------------------------------*/
do
{
centaur_throttle_t* l_active_limits01 =
&G_centaurThrottleLimits[i_cent][0];
centaur_throttle_t* l_active_limits23 =
&G_centaurThrottleLimits[i_cent][1];
mem_throt_config_data_t* l_state_limits01 =
&G_sysConfigData.mem_throt_limits[i_cent][0];
mem_throt_config_data_t* l_state_limits23 =
&G_sysConfigData.mem_throt_limits[i_cent][1];
//Minimum N value is not state dependent
l_active_limits01->min_n_per_mba = l_state_limits01->min_ot_n_per_mba;
l_active_limits23->min_n_per_mba = l_state_limits23->min_ot_n_per_mba;
//oversubscription?
if(AMEC_INTF_GET_OVERSUBSCRIPTION())
{
l_mba01_mba_maxn = l_state_limits01->ovs_n_per_mba;
l_mba01_chip_maxn = l_state_limits01->ovs_n_per_chip;
l_mba23_mba_maxn = l_state_limits23->ovs_n_per_mba;
l_mba23_chip_maxn = l_state_limits23->ovs_n_per_chip;
}
else if(CURRENT_MODE() == OCC_MODE_NOMINAL)
{
l_mba01_mba_maxn = l_state_limits01->nom_n_per_mba;
l_mba01_chip_maxn = l_state_limits01->nom_n_per_chip;
l_mba23_mba_maxn = l_state_limits23->nom_n_per_mba;
l_mba23_chip_maxn = l_state_limits23->nom_n_per_chip;
}
else //DPS, TURBO, FFO, and SPS modes will use these settings
{
l_mba01_mba_maxn = l_state_limits01->turbo_n_per_mba;
l_mba01_chip_maxn = l_state_limits01->turbo_n_per_chip;
l_mba23_mba_maxn = l_state_limits23->turbo_n_per_mba;
l_mba23_chip_maxn = l_state_limits23->turbo_n_per_chip;
}
l_active_limits01->max_n_per_chip = l_mba01_chip_maxn;
l_active_limits23->max_n_per_chip = l_mba23_chip_maxn;
//Trace when the MBA max N value changes
if((l_mba01_mba_maxn != l_active_limits01->max_n_per_mba) ||
(l_mba23_mba_maxn != l_active_limits23->max_n_per_mba))
{
l_active_limits01->max_n_per_mba = l_mba01_mba_maxn;
l_active_limits23->max_n_per_mba = l_mba23_mba_maxn;
//Don't trace every MBA changing, just one
if(!L_trace_throttle_count)
{
L_trace_throttle_count = CENT_TRACE_THROTTLE_DELAY;
TRAC_IMP("New MBA throttle max|min N values: mba01[0x%08x], mba23[0x%08x]",
(uint32_t)((l_mba01_mba_maxn << 16) | l_active_limits01->min_n_per_mba),
(uint32_t)((l_mba23_mba_maxn << 16) | l_active_limits23->min_n_per_mba));
break;
}
}
if(L_trace_throttle_count)
{
L_trace_throttle_count--;
}
}while(0);
}
// Function Specification
//
// Name: amec_slv_voting_box
//
// Description: Slave OCC's voting box that decides the frequency request.
// This function will run every tick.
//
// Thread: RealTime Loop
//
// Task Flags:
//
// End Function Specification
void amec_slv_voting_box(void)
{
/*------------------------------------------------------------------------*/
/* Local Variables */
/*------------------------------------------------------------------------*/
uint16_t k = 0;
uint16_t l_chip_fmax = g_amec->sys.fmax;
uint16_t l_core_freq = 0;
uint32_t l_chip_reason = 0;
uint32_t l_core_reason = 0;
uint8_t l_kvm_throt_reason = NO_THROTTLE;
amec_part_t *l_part = NULL;
bool l_freq_req_changed = FALSE;
/*------------------------------------------------------------------------*/
/* Code */
/*------------------------------------------------------------------------*/
// Voting Box for CPU speed.
// This function implements the voting box to decide which input gets the right
// to actuate the system.
//Reset the maximum core frequency requested prior to recalculation.
g_amec->proc[0].core_max_freq = 0;
// PPB_FMAX
if(g_amec->proc[0].pwr_votes.ppb_fmax < l_chip_fmax)
{
l_chip_fmax = g_amec->proc[0].pwr_votes.ppb_fmax;
l_chip_reason = AMEC_VOTING_REASON_PPB;
l_kvm_throt_reason = POWERCAP;
}
// PMAX_CLIP_FREQ
if(g_amec->proc[0].pwr_votes.pmax_clip_freq < l_chip_fmax)
{
l_chip_fmax = g_amec->proc[0].pwr_votes.pmax_clip_freq;
l_chip_reason = AMEC_VOTING_REASON_PMAX;
l_kvm_throt_reason = POWER_SUPPLY_FAILURE;
}
// Pmax_clip frequency request if there is an APSS failure
if(g_amec->proc[0].pwr_votes.apss_pmax_clip_freq < l_chip_fmax)
{
l_chip_fmax = g_amec->proc[0].pwr_votes.apss_pmax_clip_freq;
l_chip_reason = AMEC_VOTING_REASON_APSS_PMAX;
l_kvm_throt_reason = POWER_SUPPLY_FAILURE;
}
//THERMALPROC.FREQ_REQUEST
//Thermal controller input based on processor temperature
if(g_amec->thermalproc.freq_request < l_chip_fmax)
{
l_chip_fmax = g_amec->thermalproc.freq_request;
l_chip_reason = AMEC_VOTING_REASON_PROC_THRM;
l_kvm_throt_reason = CPU_OVERTEMP;
}
// Controller request based on VRHOT signal from processor regulator
if(g_amec->vrhotproc.freq_request < l_chip_fmax)
{
l_chip_fmax = g_amec->vrhotproc.freq_request;
l_chip_reason = AMEC_VOTING_REASON_VRHOT_THRM;
l_kvm_throt_reason = CPU_OVERTEMP;
}
// CONN_OC_VOTE
if(g_amec->proc[0].pwr_votes.conn_oc_vote < l_chip_fmax)
{
l_chip_fmax = g_amec->proc[0].pwr_votes.conn_oc_vote;
l_chip_reason = AMEC_VOTING_REASON_CONN_OC;
l_kvm_throt_reason = OVERCURRENT;
}
for (k=0; k<MAX_NUM_CORES; k++)
{
if(CORE_PRESENT(k))
{
l_core_freq = l_chip_fmax;
l_core_reason = l_chip_reason;
// Disable DPS in KVM
if(!G_sysConfigData.system_type.kvm)
{
l_part = amec_part_find_by_core(&g_amec->part_config, k);
// Check frequency request generated by DPS algorithms
if(g_amec->proc[0].core[k].core_perf.dps_freq_request < l_core_freq)
{
l_core_freq = g_amec->proc[0].core[k].core_perf.dps_freq_request;
l_core_reason = AMEC_VOTING_REASON_UTIL;
}
// Adjust frequency based on soft frequency boundaries
if(l_part != NULL)
{
if(l_core_freq < l_part->soft_fmin)
{
// Before enforcing a soft Fmin, make sure we don't
// have a thermal or power emergency
if(!(l_chip_reason & (AMEC_VOTING_REASON_PROC_THRM |
AMEC_VOTING_REASON_VRHOT_THRM |
AMEC_VOTING_REASON_PPB |
AMEC_VOTING_REASON_PMAX |
AMEC_VOTING_REASON_CONN_OC)))
{
l_core_freq = l_part->soft_fmin;
l_core_reason = AMEC_VOTING_REASON_SOFT_MIN;
}
}
else if(l_core_freq > l_part->soft_fmax)
{
l_core_freq = l_part->soft_fmax;
l_core_reason = AMEC_VOTING_REASON_SOFT_MAX;
}
}
}
if(CURRENT_MODE() == OCC_MODE_NOMINAL)
{
// PROC_PCAP_NOM_VOTE
if(g_amec->proc[0].pwr_votes.proc_pcap_nom_vote < l_core_freq)
{
l_core_freq = g_amec->proc[0].pwr_votes.proc_pcap_nom_vote;
l_core_reason = AMEC_VOTING_REASON_PWR;
l_kvm_throt_reason = POWERCAP;
}
}
else
{
// PROC_PCAP_VOTE
if(g_amec->proc[0].pwr_votes.proc_pcap_vote < l_core_freq)
{
l_core_freq = g_amec->proc[0].pwr_votes.proc_pcap_vote;
l_core_reason = AMEC_VOTING_REASON_PWR;
l_kvm_throt_reason = POWERCAP;
}
}
// Check IPS frequency request sent by Master OCC
if(g_amec->slv_ips_freq_request != 0)
{
if(g_amec->slv_ips_freq_request < l_core_freq)
{
l_core_freq = g_amec->slv_ips_freq_request;
l_core_reason = AMEC_VOTING_REASON_IPS;
}
}
// Override frequency with request from Master OCC
if(g_amec->foverride_enable)
{
if(g_amec->foverride != 0)
{
// Override the frequency on all cores if Master OCC sends
// a non-zero request
l_core_freq = g_amec->foverride;
l_core_reason = AMEC_VOTING_REASON_OVERRIDE;
}
}
if(g_amec->pstate_foverride_enable)
{
if(g_amec->pstate_foverride != 0)
{
// Override the frequency on all cores if the Global Pstate
// table has been modified
l_core_freq = g_amec->pstate_foverride;
l_core_reason = AMEC_VOTING_REASON_OVERRIDE;
}
}
//Make sure the frequency is not less then the system min
if(l_core_freq < g_amec->sys.fmin)
{
l_core_freq = g_amec->sys.fmin;
}
// Override frequency via Amester parameter interface
if (g_amec->proc[0].parm_f_override_enable &&
g_amec->proc[0].parm_f_override[k] > 0)
{
l_core_freq = g_amec->proc[0].parm_f_override[k];
l_core_reason = AMEC_VOTING_REASON_OVERRIDE_CORE;
}
// If frequency has changed, set the flag
if ( (l_core_freq != g_amec->proc[0].core[k].f_request) ||
(l_core_freq != g_amec->sys.fmax))
{
l_freq_req_changed = TRUE;
}
//STORE core frequency and reason
g_amec->proc[0].core[k].f_request = l_core_freq;
g_amec->proc[0].core[k].f_reason = l_core_reason;
// Update the Amester parameter telling us the reason. Needed for
// parameter array.
g_amec->proc[0].parm_f_reason[k] = l_core_reason;
//CURRENT_MODE() may be OCC_MODE_NOCHANGE because STATE change is processed
//before MODE change
if ((CURRENT_MODE() != OCC_MODE_DYN_POWER_SAVE) &&
(CURRENT_MODE() != OCC_MODE_DYN_POWER_SAVE_FP) &&
(CURRENT_MODE() != OCC_MODE_NOCHANGE) &&
(l_core_reason & NON_DPS_POWER_LIMITED))
{
G_non_dps_power_limited = TRUE;
}
else
{
G_non_dps_power_limited = FALSE;
}
// Update the sensor telling us what the requested frequency is
sensor_update( AMECSENSOR_ARRAY_PTR(FREQ250USP0C0,k),
(uint16_t) g_amec->proc[0].core[k].f_request);
#if 0
/// TODO: This can be deleted if deemed useless
/// This trace that can be used to debug the voting
/// box an control loops. It will trace the reason why a
/// controller is lowering the freq, but will only do it once in a
/// row for the specific freq it wants to control to. It assumes
/// that all cores will be controlled to same freq.
if(l_chip_fmax != g_amec->sys.fmax){
static uint16_t L_trace = 0;
if(l_chip_fmax != L_trace){
L_trace = l_chip_fmax;
TRAC_INFO("Core: %d, Freq: %d, Reason: %d",k,l_core_freq,l_core_reason);
}
}
#endif
if(l_core_freq > g_amec->proc[0].core_max_freq)
{
g_amec->proc[0].core_max_freq = l_core_freq;
}
}
else
{
l_core_freq = 0;
l_core_reason = 0;
}
}//End of for loop
// Check if the frequency is going to be changing
if( l_freq_req_changed == TRUE )
{
G_time_until_freq_check = FREQ_CHG_CHECK_TIME;
}
else if (G_time_until_freq_check != 0)
{
G_time_until_freq_check--;
}
//convert POWERCAP reason to POWER_SUPPLY_FAILURE if ovs/failsafe is asserted
if((l_kvm_throt_reason == POWERCAP) &&
(AMEC_INTF_GET_FAILSAFE() || AMEC_INTF_GET_OVERSUBSCRIPTION()))
{
l_kvm_throt_reason = POWER_SUPPLY_FAILURE;
}
//check if we need to update the throttle reason in homer
if(G_sysConfigData.system_type.kvm &&
(l_kvm_throt_reason != G_amec_kvm_throt_reason))
{
//Notify dcom thread to update the table
G_amec_kvm_throt_reason = l_kvm_throt_reason;
ssx_semaphore_post(&G_dcomThreadWakeupSem);
}
}
// Function Specification
//
// Name: amec_slv_check_perf
//
// Description: Slave OCC's Detect and log degraded performance errors
// This function will run every tick.
//
// Thread: RealTime Loop
//
// Task Flags:
//
// End Function Specification
void amec_slv_check_perf(void)
{
/*------------------------------------------------------------------------*/
/* Local Variables */
/*------------------------------------------------------------------------*/
static BOOLEAN l_prev_failsafe_state = FALSE;
static BOOLEAN l_prev_ovs_state = FALSE;
static BOOLEAN l_prev_pcap_state = FALSE;
static ERRL_SEVERITY l_pcap_sev = ERRL_SEV_PREDICTIVE;
static BOOLEAN l_throttle_traced = FALSE;
static uint64_t l_time = 0;
/*------------------------------------------------------------------------*/
/* Code */
/*------------------------------------------------------------------------*/
// Verify that cores are at proper frequency
amec_verify_pstate();
do
{
// was frequency limited by power ?
if ( G_non_dps_power_limited != TRUE )
{
if(l_throttle_traced)
{
TRAC_INFO("Frequency not limited by power algorithms anymore");
l_throttle_traced = FALSE;
}
// we are done break and return
break;
}
// frequency limited due to failsafe condition ?
if ( AMEC_INTF_GET_FAILSAFE() == TRUE )
{
if ( l_prev_failsafe_state == TRUE)
{
// we are done break and return
break;
}
else
{
// log this error ONLY ONCE per IPL
l_prev_failsafe_state = TRUE;
TRAC_ERR("Frequency limited due to failsafe condition(mode:%d, state:%d)",
CURRENT_MODE(), CURRENT_STATE());
l_throttle_traced = TRUE;
l_time = ssx_timebase_get();
// log error that calls out OVS procedure
// set error severity to RRL_SEV_PREDICTIVE
/* @
* @errortype
* @moduleid AMEC_SLAVE_CHECK_PERFORMANCE
* @reasoncode INTERNAL_FAILURE
* @userdata1 Previous FailSafe State
* @userdata4 ERC_AMEC_SLAVE_FAILSAFE_STATE
* @devdesc Frequency limited due to failsafe condition
*/
errlHndl_t l_errl = createErrl(AMEC_SLAVE_CHECK_PERFORMANCE, //modId
INTERNAL_FAILURE, //reasoncode
ERC_AMEC_SLAVE_FAILSAFE_STATE,//Extended reason code
ERRL_SEV_PREDICTIVE, //Severity
NULL, //Trace Buf
DEFAULT_TRACE_SIZE, //Trace Size
l_prev_failsafe_state, //userdata1
0); //userdata2
addCalloutToErrl( l_errl,
ERRL_CALLOUT_TYPE_COMPONENT_ID,
ERRL_COMPONENT_ID_OVERSUBSCRIPTION,
ERRL_CALLOUT_PRIORITY_HIGH
);
// and sets the consolidate action flag
setErrlActions( l_errl, ERRL_ACTIONS_CONSOLIDATE_ERRORS );
// Commit Error
commitErrl(&l_errl);
// we are done lets break
break;
}
}
// frequency limited due to oversubscription condition ?
if ( AMEC_INTF_GET_OVERSUBSCRIPTION() == TRUE )
{
if ( l_prev_ovs_state == TRUE)
{
// we are done break and return
break;
}
else
{
// log this error ONLY ONCE per IPL
l_prev_ovs_state = TRUE;
TRAC_ERR("Frequency limited due to oversubscription condition(mode:%d, state:%d)",
CURRENT_MODE(), CURRENT_STATE());
l_throttle_traced = TRUE;
l_time = ssx_timebase_get();
// log error that calls out OVS procedure
// set error severity to RRL_SEV_PREDICTIVE
// Updated the RC to match the actual RC passed to createErrl()
/* @
* @errortype
* @moduleid AMEC_SLAVE_CHECK_PERFORMANCE
* @reasoncode OVERSUB_LIMIT_ALERT
* @userdata1 Previous OVS State
* @userdata4 ERC_AMEC_SLAVE_OVS_STATE
* @devdesc Frequency limited due to oversubscription condition
*/
errlHndl_t l_errl = createErrl(AMEC_SLAVE_CHECK_PERFORMANCE, //modId
OVERSUB_LIMIT_ALERT, //reasoncode
ERC_AMEC_SLAVE_OVS_STATE, //Extended reason code
ERRL_SEV_PREDICTIVE, //Severity
NULL, //Trace Buf
DEFAULT_TRACE_SIZE, //Trace Size
l_prev_ovs_state, //userdata1
0); //userdata2
// Callout to Oversubscription
addCalloutToErrl( l_errl,
ERRL_CALLOUT_TYPE_COMPONENT_ID,
ERRL_COMPONENT_ID_OVERSUBSCRIPTION,
ERRL_CALLOUT_PRIORITY_HIGH
);
// Callout to APSS
addCalloutToErrl( l_errl,
ERRL_CALLOUT_TYPE_HUID,
G_sysConfigData.apss_huid,
ERRL_CALLOUT_PRIORITY_MED
);
// Callout to Firmware
addCalloutToErrl( l_errl,
ERRL_CALLOUT_TYPE_COMPONENT_ID,
ERRL_COMPONENT_ID_FIRMWARE,
ERRL_CALLOUT_PRIORITY_LOW
);
// and sets the consolidate action flag
setErrlActions( l_errl, ERRL_ACTIONS_CONSOLIDATE_ERRORS );
// Commit Error
commitErrl(&l_errl);
// we are done lets break
break;
}
}
uint16_t l_snrBulkPwr = AMECSENSOR_PTR(PWR250US)->sample;
// frequency limited due to system power cap condition ?
if (( l_snrBulkPwr > (G_sysConfigData.pcap.system_pcap - PDROP_THRESH) )
&&
( G_sysConfigData.pcap.current_pcap == 0 ))
{
if ( l_prev_pcap_state == TRUE)
{
// we are done break and return
break;
}
else
{
//log this error ONLY ONCE per IPL
l_prev_pcap_state = TRUE;
TRAC_ERR("Frequency limited due to power cap condition(mode:%d, state:%d)",
CURRENT_MODE(), CURRENT_STATE());
TRAC_ERR("SnrBulkPwr %d > Sys Pcap %d ",l_snrBulkPwr,
G_sysConfigData.pcap.system_pcap );
TRAC_ERR("SnrFanPwr %d, SnrIOPwr %d, SnrStoragePwr %d, SnrGpuPrw %d ",
AMECSENSOR_PTR(PWR250USFAN)->sample,
AMECSENSOR_PTR(PWR250USIO)->sample,
AMECSENSOR_PTR(PWR250USSTORE)->sample,
AMECSENSOR_PTR(PWR250USGPU)->sample );
TRAC_ERR("SnrProcPwr 0 %d, SnrProcPwr 1 %d, SnrProcPwr 2 %d, SnrProcPwr 3 %d",
g_amec->proc_snr_pwr[0],
g_amec->proc_snr_pwr[1],
g_amec->proc_snr_pwr[2],
g_amec->proc_snr_pwr[3] );
TRAC_ERR("SnrMemPwr 0 %d, SnrMemPwr 1 %d, SnrMemPwr 2 %d, SnrMemPwr 3 %d",
g_amec->mem_snr_pwr[0],
g_amec->mem_snr_pwr[1],
g_amec->mem_snr_pwr[2],
g_amec->mem_snr_pwr[3] );
l_throttle_traced = TRUE;
l_time = ssx_timebase_get();
// log error that calls out firmware and APSS procedure
// set error severity to l_pcap_sev
/* @
* @errortype
* @moduleid AMEC_SLAVE_CHECK_PERFORMANCE
* @reasoncode PCAP_THROTTLE_POWER_LIMIT
* @userdata1 Current Sensor Bulk Power
* @userdata2 System PCAP
* @userdata4 ERC_AMEC_SLAVE_POWERCAP
* @devdesc Frequency limited due to PowerCap condition
*/
errlHndl_t l_errl = createErrl(AMEC_SLAVE_CHECK_PERFORMANCE, //modId
PCAP_THROTTLE_POWER_LIMIT, //reasoncode
ERC_AMEC_SLAVE_POWERCAP, //Extended reason code
l_pcap_sev, //Severity
NULL, //Trace Buf
DEFAULT_TRACE_SIZE, //Trace Size
l_snrBulkPwr, //userdata1
G_sysConfigData.pcap.system_pcap);//userdata2
addCalloutToErrl( l_errl,
ERRL_CALLOUT_TYPE_COMPONENT_ID,
ERRL_COMPONENT_ID_FIRMWARE,
ERRL_CALLOUT_PRIORITY_HIGH
);
addCalloutToErrl( l_errl,
ERRL_CALLOUT_TYPE_HUID,
G_sysConfigData.apss_huid,
ERRL_CALLOUT_PRIORITY_HIGH
);
// and sets the consolidate action flag
setErrlActions( l_errl, ERRL_ACTIONS_CONSOLIDATE_ERRORS );
// then l_pcap_sev to informational
l_pcap_sev = ERRL_SEV_INFORMATIONAL;
// Commit Error
commitErrl(&l_errl);
// we are done lets break
break;
}
}
// trottle trace to every 3600 seconds (1hr = 3600000)
if(!l_throttle_traced && ( DURATION_IN_MS_UNTIL_NOW_FROM(l_time) > 3600000 ) )
{
TRAC_INFO("Frequency power limited due to transient condition: PowerLimited=%x, FailSafe=%x, OverSubScription=%x CurrentBulkPwr=%x",
G_non_dps_power_limited, AMEC_INTF_GET_FAILSAFE(), AMEC_INTF_GET_OVERSUBSCRIPTION(), l_snrBulkPwr );
l_throttle_traced = TRUE;
l_time = ssx_timebase_get();
}
}
while( 0 );
return;
}
// Function Specification
//
// Name: amec_slv_proc_voting_box
//
// Description: Slave OCC's voting box that decides the frequency request.
// This function will run every tick.
//
// Thread: RealTime Loop
//
// Task Flags:
//
// End Function Specification
void amec_slv_proc_voting_box(void)
{
/*------------------------------------------------------------------------*/
/* Local Variables */
/*------------------------------------------------------------------------*/
uint16_t k = 0;
uint16_t l_chip_fmax = g_amec->sys.fmax;
uint16_t l_core_freq = 0;
uint16_t l_core_freq_max = 0; // max freq across all cores
uint16_t l_core_freq_min = g_amec->sys.fmax; // min freq across all cores
uint32_t l_current_reason = 0; // used for debug purposes
static uint32_t L_last_reason = 0; // used for debug purposes
uint32_t l_chip_reason = 0;
uint32_t l_core_reason = 0;
amec_proc_voting_reason_t l_kvm_throt_reason = NO_THROTTLE;
amec_part_t *l_part = NULL;
// frequency threshold for reporting throttling
uint16_t l_report_throttle_freq = G_sysConfigData.system_type.report_dvfs_nom ? G_sysConfigData.sys_mode_freq.table[OCC_MODE_NOMINAL] : G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO];
/*------------------------------------------------------------------------*/
/* Code */
/*------------------------------------------------------------------------*/
if (!G_allowPstates)
{
// Don't allow pstates to be sent until after initial mode has been set
if ( (CURRENT_MODE()) || (G_sysConfigData.system_type.kvm) )
{
G_allowPstates = TRUE;
}
}
// Voting Box for CPU speed.
// This function implements the voting box to decide which input gets the right
// to actuate the system.
// check for oversubscription if redundant ps policy (oversubscription) is being enforced
if (G_sysConfigData.system_type.non_redund_ps == false)
{
// If in oversubscription and there is a defined (non 0) OVERSUB frequency less than max then use it
if( (AMEC_INTF_GET_OVERSUBSCRIPTION()) &&
(G_sysConfigData.sys_mode_freq.table[OCC_MODE_OVERSUB]) &&
(G_sysConfigData.sys_mode_freq.table[OCC_MODE_OVERSUB] < l_chip_fmax) )
{
l_chip_fmax = G_sysConfigData.sys_mode_freq.table[OCC_MODE_OVERSUB];
l_chip_reason = AMEC_VOTING_REASON_OVERSUB;
}
}
// If there is an active VRM fault and a defined (non 0) VRM N frequency less than max use it
if( (g_amec->sys.vrm_fault_status) &&
(G_sysConfigData.sys_mode_freq.table[OCC_MODE_VRM_N]) &&
(G_sysConfigData.sys_mode_freq.table[OCC_MODE_VRM_N] < l_chip_fmax) )
{
l_chip_fmax = G_sysConfigData.sys_mode_freq.table[OCC_MODE_VRM_N];
l_chip_reason = AMEC_VOTING_REASON_VRM_N;
}
// PPB_FMAX
if(g_amec->proc[0].pwr_votes.ppb_fmax < l_chip_fmax)
{
l_chip_fmax = g_amec->proc[0].pwr_votes.ppb_fmax;
l_chip_reason = AMEC_VOTING_REASON_PPB;
if(l_report_throttle_freq <= l_chip_fmax)
{
l_kvm_throt_reason = PCAP_EXCEED_REPORT;
}
else
{
l_kvm_throt_reason = POWERCAP;
}
}
// PMAX_CLIP_FREQ
if(g_amec->proc[0].pwr_votes.pmax_clip_freq < l_chip_fmax)
{
l_chip_fmax = g_amec->proc[0].pwr_votes.pmax_clip_freq;
l_chip_reason = AMEC_VOTING_REASON_PMAX;
l_kvm_throt_reason = POWER_SUPPLY_FAILURE;
}
// Pmax_clip frequency request if there is an APSS failure
if(g_amec->proc[0].pwr_votes.apss_pmax_clip_freq < l_chip_fmax)
{
l_chip_fmax = g_amec->proc[0].pwr_votes.apss_pmax_clip_freq;
l_chip_reason = AMEC_VOTING_REASON_APSS_PMAX;
l_kvm_throt_reason = POWER_SUPPLY_FAILURE;
}
//THERMALPROC.FREQ_REQUEST
//Thermal controller input based on processor temperature
if(g_amec->thermalproc.freq_request < l_chip_fmax)
{
l_chip_fmax = g_amec->thermalproc.freq_request;
l_chip_reason = AMEC_VOTING_REASON_PROC_THRM;
if( l_report_throttle_freq <= l_chip_fmax)
{
l_kvm_throt_reason = PROC_OVERTEMP_EXCEED_REPORT;
}
else
{
l_kvm_throt_reason = CPU_OVERTEMP;
}
}
//Thermal controller input based on VRM Vdd temperature
if(g_amec->thermalvdd.freq_request < l_chip_fmax)
{
l_chip_fmax = g_amec->thermalvdd.freq_request;
l_chip_reason = AMEC_VOTING_REASON_VDD_THRM;
if( l_report_throttle_freq <= l_chip_fmax)
{
l_kvm_throt_reason = VDD_OVERTEMP_EXCEED_REPORT;
}
else
{
l_kvm_throt_reason = VDD_OVERTEMP;
}
}
for (k=0; k<MAX_NUM_CORES; k++)
{
if( CORE_PRESENT(k) && !CORE_OFFLINE(k) )
{
l_core_freq = l_chip_fmax;
l_core_reason = l_chip_reason;
// Disable DPS in KVM
if(!G_sysConfigData.system_type.kvm)
{
l_part = amec_part_find_by_core(&g_amec->part_config, k);
// Check frequency request generated by DPS algorithms
if(g_amec->proc[0].core[k].core_perf.dps_freq_request < l_core_freq)
{
l_core_freq = g_amec->proc[0].core[k].core_perf.dps_freq_request;
l_core_reason = AMEC_VOTING_REASON_UTIL;
}
// Adjust frequency based on soft frequency boundaries
if(l_part != NULL)
{
if(l_core_freq < l_part->soft_fmin)
{
// Before enforcing a soft Fmin, make sure we don't
// have a thermal or power emergency
if(!(l_chip_reason & (AMEC_VOTING_REASON_PROC_THRM |
AMEC_VOTING_REASON_VDD_THRM |
AMEC_VOTING_REASON_PPB |
AMEC_VOTING_REASON_PMAX |
AMEC_VOTING_REASON_CONN_OC)))
{
l_core_freq = l_part->soft_fmin;
l_core_reason = AMEC_VOTING_REASON_SOFT_MIN;
}
}
else if(l_core_freq > l_part->soft_fmax)
{
l_core_freq = l_part->soft_fmax;
l_core_reason = AMEC_VOTING_REASON_SOFT_MAX;
}
}
}
if(CURRENT_MODE() == OCC_MODE_NOMINAL)
{
// PROC_PCAP_NOM_VOTE
if(g_amec->proc[0].pwr_votes.proc_pcap_nom_vote < l_core_freq)
{
l_core_freq = g_amec->proc[0].pwr_votes.proc_pcap_nom_vote;
l_core_reason = AMEC_VOTING_REASON_PWR;
l_kvm_throt_reason = POWERCAP;
}
}
else
{
// PROC_PCAP_VOTE
if(g_amec->proc[0].pwr_votes.proc_pcap_vote < l_core_freq)
{
l_core_freq = g_amec->proc[0].pwr_votes.proc_pcap_vote;
l_core_reason = AMEC_VOTING_REASON_PWR;
if(l_report_throttle_freq <= l_core_freq)
{
l_kvm_throt_reason = PCAP_EXCEED_REPORT;
}
else
{
l_kvm_throt_reason = POWERCAP;
}
}
}
// Check IPS frequency request sent by Master OCC
if(g_amec->slv_ips_freq_request != 0)
{
if(g_amec->slv_ips_freq_request < l_core_freq)
{
l_core_freq = g_amec->slv_ips_freq_request;
l_core_reason = AMEC_VOTING_REASON_IPS;
}
}
// Override frequency with request from Master OCC
if(g_amec->foverride_enable)
{
if(g_amec->foverride != 0)
{
// Override the frequency on all cores if Master OCC sends
// a non-zero request
l_core_freq = g_amec->foverride;
l_core_reason = AMEC_VOTING_REASON_OVERRIDE;
}
l_kvm_throt_reason = MANUFACTURING_OVERRIDE;
}
if(g_amec->pstate_foverride_enable)
{
if(g_amec->pstate_foverride != 0)
{
// Override the frequency on all cores if the Global Pstate
// table has been modified
l_core_freq = g_amec->pstate_foverride;
l_core_reason = AMEC_VOTING_REASON_OVERRIDE;
}
}
//Make sure the frequency is not less then the system min
if(l_core_freq < g_amec->sys.fmin)
{
l_core_freq = g_amec->sys.fmin;
}
// Override frequency via Amester parameter interface
if (g_amec->proc[0].parm_f_override_enable &&
g_amec->proc[0].parm_f_override[k] > 0)
{
l_core_freq = g_amec->proc[0].parm_f_override[k];
l_core_reason = AMEC_VOTING_REASON_OVERRIDE_CORE;
}
//STORE core frequency and reason
g_amec->proc[0].core[k].f_request = l_core_freq;
g_amec->proc[0].core[k].f_reason = l_core_reason;
if(l_core_freq < l_core_freq_min)
{
// store the new lowest frequency and reason to be used after all cores checked
l_core_freq_min = l_core_freq;
l_current_reason = l_core_reason;
}
// Update the Amester parameter telling us the reason. Needed for
// parameter array.
g_amec->proc[0].parm_f_reason[k] = l_core_reason;
//CURRENT_MODE() may be OCC_MODE_NOCHANGE because STATE change is processed
//before MODE change
if ((CURRENT_MODE() != OCC_MODE_DYN_POWER_SAVE) &&
(CURRENT_MODE() != OCC_MODE_DYN_POWER_SAVE_FP) &&
(CURRENT_MODE() != OCC_MODE_NOM_PERFORMANCE) &&
(CURRENT_MODE() != OCC_MODE_MAX_PERFORMANCE) &&
(CURRENT_MODE() != OCC_MODE_FMF) &&
(CURRENT_MODE() != OCC_MODE_NOCHANGE) &&
(l_core_reason & NON_DPS_POWER_LIMITED))
{
G_non_dps_power_limited = TRUE;
}
else
{
G_non_dps_power_limited = FALSE;
}
// Update the sensor telling us what the requested frequency is
sensor_update( AMECSENSOR_ARRAY_PTR(FREQREQC0,k),
(uint16_t) g_amec->proc[0].core[k].f_request);
#if DEBUG_PROC_VOTING_BOX
/// This trace that can be used to debug the voting
/// box and control loops. It will trace the reason why a
/// controller is lowering the freq, but will only do it once in a
/// row for the specific freq it wants to control to. It assumes
/// that all cores will be controlled to same freq.
if(l_chip_fmax != g_amec->sys.fmax){
static uint16_t L_trace = 0;
if(l_chip_fmax != L_trace){
L_trace = l_chip_fmax;
TRAC_INFO("Core: %d, Freq: %d, Reason: %d",k,l_core_freq,l_core_reason);
}
}
#endif
if(l_core_freq > l_core_freq_max)
{
l_core_freq_max = l_core_freq;
}
} // if core present and not offline
else
{
//Set f_request to 0 so this core is ignored in amec_slv_freq_smh()
g_amec->proc[0].core[k].f_request = 0;
g_amec->proc[0].core[k].f_reason = 0;
}
}//End of for loop
// update max core frequency if not 0 i.e. all cores offline (stop 2 or greater)
// this is used by power capping alg, updating to 0 will cause power throttling when not needed
if(l_core_freq_max)
{
g_amec->proc[0].core_max_freq = l_core_freq_max;
// update the overall reason driving frequency across all cores
g_amec->proc[0].f_reason = l_current_reason;
}
//check if there was a throttle reason change
if(l_kvm_throt_reason != G_amec_opal_proc_throt_reason)
{
//Always update G_amec_opal_proc_throt_reason, this is used to set poll rsp bits for all system types
G_amec_opal_proc_throt_reason = l_kvm_throt_reason;
// Only if running OPAL need to notify dcom thread to update the table in HOMER for OPAL
if(G_sysConfigData.system_type.kvm)
{
ssx_semaphore_post(&G_dcomThreadWakeupSem);
}
}
// For debug... if lower than max update vars returned in poll response to give clipping reason
g_amec->proc[0].core_min_freq = l_core_freq_min;
if(l_core_freq_min < g_amec->sys.fmax)
{
if(l_current_reason == L_last_reason)
{
// same reason INC counter
if(g_amec->proc[0].current_clip_count != 0xFF)
{
g_amec->proc[0].current_clip_count++;
}
}
else
{
// new reason update history and set counter to 1
L_last_reason = l_current_reason;
g_amec->proc[0].current_clip_count = 1;
if( (g_amec->proc[0].chip_f_reason_history & l_current_reason) == 0)
{
g_amec->proc[0].chip_f_reason_history |= l_current_reason;
TRAC_IMP("First time throttling for reason[0x%08X] History[0x%08X] freq = %d",
l_current_reason, g_amec->proc[0].chip_f_reason_history, l_core_freq_min);
}
}
}
else // no active clipping
{
L_last_reason = 0;
g_amec->proc[0].current_clip_count = 0;
}
}
