int Bmc_LoadAddCnf( void * pMan, int iLit ) { Bmc_Load_t * p = (Bmc_Load_t *)pMan; int Lits[3], iVar = Abc_Lit2Var(iLit); Gia_Obj_t * pObj = Gia_ManObj( p->pGia, Vec_IntEntry(p->vSat2Id, iVar) ); p->nCallBacks1++; if ( Gia_ObjIsCi(pObj) || Gia_ObjIsConst0(pObj) ) return 0; assert( Gia_ObjIsAnd(pObj) ); if ( (Abc_LitIsCompl(iLit) ? pObj->fMark1 : pObj->fMark0) ) return 0; Lits[0] = Abc_LitNot(iLit); if ( Abc_LitIsCompl(iLit) ) { Lits[1] = Abc_Var2Lit( Bmc_LoadGetSatVar(p, Gia_ObjFaninId0p(p->pGia, pObj)), !Gia_ObjFaninC0(pObj) ); Lits[2] = Abc_Var2Lit( Bmc_LoadGetSatVar(p, Gia_ObjFaninId1p(p->pGia, pObj)), !Gia_ObjFaninC1(pObj) ); sat_solver_clause_new( p->pSat, Lits, Lits + 3, 0 ); pObj->fMark1 = 1; } else { Lits[1] = Abc_Var2Lit( Bmc_LoadGetSatVar(p, Gia_ObjFaninId0p(p->pGia, pObj)), Gia_ObjFaninC0(pObj) ); sat_solver_clause_new( p->pSat, Lits, Lits + 2, 0 ); Lits[1] = Abc_Var2Lit( Bmc_LoadGetSatVar(p, Gia_ObjFaninId1p(p->pGia, pObj)), Gia_ObjFaninC1(pObj) ); sat_solver_clause_new( p->pSat, Lits, Lits + 2, 0 ); pObj->fMark0 = 1; } p->nCallBacks2++; return 1; }
ABC_NAMESPACE_IMPL_START //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// //////////////////////////////////////////////////////////////////////// /**Function************************************************************* Synopsis [Backward propagation.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ void Bmc_CexCarePropagateFwdOne( Gia_Man_t * p, Abc_Cex_t * pCex, int f, int fGrow ) { Gia_Obj_t * pObj; int Prio, Prio0, Prio1; int i, Phase0, Phase1; if ( (fGrow & 2) ) { Gia_ManForEachPi( p, pObj, i ) pObj->Value = Abc_Var2Lit( f * pCex->nPis + (pCex->nPis-1-i) + 1, Abc_InfoHasBit(pCex->pData, pCex->nRegs + pCex->nPis * f + i) ); } else { Gia_ManForEachPi( p, pObj, i ) pObj->Value = Abc_Var2Lit( f * pCex->nPis + i + 1, Abc_InfoHasBit(pCex->pData, pCex->nRegs + pCex->nPis * f + i) ); } Gia_ManForEachAnd( p, pObj, i ) { Prio0 = Abc_Lit2Var(Gia_ObjFanin0(pObj)->Value); Prio1 = Abc_Lit2Var(Gia_ObjFanin1(pObj)->Value); Phase0 = Abc_LitIsCompl(Gia_ObjFanin0(pObj)->Value) ^ Gia_ObjFaninC0(pObj); Phase1 = Abc_LitIsCompl(Gia_ObjFanin1(pObj)->Value) ^ Gia_ObjFaninC1(pObj); if ( Phase0 && Phase1 ) Prio = (fGrow & 1) ? Abc_MinInt(Prio0, Prio1) : Abc_MaxInt(Prio0, Prio1); else if ( Phase0 && !Phase1 ) Prio = Prio1; else if ( !Phase0 && Phase1 ) Prio = Prio0; else // if ( !Phase0 && !Phase1 ) Prio = (fGrow & 1) ? Abc_MaxInt(Prio0, Prio1) : Abc_MinInt(Prio0, Prio1); pObj->Value = Abc_Var2Lit( Prio, Phase0 & Phase1 ); }
ABC_NAMESPACE_IMPL_START //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// //////////////////////////////////////////////////////////////////////// /**Function************************************************************* Synopsis [Converts the network from the AIG manager into ABC.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ Abc_Obj_t * Abc_NodeFanin0Copy( Abc_Ntk_t * pNtk, Vec_Int_t * vCopies, Mini_Aig_t * p, int Id ) { int Lit = Mini_AigNodeFanin0( p, Id ); int AbcLit = Abc_LitNotCond( Vec_IntEntry(vCopies, Abc_Lit2Var(Lit)), Abc_LitIsCompl(Lit) ); return Abc_ObjFromLit( pNtk, AbcLit ); }
ABC_NAMESPACE_IMPL_START //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// //////////////////////////////////////////////////////////////////////// /**Function************************************************************* Synopsis [Converts MiniAIG into GIA.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ int Gia_ObjFromMiniFanin0Copy( Gia_Man_t * pGia, Vec_Int_t * vCopies, Mini_Aig_t * p, int Id ) { int Lit = Mini_AigNodeFanin0( p, Id ); return Abc_LitNotCond( Vec_IntEntry(vCopies, Abc_Lit2Var(Lit)), Abc_LitIsCompl(Lit) ); }
ABC_NAMESPACE_IMPL_START //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// //////////////////////////////////////////////////////////////////////// /**Function************************************************************* Synopsis [] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ void Sfm_PrintCnf( Vec_Str_t * vCnf ) { char Entry; int i, Lit; Vec_StrForEachEntry( vCnf, Entry, i ) { Lit = (int)Entry; if ( Lit == -1 ) printf( "\n" ); else printf( "%s%d ", Abc_LitIsCompl(Lit) ? "-":"", Abc_Lit2Var(Lit) ); }
/**Function************************************************************* Synopsis [Expands cubes against the offset given as an AIG.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ int Abc_ObjExpandCubesTry( Vec_Str_t * vSop, sat_solver * pSat, Vec_Int_t * vVars ) { extern int Bmc_CollapseExpandRound( sat_solver * pSat, sat_solver * pSatOn, Vec_Int_t * vLits, Vec_Int_t * vNums, Vec_Int_t * vTemp, int nBTLimit, int fCanon, int fOnOffSetLit ); char * pCube, * pSop = Vec_StrArray(vSop); int nCubes = Abc_SopGetCubeNum(pSop); int nVars = Abc_SopGetVarNum(pSop); Vec_Int_t * vLits = Vec_IntAlloc( nVars ); Vec_Int_t * vTemp = Vec_IntAlloc( nVars ); assert( nVars == Vec_IntSize(vVars) ); assert( Vec_StrSize(vSop) == nCubes * (nVars + 3) + 1 ); Bmc_SopForEachCube( pSop, nVars, pCube ) { int k, Entry; // collect literals and clean cube Vec_IntFill( vLits, nVars, -1 ); for ( k = 0; k < nVars; k++ ) { if ( pCube[k] == '-' ) continue; Vec_IntWriteEntry( vLits, k, Abc_Var2Lit(Vec_IntEntry(vVars, k), pCube[k] == '0') ); pCube[k] = '-'; } // expand cube Bmc_CollapseExpandRound( pSat, NULL, vLits, NULL, vTemp, 0, 0, -1 ); // insert literals Vec_IntForEachEntry( vLits, Entry, k ) if ( Entry != -1 ) pCube[k] = '1' - Abc_LitIsCompl(Entry); }
/**Function************************************************************* Synopsis [Solve the enumeration problem.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ int Bmc_EcoSolve( sat_solver * pSat, int Root, Vec_Int_t * vVars ) { int nBTLimit = 1000000; Vec_Int_t * vLits = Vec_IntAlloc( Vec_IntSize(vVars) ); int status, i, Div, iVar, nFinal, * pFinal, nIter = 0, RetValue = 0; int pLits[2], nVars = sat_solver_nvars( pSat ); sat_solver_setnvars( pSat, nVars + 1 ); pLits[0] = Abc_Var2Lit( Root, 0 ); // F = 1 pLits[1] = Abc_Var2Lit( nVars, 0 ); // iNewLit while ( 1 ) { // find onset minterm status = sat_solver_solve( pSat, pLits, pLits + 2, nBTLimit, 0, 0, 0 ); if ( status == l_Undef ) { RetValue = -1; break; } if ( status == l_False ) { RetValue = 1; break; } assert( status == l_True ); // collect divisor literals Vec_IntClear( vLits ); Vec_IntPush( vLits, Abc_LitNot(pLits[0]) ); // F = 0 Vec_IntForEachEntry( vVars, Div, i ) Vec_IntPush( vLits, sat_solver_var_literal(pSat, Div) ); // check against offset status = sat_solver_solve( pSat, Vec_IntArray(vLits), Vec_IntArray(vLits) + Vec_IntSize(vLits), nBTLimit, 0, 0, 0 ); if ( status == l_Undef ) { RetValue = -1; break; } if ( status == l_True ) break; assert( status == l_False ); // compute cube and add clause nFinal = sat_solver_final( pSat, &pFinal ); Vec_IntClear( vLits ); Vec_IntPush( vLits, Abc_LitNot(pLits[1]) ); // NOT(iNewLit) printf( "Cube %d : ", nIter ); for ( i = 0; i < nFinal; i++ ) { if ( pFinal[i] == pLits[0] ) continue; Vec_IntPush( vLits, pFinal[i] ); iVar = Vec_IntFind( vVars, Abc_Lit2Var(pFinal[i]) ); assert( iVar >= 0 ); printf( "%s%d ", Abc_LitIsCompl(pFinal[i]) ? "+":"-", iVar ); } printf( "\n" ); status = sat_solver_addclause( pSat, Vec_IntArray(vLits), Vec_IntArray(vLits) + Vec_IntSize(vLits) ); assert( status ); nIter++; } // assert( status == l_True ); Vec_IntFree( vLits ); return RetValue; }
/**Function************************************************************* Synopsis [Remaps the AIG from the old manager into the new manager.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ void Gia_ManCleanupRemap( Gia_Man_t * p, Gia_Man_t * pGia ) { Gia_Obj_t * pObj, * pObjGia; int i, iPrev; Gia_ManForEachObj1( p, pObj, i ) { iPrev = Gia_ObjValue(pObj); if ( iPrev == ~0 ) continue; pObjGia = Gia_ManObj( pGia, Abc_Lit2Var(iPrev) ); if ( pObjGia->Value == ~0 ) Gia_ObjSetValue( pObj, pObjGia->Value ); else Gia_ObjSetValue( pObj, Abc_LitNotCond(pObjGia->Value, Abc_LitIsCompl(iPrev)) ); }
int Ssc_GiaSimulatePattern_rec( Ssc_Man_t * p, Gia_Obj_t * pObj ) { int Res0, Res1; if ( Gia_ObjIsTravIdCurrent(p->pAig, pObj) ) return pObj->fMark0; Gia_ObjSetTravIdCurrent(p->pAig, pObj); if ( ~pObj->Value ) // mapping into FRAIG exists - simulate FRAIG { Res0 = Ssc_GiaSimulatePatternFraig_rec( p, Abc_Lit2Var(pObj->Value) ); pObj->fMark0 = Res0 ^ Abc_LitIsCompl(pObj->Value); } else // mapping into FRAIG does not exist - simulate AIG { Res0 = Ssc_GiaSimulatePattern_rec( p, Gia_ObjFanin0(pObj) ); Res1 = Ssc_GiaSimulatePattern_rec( p, Gia_ObjFanin1(pObj) ); pObj->fMark0 = (Res0 ^ Gia_ObjFaninC0(pObj)) & (Res1 ^ Gia_ObjFaninC1(pObj)); } return pObj->fMark0; }
/**Function************************************************************* Synopsis [] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ static inline int Kf_SetLoadCuts( Kf_Cut_t * pCuts, int * pIntCuts ) { Kf_Cut_t * pCut; int k, * pIntCut, nCuts = 0; Kf_ObjForEachCutInt( pIntCuts, pIntCut, nCuts ) { pCut = pCuts + nCuts; pCut->Sign = 0; pCut->Polar = 0; pCut->iFunc = pIntCut[pIntCut[0] + 1]; pCut->Delay = pIntCut[pIntCut[0] + 2]; pCut->Area = Abc_Int2Float(pIntCut[pIntCut[0] + 3]); pCut->nLeaves = pIntCut[0]; for ( k = 0; k < pIntCut[0]; k++ ) { pCut->pLeaves[k] = Abc_Lit2Var(pIntCut[k+1]); pCut->Sign |= ((word)1) << (pCut->pLeaves[k] & 0x3F); if ( Abc_LitIsCompl(pIntCut[k+1]) ) pCut->Polar |= (1 << k); } }
Abc_Obj_t * Abc_NodeFanin1Copy( Abc_Ntk_t * pNtk, Vec_Int_t * vCopies, Mini_Aig_t * p, int Id ) { int Lit = Mini_AigNodeFanin1( p, Id ); int AbcLit = Abc_LitNotCond( Vec_IntEntry(vCopies, Abc_Lit2Var(Lit)), Abc_LitIsCompl(Lit) ); return Abc_ObjFromLit( pNtk, AbcLit ); }
int Gia_ObjFromMiniFanin1Copy( Gia_Man_t * pGia, Vec_Int_t * vCopies, Mini_Aig_t * p, int Id ) { int Lit = Mini_AigNodeFanin1( p, Id ); return Abc_LitNotCond( Vec_IntEntry(vCopies, Abc_Lit2Var(Lit)), Abc_LitIsCompl(Lit) ); }
ABC_NAMESPACE_IMPL_START //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// static inline int Ssc_ObjSatLit( Ssc_Man_t * p, int Lit ) { return Abc_Var2Lit( Ssc_ObjSatVar(p, Abc_Lit2Var(Lit)), Abc_LitIsCompl(Lit) ); }
int Pdr_ObjSatVar2( Pdr_Man_t * p, int k, Aig_Obj_t * pObj, int Level, int Pol ) { Vec_Int_t * vLits; sat_solver * pSat; Vec_Int_t * vVar2Ids = (Vec_Int_t *)Vec_PtrEntry(&p->vVar2Ids, k); int nVarCount = Vec_IntSize(vVar2Ids); int iVarThis = Pdr_ObjSatVar2FindOrAdd( p, k, pObj ); int * pLit, i, iVar, iClaBeg, iClaEnd, RetValue; int PolPres = (iVarThis & 3); iVarThis >>= 2; if ( Aig_ObjIsCi(pObj) ) return iVarThis; // Pol = 3; // if ( nVarCount != Vec_IntSize(vVar2Ids) || (Pol & ~PolPres) ) if ( (Pol & ~PolPres) ) { *Vec_IntEntryP( p->pvId2Vars + Aig_ObjId(pObj), k ) |= Pol; iClaBeg = p->pCnf2->pObj2Clause[Aig_ObjId(pObj)]; iClaEnd = iClaBeg + p->pCnf2->pObj2Count[Aig_ObjId(pObj)]; assert( iClaBeg < iClaEnd ); /* if ( (Pol & ~PolPres) != 3 ) for ( i = iFirstClause; i < iFirstClause + nClauses; i++ ) { printf( "Clause %5d : ", i ); for ( iVar = 0; iVar < 4; iVar++ ) printf( "%d ", ((unsigned)p->pCnf2->pClaPols[i] >> (2*iVar)) & 3 ); printf( " " ); for ( pLit = p->pCnf2->pClauses[i]; pLit < p->pCnf2->pClauses[i+1]; pLit++ ) printf( "%6d ", *pLit ); printf( "\n" ); } */ pSat = Pdr_ManSolver(p, k); vLits = Vec_WecEntry( p->vVLits, Level ); if ( (Pol & ~PolPres) == 3 ) { assert( nVarCount + 1 == Vec_IntSize(vVar2Ids) ); for ( i = iClaBeg; i < iClaEnd; i++ ) { Vec_IntClear( vLits ); Vec_IntPush( vLits, toLitCond( iVarThis, lit_sign(p->pCnf2->pClauses[i][0]) ) ); for ( pLit = p->pCnf2->pClauses[i]+1; pLit < p->pCnf2->pClauses[i+1]; pLit++ ) { iVar = Pdr_ObjSatVar2( p, k, Aig_ManObj(p->pAig, lit_var(*pLit)), Level+1, 3 ); Vec_IntPush( vLits, toLitCond( iVar, lit_sign(*pLit) ) ); } RetValue = sat_solver_addclause( pSat, Vec_IntArray(vLits), Vec_IntArray(vLits)+Vec_IntSize(vLits) ); assert( RetValue ); (void) RetValue; } } else // if ( (Pol & ~PolPres) == 2 || (Pol & ~PolPres) == 1 ) // write pos/neg polarity { assert( (Pol & ~PolPres) ); for ( i = iClaBeg; i < iClaEnd; i++ ) if ( 2 - !Abc_LitIsCompl(p->pCnf2->pClauses[i][0]) == (Pol & ~PolPres) ) // taking opposite literal { Vec_IntClear( vLits ); Vec_IntPush( vLits, toLitCond( iVarThis, Abc_LitIsCompl(p->pCnf2->pClauses[i][0]) ) ); for ( pLit = p->pCnf2->pClauses[i]+1; pLit < p->pCnf2->pClauses[i+1]; pLit++ ) { iVar = Pdr_ObjSatVar2( p, k, Aig_ManObj(p->pAig, lit_var(*pLit)), Level+1, ((unsigned)p->pCnf2->pClaPols[i] >> (2*(pLit-p->pCnf2->pClauses[i]-1))) & 3 ); Vec_IntPush( vLits, toLitCond( iVar, lit_sign(*pLit) ) ); } RetValue = sat_solver_addclause( pSat, Vec_IntArray(vLits), Vec_IntArray(vLits)+Vec_IntSize(vLits) ); assert( RetValue ); (void) RetValue; } }
/**Function************************************************************* Synopsis [] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ Gia_Man_t * Ssc_PerformSweeping( Gia_Man_t * pAig, Gia_Man_t * pCare, Ssc_Pars_t * pPars ) { Ssc_Man_t * p; Gia_Man_t * pResult, * pTemp; Gia_Obj_t * pObj, * pRepr; abctime clk, clkTotal = Abc_Clock(); int i, fCompl, nRefined, status; clk = Abc_Clock(); assert( Gia_ManRegNum(pCare) == 0 ); assert( Gia_ManCiNum(pAig) == Gia_ManCiNum(pCare) ); assert( Gia_ManIsNormalized(pAig) ); assert( Gia_ManIsNormalized(pCare) ); // reset random numbers Gia_ManRandom( 1 ); // sweeping manager p = Ssc_ManStart( pAig, pCare, pPars ); if ( p == NULL ) return Gia_ManDup( pAig ); if ( p->pPars->fVerbose ) printf( "Care set produced %d hits out of %d.\n", Ssc_GiaEstimateCare(p->pFraig, 5), 640 ); // perform simulation while ( 1 ) { // simulate care set Ssc_GiaRandomPiPattern( p->pFraig, 5, NULL ); Ssc_GiaSimRound( p->pFraig ); // transfer care patterns to user's AIG if ( !Ssc_GiaTransferPiPattern( pAig, p->pFraig, p->vPivot ) ) break; // simulate the main AIG Ssc_GiaSimRound( pAig ); nRefined = Ssc_GiaClassesRefine( pAig ); if ( pPars->fVerbose ) Gia_ManEquivPrintClasses( pAig, 0, 0 ); if ( nRefined <= Gia_ManCandNum(pAig) / 100 ) break; } p->timeSimInit += Abc_Clock() - clk; // prepare user's AIG Gia_ManFillValue(pAig); Gia_ManConst0(pAig)->Value = 0; Gia_ManForEachCi( pAig, pObj, i ) pObj->Value = Gia_Obj2Lit( p->pFraig, Gia_ManCi(p->pFraig, i) ); // Gia_ManLevelNum(pAig); // prepare swept AIG (should be done after starting SAT solver in Ssc_ManStart) Gia_ManHashStart( p->pFraig ); // perform sweeping Ssc_GiaResetPiPattern( pAig, pPars->nWords ); Ssc_GiaSavePiPattern( pAig, p->vPivot ); Gia_ManForEachCand( pAig, pObj, i ) { if ( pAig->iPatsPi == 64 * pPars->nWords ) { clk = Abc_Clock(); Ssc_GiaSimRound( pAig ); Ssc_GiaClassesRefine( pAig ); if ( pPars->fVerbose ) Gia_ManEquivPrintClasses( pAig, 0, 0 ); Ssc_GiaClassesCheckPairs( pAig, p->vDisPairs ); Vec_IntClear( p->vDisPairs ); // prepare next patterns Ssc_GiaResetPiPattern( pAig, pPars->nWords ); Ssc_GiaSavePiPattern( pAig, p->vPivot ); p->timeSimSat += Abc_Clock() - clk; //printf( "\n" ); } if ( Gia_ObjIsAnd(pObj) ) pObj->Value = Gia_ManHashAnd( p->pFraig, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) ); if ( !Gia_ObjHasRepr(pAig, i) ) continue; pRepr = Gia_ObjReprObj(pAig, i); if ( (int)pObj->Value == Abc_LitNotCond( pRepr->Value, pRepr->fPhase ^ pObj->fPhase ) ) { Gia_ObjSetProved( pAig, i ); continue; } assert( Abc_Lit2Var(pRepr->Value) != Abc_Lit2Var(pObj->Value) ); fCompl = pRepr->fPhase ^ pObj->fPhase ^ Abc_LitIsCompl(pRepr->Value) ^ Abc_LitIsCompl(pObj->Value); // perform SAT call clk = Abc_Clock(); p->nSatCalls++; status = Ssc_ManCheckEquivalence( p, Abc_Lit2Var(pRepr->Value), Abc_Lit2Var(pObj->Value), fCompl ); if ( status == l_False ) { p->nSatCallsUnsat++; pObj->Value = Abc_LitNotCond( pRepr->Value, pRepr->fPhase ^ pObj->fPhase ); Gia_ObjSetProved( pAig, i ); } else if ( status == l_True ) { p->nSatCallsSat++; Ssc_GiaSavePiPattern( pAig, p->vPattern ); Vec_IntPush( p->vDisPairs, Gia_ObjRepr(p->pAig, i) ); Vec_IntPush( p->vDisPairs, i ); // printf( "Try %2d and %2d: ", Gia_ObjRepr(p->pAig, i), i ); // Vec_IntPrint( p->vPattern ); if ( Gia_ObjRepr(p->pAig, i) > 0 ) Ssc_GiaResimulateOneClass( p, Gia_ObjRepr(p->pAig, i), i ); } else if ( status == l_Undef ) p->nSatCallsUndec++; else assert( 0 ); p->timeSat += Abc_Clock() - clk; } if ( pAig->iPatsPi > 1 ) { clk = Abc_Clock(); while ( pAig->iPatsPi < 64 * pPars->nWords ) Ssc_GiaSavePiPattern( pAig, p->vPivot ); Ssc_GiaSimRound( pAig ); Ssc_GiaClassesRefine( pAig ); if ( pPars->fVerbose ) Gia_ManEquivPrintClasses( pAig, 0, 0 ); Ssc_GiaClassesCheckPairs( pAig, p->vDisPairs ); Vec_IntClear( p->vDisPairs ); p->timeSimSat += Abc_Clock() - clk; } // Gia_ManEquivPrintClasses( pAig, 1, 0 ); // Gia_ManPrint( pAig ); // generate the resulting AIG pResult = Gia_ManEquivReduce( pAig, 0, 0, 1, 0 ); if ( pResult == NULL ) { printf( "There is no equivalences.\n" ); ABC_FREE( pAig->pReprs ); ABC_FREE( pAig->pNexts ); pResult = Gia_ManDup( pAig ); } pResult = Gia_ManCleanup( pTemp = pResult ); Gia_ManStop( pTemp ); p->timeTotal = Abc_Clock() - clkTotal; if ( pPars->fVerbose ) Ssc_ManPrintStats( p ); Ssc_ManStop( p ); // count the number of representatives if ( pPars->fVerbose ) { Abc_Print( 1, "Reduction in AIG nodes:%8d ->%8d (%6.2f %%). ", Gia_ManAndNum(pAig), Gia_ManAndNum(pResult), 100.0 - 100.0 * Gia_ManAndNum(pResult) / Gia_ManAndNum(pAig) ); Abc_PrintTime( 1, "Time", Abc_Clock() - clkTotal ); } return pResult; }