ABC_NAMESPACE_IMPL_START //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// //////////////////////////////////////////////////////////////////////// /**Function************************************************************* Synopsis [Converts old ABC network into new ABC network.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ Nwk_Man_t * Abc_NtkToNtkNew( Abc_Ntk_t * pNtk ) { Vec_Ptr_t * vNodes; Nwk_Man_t * pNtkNew; Nwk_Obj_t * pObjNew; Abc_Obj_t * pObj, * pFanin; int i, k; if ( !Abc_NtkIsLogic(pNtk) ) { fprintf( stdout, "This is not a logic network.\n" ); return 0; } // convert into the AIG if ( !Abc_NtkToAig(pNtk) ) { fprintf( stdout, "Converting to AIGs has failed.\n" ); return 0; } assert( Abc_NtkHasAig(pNtk) ); // construct the network pNtkNew = Nwk_ManAlloc(); pNtkNew->pName = Extra_UtilStrsav( pNtk->pName ); pNtkNew->pSpec = Extra_UtilStrsav( pNtk->pSpec ); Abc_NtkForEachCi( pNtk, pObj, i ) pObj->pCopy = (Abc_Obj_t *)Nwk_ManCreateCi( pNtkNew, Abc_ObjFanoutNum(pObj) ); vNodes = Abc_NtkDfs( pNtk, 1 ); Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i ) { pObjNew = Nwk_ManCreateNode( pNtkNew, Abc_ObjFaninNum(pObj), Abc_ObjFanoutNum(pObj) ); Abc_ObjForEachFanin( pObj, pFanin, k ) Nwk_ObjAddFanin( pObjNew, (Nwk_Obj_t *)pFanin->pCopy ); pObjNew->pFunc = Hop_Transfer( (Hop_Man_t *)pNtk->pManFunc, pNtkNew->pManHop, (Hop_Obj_t *)pObj->pData, Abc_ObjFaninNum(pObj) ); pObj->pCopy = (Abc_Obj_t *)pObjNew; }
/**Function************************************************************* Synopsis [Returns the array of CI IDs.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ Vec_Int_t * Abc_NtkGetCiSatVarNums( Abc_Ntk_t * pNtk ) { Vec_Int_t * vCiIds; Abc_Obj_t * pObj; int i; vCiIds = Vec_IntAlloc( Abc_NtkCiNum(pNtk) ); Abc_NtkForEachCi( pNtk, pObj, i ) Vec_IntPush( vCiIds, (int)(ABC_PTRINT_T)pObj->pCopy ); return vCiIds; }
/**Function************************************************************* Synopsis [Derives GIA manager using special pins to denote box boundaries.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ Gia_Man_t * Abc_NtkTestPinDeriveGia( Abc_Ntk_t * pNtk, int fWhiteBoxOnly, int fVerbose ) { Gia_Man_t * pTemp; Gia_Man_t * pGia = NULL; Vec_Ptr_t * vNodes; Abc_Obj_t * pObj, * pFanin; int i, k, iPinLit = 0; // prepare logic network assert( Abc_NtkIsLogic(pNtk) ); Abc_NtkToAig( pNtk ); // construct GIA Abc_NtkFillTemp( pNtk ); pGia = Gia_ManStart( Abc_NtkObjNumMax(pNtk) ); Gia_ManHashAlloc( pGia ); // create primary inputs Abc_NtkForEachCi( pNtk, pObj, i ) pObj->iTemp = Gia_ManAppendCi(pGia); // create internal nodes in a topologic order from white boxes vNodes = Abc_NtkDfs( pNtk, 0 ); Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i ) { // input side if ( !fWhiteBoxOnly || Abc_NodeIsWhiteBox(pObj) ) { // create special pintype for this node iPinLit = Gia_ManAppendPinType( pGia, 1 ); // create input pins Abc_ObjForEachFanin( pObj, pFanin, k ) pFanin->iTemp = Gia_ManAppendAnd( pGia, pFanin->iTemp, iPinLit ); } // perform GIA construction pObj->iTemp = Abc_NtkTestTimNodeStrash( pGia, pObj ); // output side if ( !fWhiteBoxOnly || Abc_NodeIsWhiteBox(pObj) ) { // create special pintype for this node iPinLit = Gia_ManAppendPinType( pGia, 1 ); // create output pins pObj->iTemp = Gia_ManAppendAnd( pGia, pObj->iTemp, iPinLit ); } } Vec_PtrFree( vNodes ); // create primary outputs Abc_NtkForEachCo( pNtk, pObj, i ) pObj->iTemp = Gia_ManAppendCo( pGia, Abc_ObjFanin0(pObj)->iTemp ); // finalize GIA Gia_ManHashStop( pGia ); Gia_ManSetRegNum( pGia, 0 ); // clean up GIA pGia = Gia_ManCleanup( pTemp = pGia ); Gia_ManStop( pTemp ); return pGia; }
/**Function************************************************************* Synopsis [Creates the mapped network.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ Abc_Ntk_t * Abc_NtkFromMapSuperChoice( Map_Man_t * pMan, Abc_Ntk_t * pNtk ) { extern Abc_Ntk_t * Abc_NtkMulti( Abc_Ntk_t * pNtk, int nThresh, int nFaninMax, int fCnf, int fMulti, int fSimple, int fFactor ); ProgressBar * pProgress; Abc_Ntk_t * pNtkNew, * pNtkNew2; Abc_Obj_t * pNode; int i; // save the pointer to the mapped nodes Abc_NtkForEachCi( pNtk, pNode, i ) pNode->pNext = pNode->pCopy; Abc_NtkForEachPo( pNtk, pNode, i ) pNode->pNext = pNode->pCopy; Abc_NtkForEachNode( pNtk, pNode, i ) pNode->pNext = pNode->pCopy; // duplicate the network pNtkNew2 = Abc_NtkDup( pNtk ); pNtkNew = Abc_NtkMulti( pNtkNew2, 0, 20, 0, 0, 1, 0 ); if ( !Abc_NtkBddToSop( pNtkNew, -1, ABC_INFINITY ) ) { printf( "Abc_NtkFromMapSuperChoice(): Converting to SOPs has failed.\n" ); return NULL; } // set the old network to point to the new network Abc_NtkForEachCi( pNtk, pNode, i ) pNode->pCopy = pNode->pCopy->pCopy; Abc_NtkForEachPo( pNtk, pNode, i ) pNode->pCopy = pNode->pCopy->pCopy; Abc_NtkForEachNode( pNtk, pNode, i ) pNode->pCopy = pNode->pCopy->pCopy; Abc_NtkDelete( pNtkNew2 ); // set the pointers from the mapper to the new nodes Abc_NtkForEachCi( pNtk, pNode, i ) { Map_NodeSetData( Map_ManReadInputs(pMan)[i], 0, (char *)Abc_NtkCreateNodeInv(pNtkNew,pNode->pCopy) ); Map_NodeSetData( Map_ManReadInputs(pMan)[i], 1, (char *)pNode->pCopy ); }
/**Function************************************************************* Synopsis [Sets up the SAT sat_solver.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ int Abc_NtkMiterSatCreateInt( sat_solver * pSat, Abc_Ntk_t * pNtk ) { Abc_Obj_t * pNode, * pFanin, * pNodeC, * pNodeT, * pNodeE; Vec_Ptr_t * vNodes, * vSuper; Vec_Int_t * vVars; int i, k, fUseMuxes = 1; // int fOrderCiVarsFirst = 0; int RetValue = 0; assert( Abc_NtkIsStrash(pNtk) ); // clean the CI node pointers Abc_NtkForEachCi( pNtk, pNode, i ) pNode->pCopy = NULL; // start the data structures vNodes = Vec_PtrAlloc( 1000 ); // the nodes corresponding to vars in the sat_solver vSuper = Vec_PtrAlloc( 100 ); // the nodes belonging to the given implication supergate vVars = Vec_IntAlloc( 100 ); // the temporary array for variables in the clause // add the clause for the constant node pNode = Abc_AigConst1(pNtk); pNode->fMarkA = 1; pNode->pCopy = (Abc_Obj_t *)(ABC_PTRINT_T)vNodes->nSize; Vec_PtrPush( vNodes, pNode ); Abc_NtkClauseTriv( pSat, pNode, vVars ); /* // add the PI variables first Abc_NtkForEachCi( pNtk, pNode, i ) { pNode->fMarkA = 1; pNode->pCopy = (Abc_Obj_t *)vNodes->nSize; Vec_PtrPush( vNodes, pNode ); } */ // collect the nodes that need clauses and top-level assignments Vec_PtrClear( vSuper ); Abc_NtkForEachCo( pNtk, pNode, i ) { // get the fanin pFanin = Abc_ObjFanin0(pNode); // create the node's variable if ( pFanin->fMarkA == 0 ) { pFanin->fMarkA = 1; pFanin->pCopy = (Abc_Obj_t *)(ABC_PTRINT_T)vNodes->nSize; Vec_PtrPush( vNodes, pFanin ); } // add the trivial clause Vec_PtrPush( vSuper, Abc_ObjChild0(pNode) ); }
Vec_Ptr_t * Abc_NtkAssignIDs2( Abc_Ntk_t * pNtk ) { Vec_Ptr_t * vNodes; Abc_Obj_t * pObj; int i; Abc_NtkCleanCopy( pNtk ); Abc_NtkForEachCi( pNtk, pObj, i ) pObj->iTemp = i; vNodes = Vec_PtrAlloc( Abc_NtkNodeNum(pNtk) ); Abc_NtkForEachNode( pNtk, pObj, i ) { pObj->iTemp = Abc_NtkCiNum(pNtk) + Vec_PtrSize(vNodes); Vec_PtrPush( vNodes, pObj ); }
/**Function************************************************************* Synopsis [Tranfers names to the old network.] Description [Assumes that the new nodes are attached using pObj->pCopy.] SideEffects [] SeeAlso [] ***********************************************************************/ void Abc_NtkTrasferNames( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkNew ) { Abc_Obj_t * pObj; int i; assert( Abc_NtkPiNum(pNtk) == Abc_NtkPiNum(pNtkNew) ); assert( Abc_NtkPoNum(pNtk) == Abc_NtkPoNum(pNtkNew) ); assert( Abc_NtkBoxNum(pNtk) == Abc_NtkBoxNum(pNtkNew) ); assert( Nm_ManNumEntries(pNtk->pManName) > 0 ); assert( Nm_ManNumEntries(pNtkNew->pManName) == 0 ); // copy the CI/CO/box names Abc_NtkForEachCi( pNtk, pObj, i ) Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(Abc_ObjFanout0Ntk(pObj)), NULL ); Abc_NtkForEachCo( pNtk, pObj, i ) Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(Abc_ObjFanin0Ntk(pObj)), NULL ); Abc_NtkForEachBox( pNtk, pObj, i ) Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL ); }
/**Function************************************************************* Synopsis [Converts the network from the AIG manager into ABC.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ Hop_Man_t * Abc_NtkToMini( Abc_Ntk_t * pNtk ) { Hop_Man_t * pMan; Abc_Obj_t * pObj; int i; // create the manager pMan = Hop_ManStart(); // transfer the pointers to the basic nodes Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)Hop_ManConst1(pMan); Abc_NtkForEachCi( pNtk, pObj, i ) pObj->pCopy = (Abc_Obj_t *)Hop_ObjCreatePi(pMan); // perform the conversion of the internal nodes (assumes DFS ordering) Abc_NtkForEachNode( pNtk, pObj, i ) pObj->pCopy = (Abc_Obj_t *)Hop_And( pMan, (Hop_Obj_t *)Abc_ObjChild0Copy(pObj), (Hop_Obj_t *)Abc_ObjChild1Copy(pObj) ); // create the POs Abc_NtkForEachCo( pNtk, pObj, i ) Hop_ObjCreatePo( pMan, (Hop_Obj_t *)Abc_ObjChild0Copy(pObj) ); Hop_ManCleanup( pMan ); return pMan; }
/**Function************************************************************* Synopsis [Derive BDD of the characteristic function.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ DdNode * Abc_ResBuildBdd( Abc_Ntk_t * pNtk, DdManager * dd ) { Vec_Ptr_t * vNodes, * vBdds, * vLocals; Abc_Obj_t * pObj, * pFanin; DdNode * bFunc, * bPart, * bTemp, * bVar; int i, k; assert( Abc_NtkIsSopLogic(pNtk) ); assert( Abc_NtkCoNum(pNtk) <= 3 ); vBdds = Vec_PtrStart( Abc_NtkObjNumMax(pNtk) ); Abc_NtkForEachCi( pNtk, pObj, i ) Vec_PtrWriteEntry( vBdds, Abc_ObjId(pObj), Cudd_bddIthVar(dd, i) ); // create internal node BDDs vNodes = Abc_NtkDfs( pNtk, 0 ); vLocals = Vec_PtrAlloc( 6 ); Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i ) { if ( Abc_ObjFaninNum(pObj) == 0 ) { bFunc = Cudd_NotCond( Cudd_ReadOne(dd), Abc_SopIsConst0((char *)pObj->pData) ); Cudd_Ref( bFunc ); Vec_PtrWriteEntry( vBdds, Abc_ObjId(pObj), bFunc ); continue; } Vec_PtrClear( vLocals ); Abc_ObjForEachFanin( pObj, pFanin, k ) Vec_PtrPush( vLocals, Vec_PtrEntry(vBdds, Abc_ObjId(pFanin)) ); bFunc = Abc_ConvertSopToBdd( dd, (char *)pObj->pData, (DdNode **)Vec_PtrArray(vLocals) ); Cudd_Ref( bFunc ); Vec_PtrWriteEntry( vBdds, Abc_ObjId(pObj), bFunc ); } Vec_PtrFree( vLocals ); // create char function bFunc = Cudd_ReadOne( dd ); Cudd_Ref( bFunc ); Abc_NtkForEachCo( pNtk, pObj, i ) { bVar = Cudd_bddIthVar( dd, i + Abc_NtkCiNum(pNtk) ); bTemp = (DdNode *)Vec_PtrEntry( vBdds, Abc_ObjFaninId0(pObj) ); bPart = Cudd_bddXnor( dd, bTemp, bVar ); Cudd_Ref( bPart ); bFunc = Cudd_bddAnd( dd, bTemp = bFunc, bPart ); Cudd_Ref( bFunc ); Cudd_RecursiveDeref( dd, bTemp ); Cudd_RecursiveDeref( dd, bPart ); }
/**Function************************************************************* Synopsis [Constructs the ABC network after mapping.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ Abc_Ntk_t * Ivy_ManFpgaToAbc( Abc_Ntk_t * pNtk, Ivy_Man_t * pMan ) { Abc_Ntk_t * pNtkNew; Abc_Obj_t * pObjAbc, * pObj; Ivy_Obj_t * pObjIvy; Vec_Int_t * vNodes; int i; // start mapping from Ivy into Abc pMan->pCopy = Vec_PtrStart( Ivy_ManObjIdMax(pMan) + 1 ); // start the new ABC network pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_AIG ); // transfer the pointers to the basic nodes Abc_ObjSetIvy2Abc( pMan, Ivy_ManConst1(pMan)->Id, Abc_NtkCreateNodeConst1(pNtkNew) ); Abc_NtkForEachCi( pNtkNew, pObjAbc, i ) Abc_ObjSetIvy2Abc( pMan, Ivy_ManPi(pMan, i)->Id, pObjAbc ); // recursively construct the network vNodes = Vec_IntAlloc( 100 ); Ivy_ManForEachPo( pMan, pObjIvy, i ) { // get the new ABC node corresponding to the old fanin of the PO in IVY pObjAbc = Ivy_ManToAbcFast_rec( pNtkNew, pMan, Ivy_ObjFanin0(pObjIvy), vNodes ); // consider the case of complemented fanin of the PO if ( Ivy_ObjFaninC0(pObjIvy) ) // complement { if ( Abc_ObjIsCi(pObjAbc) ) pObjAbc = Abc_NtkCreateNodeInv( pNtkNew, pObjAbc ); else { // clone the node pObj = Abc_NtkCloneObj( pObjAbc ); // set complemented functions pObj->pData = Hop_Not( pObjAbc->pData ); // return the new node pObjAbc = pObj; } } Abc_ObjAddFanin( Abc_NtkCo(pNtkNew, i), pObjAbc ); }
/**Function************************************************************* Synopsis [Computes symmetries for a single output function.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ void Sim_SymmsStructCompute( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMatrs, Vec_Ptr_t * vSuppFun ) { Vec_Ptr_t * vNodes; Abc_Obj_t * pTemp; int * pMap, i; assert( Abc_NtkCiNum(pNtk) + 10 < (1<<16) ); // get the structural support pNtk->vSupps = Sim_ComputeStrSupp( pNtk ); // set elementary info for the CIs Abc_NtkForEachCi( pNtk, pTemp, i ) SIM_SET_SYMMS( pTemp, Vec_IntAlloc(0) ); // create the map of CI ids into their numbers pMap = Sim_SymmsCreateMap( pNtk ); // collect the nodes in the TFI cone of this output vNodes = Abc_NtkDfs( pNtk, 0 ); Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pTemp, i ) { // if ( Abc_NodeIsConst(pTemp) ) // continue; Sim_SymmsStructComputeOne( pNtk, pTemp, pMap ); }
/**Function************************************************************* Synopsis [Computes structural supports.] Description [Supports are returned as an array of bit strings, one for each CO.] SideEffects [] SeeAlso [] ***********************************************************************/ Vec_Ptr_t * Sim_ComputeStrSupp( Abc_Ntk_t * pNtk ) { Vec_Ptr_t * vSuppStr; Abc_Obj_t * pNode; unsigned * pSimmNode, * pSimmNode1, * pSimmNode2; int nSuppWords, i, k; // allocate room for structural supports nSuppWords = SIM_NUM_WORDS( Abc_NtkCiNum(pNtk) ); vSuppStr = Sim_UtilInfoAlloc( Abc_NtkObjNumMax(pNtk), nSuppWords, 1 ); // assign the structural support to the PIs Abc_NtkForEachCi( pNtk, pNode, i ) Sim_SuppStrSetVar( vSuppStr, pNode, i ); // derive the structural supports of the internal nodes Abc_NtkForEachNode( pNtk, pNode, i ) { // if ( Abc_NodeIsConst(pNode) ) // continue; pSimmNode = vSuppStr->pArray[ pNode->Id ]; pSimmNode1 = vSuppStr->pArray[ Abc_ObjFaninId0(pNode) ]; pSimmNode2 = vSuppStr->pArray[ Abc_ObjFaninId1(pNode) ]; for ( k = 0; k < nSuppWords; k++ ) pSimmNode[k] = pSimmNode1[k] | pSimmNode2[k]; }
ABC_NAMESPACE_IMPL_START //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// //////////////////////////////////////////////////////////////////////// /**Function************************************************************* Synopsis [] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ Vec_Ptr_t * Abc_NtkAssignIDs( Abc_Ntk_t * pNtk ) { Vec_Ptr_t * vNodes; Abc_Obj_t * pObj; int i; vNodes = Abc_NtkDfs( pNtk, 0 ); Abc_NtkCleanCopy( pNtk ); Abc_NtkForEachCi( pNtk, pObj, i ) pObj->iTemp = i; Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i ) pObj->iTemp = Abc_NtkCiNum(pNtk) + i; Abc_NtkForEachCo( pNtk, pObj, i ) pObj->iTemp = Abc_NtkCiNum(pNtk) + Vec_PtrSize(vNodes) + i; return vNodes; }
Mini_Aig_t * Abc_NtkToMiniAig( Abc_Ntk_t * pNtk ) { Mini_Aig_t * p; Abc_Obj_t * pObj; int i; assert( Abc_NtkIsStrash(pNtk) ); // create the manager p = Mini_AigStart(); // create mapping from MiniAIG into ABC objects Abc_NtkCleanCopy( pNtk ); Abc_AigConst1(pNtk)->iTemp = Mini_AigLitConst1(); // create primary inputs Abc_NtkForEachCi( pNtk, pObj, i ) pObj->iTemp = Mini_AigCreatePi(p); // create internal nodes Abc_NtkForEachNode( pNtk, pObj, i ) pObj->iTemp = Mini_AigAnd( p, Abc_NodeFanin0Copy2(pObj), Abc_NodeFanin1Copy2(pObj) ); // create primary outputs Abc_NtkForEachCo( pNtk, pObj, i ) pObj->iTemp = Mini_AigCreatePo( p, Abc_NodeFanin0Copy2(pObj) ); // set registers Mini_AigSetRegNum( p, Abc_NtkLatchNum(pNtk) ); return p; }
/**Function************************************************************* Synopsis [Sets the final nodes to point to the original nodes.] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ void Abc_NtkTransferPointers( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkAig ) { Abc_Obj_t * pObj; Ivy_Obj_t * pObjIvy, * pObjFraig; int i; pObj = Abc_AigConst1(pNtk); pObj->pCopy = Abc_AigConst1(pNtkAig); Abc_NtkForEachCi( pNtk, pObj, i ) pObj->pCopy = Abc_NtkCi(pNtkAig, i); Abc_NtkForEachCo( pNtk, pObj, i ) pObj->pCopy = Abc_NtkCo(pNtkAig, i); Abc_NtkForEachLatch( pNtk, pObj, i ) pObj->pCopy = Abc_NtkBox(pNtkAig, i); Abc_NtkForEachNode( pNtk, pObj, i ) { pObjIvy = (Ivy_Obj_t *)pObj->pCopy; if ( pObjIvy == NULL ) continue; pObjFraig = Ivy_ObjEquiv( pObjIvy ); if ( pObjFraig == NULL ) continue; pObj->pCopy = Abc_EdgeToNode( pNtkAig, Ivy_Regular(pObjFraig)->TravId ); pObj->pCopy = Abc_ObjNotCond( pObj->pCopy, Ivy_IsComplement(pObjFraig) ); }
/**Function************************************************************* Synopsis [] Description [] SideEffects [] SeeAlso [] ***********************************************************************/ int Abc_NtkMfs( Abc_Ntk_t * pNtk, Mfs_Par_t * pPars ) { extern Aig_Man_t * Abc_NtkToDar( Abc_Ntk_t * pNtk, int fExors, int fRegisters ); Bdc_Par_t Pars = {0}, * pDecPars = &Pars; ProgressBar * pProgress; Mfs_Man_t * p; Abc_Obj_t * pObj; Vec_Vec_t * vLevels; Vec_Ptr_t * vNodes; int i, k, nNodes, nFaninMax; abctime clk = Abc_Clock(), clk2; int nTotalNodesBeg = Abc_NtkNodeNum(pNtk); int nTotalEdgesBeg = Abc_NtkGetTotalFanins(pNtk); assert( Abc_NtkIsLogic(pNtk) ); nFaninMax = Abc_NtkGetFaninMax(pNtk); if ( pPars->fResub ) { if ( nFaninMax > 8 ) { printf( "Nodes with more than %d fanins will not be processed.\n", 8 ); nFaninMax = 8; } } else { if ( nFaninMax > MFS_FANIN_MAX ) { printf( "Nodes with more than %d fanins will not be processed.\n", MFS_FANIN_MAX ); nFaninMax = MFS_FANIN_MAX; } } // perform the network sweep // Abc_NtkSweep( pNtk, 0 ); // convert into the AIG if ( !Abc_NtkToAig(pNtk) ) { fprintf( stdout, "Converting to AIGs has failed.\n" ); return 0; } assert( Abc_NtkHasAig(pNtk) ); // start the manager p = Mfs_ManAlloc( pPars ); p->pNtk = pNtk; p->nFaninMax = nFaninMax; // precomputer power-aware metrics if ( pPars->fPower ) { extern Vec_Int_t * Abc_NtkPowerEstimate( Abc_Ntk_t * pNtk, int fProbOne ); if ( pPars->fResub ) p->vProbs = Abc_NtkPowerEstimate( pNtk, 0 ); else p->vProbs = Abc_NtkPowerEstimate( pNtk, 1 ); #if 0 printf( "Total switching before = %7.2f.\n", Abc_NtkMfsTotalSwitching(pNtk) ); #else p->TotalSwitchingBeg = Abc_NtkMfsTotalSwitching(pNtk); #endif } if ( pNtk->pExcare ) { Abc_Ntk_t * pTemp; if ( Abc_NtkPiNum((Abc_Ntk_t *)pNtk->pExcare) != Abc_NtkCiNum(pNtk) ) printf( "The PI count of careset (%d) and logic network (%d) differ. Careset is not used.\n", Abc_NtkPiNum((Abc_Ntk_t *)pNtk->pExcare), Abc_NtkCiNum(pNtk) ); else { pTemp = Abc_NtkStrash( (Abc_Ntk_t *)pNtk->pExcare, 0, 0, 0 ); p->pCare = Abc_NtkToDar( pTemp, 0, 0 ); Abc_NtkDelete( pTemp ); p->vSuppsInv = Aig_ManSupportsInverse( p->pCare ); } } if ( p->pCare != NULL ) printf( "Performing optimization with %d external care clauses.\n", Aig_ManCoNum(p->pCare) ); // prepare the BDC manager if ( !pPars->fResub ) { pDecPars->nVarsMax = (nFaninMax < 3) ? 3 : nFaninMax; pDecPars->fVerbose = pPars->fVerbose; p->vTruth = Vec_IntAlloc( 0 ); p->pManDec = Bdc_ManAlloc( pDecPars ); } // label the register outputs if ( p->pCare ) { Abc_NtkForEachCi( pNtk, pObj, i ) pObj->pData = (void *)(ABC_PTRUINT_T)i; } // compute levels Abc_NtkLevel( pNtk ); Abc_NtkStartReverseLevels( pNtk, pPars->nGrowthLevel ); // compute don't-cares for each node nNodes = 0; p->nTotalNodesBeg = nTotalNodesBeg; p->nTotalEdgesBeg = nTotalEdgesBeg; if ( pPars->fResub ) { #if 0 printf( "TotalSwitching (%7.2f --> ", Abc_NtkMfsTotalSwitching(pNtk) ); #endif if (pPars->fPower) { Abc_NtkMfsPowerResub( p, pPars); } else { pProgress = Extra_ProgressBarStart( stdout, Abc_NtkObjNumMax(pNtk) ); Abc_NtkForEachNode( pNtk, pObj, i ) { if ( p->pPars->nDepthMax && (int)pObj->Level > p->pPars->nDepthMax ) continue; if ( Abc_ObjFaninNum(pObj) < 2 || Abc_ObjFaninNum(pObj) > nFaninMax ) continue; if ( !p->pPars->fVeryVerbose ) Extra_ProgressBarUpdate( pProgress, i, NULL ); if ( pPars->fResub ) Abc_NtkMfsResub( p, pObj ); else Abc_NtkMfsNode( p, pObj ); } Extra_ProgressBarStop( pProgress ); #if 0 printf( " %7.2f )\n", Abc_NtkMfsTotalSwitching(pNtk) ); #endif } } else
ABC_NAMESPACE_IMPL_START // For description of Binary BLIF format, refer to "abc/src/aig/bbl/bblif.h" //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////// /// FUNCTION DEFINITIONS /// //////////////////////////////////////////////////////////////////////// /**Fnction************************************************************* Synopsis [Construct manager from the ABC network.] Description [In the ABC network each object has a unique integer ID. This ID is used when we construct objects of the BBLIF manager corresponding to each object of the ABC network. The objects can be added to the manager in any order (although below they are added in the topological order), but by the time fanin/fanout connections are created, corresponding objects are already constructed. In the end the checking procedure is called.] SideEffects [] SeeAlso [] ***********************************************************************/ Bbl_Man_t * Bbl_ManFromAbc( Abc_Ntk_t * pNtk ) { Bbl_Man_t * p; Vec_Ptr_t * vNodes; Abc_Obj_t * pObj, * pFanin; int i, k; assert( Abc_NtkIsSopLogic(pNtk) ); // start the data manager p = Bbl_ManStart( Abc_NtkName(pNtk) ); // collect internal nodes to be added vNodes = Abc_NtkDfs( pNtk, 0 ); // create combinational inputs Abc_NtkForEachCi( pNtk, pObj, i ) Bbl_ManCreateObject( p, BBL_OBJ_CI, Abc_ObjId(pObj), 0, NULL ); // create internal nodes Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i ) Bbl_ManCreateObject( p, BBL_OBJ_NODE, Abc_ObjId(pObj), Abc_ObjFaninNum(pObj), (char *)pObj->pData ); // create combinational outputs Abc_NtkForEachCo( pNtk, pObj, i ) Bbl_ManCreateObject( p, BBL_OBJ_CO, Abc_ObjId(pObj), 1, NULL ); // create fanin/fanout connections for internal nodes Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i ) Abc_ObjForEachFanin( pObj, pFanin, k ) Bbl_ManAddFanin( p, Abc_ObjId(pObj), Abc_ObjId(pFanin) ); // create fanin/fanout connections for combinational outputs Abc_NtkForEachCo( pNtk, pObj, i ) Abc_ObjForEachFanin( pObj, pFanin, k ) Bbl_ManAddFanin( p, Abc_ObjId(pObj), Abc_ObjId(pFanin) ); Vec_PtrFree( vNodes ); // sanity check Bbl_ManCheck( p ); return p; }