/** * Perform initialization services required at the Early Init POST time point. * * Execution Cache, HyperTransport, and AP Init advanced services are performed. * * @param[in] EarlyParams The interface struct for all early services * * @return The most severe AGESA_STATUS returned by any called service. * */ AGESA_STATUS AmdInitEarly ( IN OUT AMD_EARLY_PARAMS *EarlyParams ) { AGESA_STATUS CalledAgesaStatus; AGESA_STATUS EarlyInitStatus; WARM_RESET_REQUEST Request; UINT8 PrevRequestBit; UINT8 PrevStateBits; IDS_PERF_TIMESTAMP (TP_BEGINPROCAMDINITEARLY, &EarlyParams->StdHeader); AGESA_TESTPOINT (TpIfAmdInitEarlyEntry, &EarlyParams->StdHeader); EarlyInitStatus = AGESA_SUCCESS; // Setup ROM execution cache IDS_HDT_CONSOLE (MAIN_FLOW, "AllocateExecutionCache: Start\n"); CalledAgesaStatus = AllocateExecutionCache (&EarlyParams->StdHeader, &EarlyParams->CacheRegion[0]); IDS_HDT_CONSOLE (MAIN_FLOW, "AllocateExecutionCache: End\n"); if (CalledAgesaStatus > EarlyInitStatus) { EarlyInitStatus = CalledAgesaStatus; } IDS_HDT_CONSOLE_DEBUG_CODE ( { extern CHAR8 *BldOptDebugOutput[]; UINT8 i; for (i = 0; BldOptDebugOutput[i] != NULL; i++) { IDS_HDT_CONSOLE (MAIN_FLOW, "\t%s\n", BldOptDebugOutput[i]); } } )
/** * Perform initialization services required at the Early Init POST time point. * * Execution Cache, HyperTransport, C1e, and AP Init advanced services are performed. * * @param[in, out] RecoveryParams The interface struct for Recovery services * * @return The most severe AGESA_STATUS returned by any called service. * */ AGESA_STATUS AmdInitRecovery ( IN OUT AMD_RECOVERY_PARAMS *RecoveryParams ) { AGESA_STATUS AgesaStatus; AGESA_STATUS CalledAgesaStatus; AGESA_TESTPOINT (TpIfAmdInitRecoveryEntry, &RecoveryParams->StdHeader); ASSERT (RecoveryParams != NULL); AgesaStatus = AGESA_SUCCESS; // Setup ROM execution cache CalledAgesaStatus = AllocateExecutionCache (&RecoveryParams->StdHeader, &RecoveryParams->CacheRegion[0]); if (CalledAgesaStatus > AgesaStatus) { AgesaStatus = CalledAgesaStatus; } CalledAgesaStatus = AmdHtInitRecovery (&RecoveryParams->StdHeader); if (CalledAgesaStatus > AgesaStatus) { AgesaStatus = CalledAgesaStatus; } CalledAgesaStatus = AmdCpuRecovery ((AMD_CPU_RECOVERY_PARAMS *) &RecoveryParams->StdHeader); if (CalledAgesaStatus > AgesaStatus) { AgesaStatus = CalledAgesaStatus; } CalledAgesaStatus = AmdMemRecovery (RecoveryParams->MemConfig.MemData); if (CalledAgesaStatus > AgesaStatus) { AgesaStatus = CalledAgesaStatus; } CalledAgesaStatus = AmdGnbRecovery (&RecoveryParams->StdHeader); if (CalledAgesaStatus > AgesaStatus) { AgesaStatus = CalledAgesaStatus; } AGESA_TESTPOINT (TpIfAmdInitRecoveryExit, &RecoveryParams->StdHeader); return AgesaStatus; }
/** * Main entry point for the AMD_INIT_RESET function. * * This entry point is responsible for establishing the HT links to the program * ROM and for performing basic processor initialization. * * @param[in,out] ResetParams Required input parameters for the AMD_INIT_RESET * entry point. * * @return Aggregated status across all internal AMD reset calls invoked. * */ AGESA_STATUS AmdInitReset ( IN OUT AMD_RESET_PARAMS *ResetParams ) { AGESA_STATUS AgesaStatus; AGESA_STATUS CalledAgesaStatus; WARM_RESET_REQUEST Request; UINT8 PrevRequestBit; UINT8 PrevStateBits; AgesaStatus = AGESA_SUCCESS; // Setup ROM execution cache CalledAgesaStatus = AllocateExecutionCache (&ResetParams->StdHeader, &ResetParams->CacheRegion[0]); if (CalledAgesaStatus > AgesaStatus) { AgesaStatus = CalledAgesaStatus; } // IDS_EXTENDED_HOOK (IDS_INIT_RESET_BEFORE, NULL, NULL, &ResetParams->StdHeader); // Init Debug Print function IDS_HDT_CONSOLE_INIT (&ResetParams->StdHeader); IDS_HDT_CONSOLE (MAIN_FLOW, "\nAmdInitReset: Start\n\n"); IDS_HDT_CONSOLE (MAIN_FLOW, "\n*** %s ***\n\n", (CHAR8 *)&UserOptions.VersionString); AGESA_TESTPOINT (TpIfAmdInitResetEntry, &ResetParams->StdHeader); ASSERT (ResetParams != NULL); PrevRequestBit = FALSE; PrevStateBits = WR_STATE_COLD; if (IsBsp (&ResetParams->StdHeader, &AgesaStatus)) { CalledAgesaStatus = BldoptFchFunction.InitReset (ResetParams); AgesaStatus = (CalledAgesaStatus > AgesaStatus) ? CalledAgesaStatus : AgesaStatus; } // If a previously requested warm reset cannot be triggered in the // current stage, store the previous state of request and reset the // request struct to the current post stage GetWarmResetFlag (&ResetParams->StdHeader, &Request); if (Request.RequestBit == TRUE) { if (Request.StateBits >= Request.PostStage) { PrevRequestBit = Request.RequestBit; PrevStateBits = Request.StateBits; Request.RequestBit = FALSE; Request.StateBits = Request.PostStage - 1; SetWarmResetFlag (&ResetParams->StdHeader, &Request); } } // Initialize the PCI MMIO access mechanism InitializePciMmio (&ResetParams->StdHeader); // Initialize Hyper Transport Registers if (HtOptionInitReset.HtInitReset != NULL) { IDS_HDT_CONSOLE (MAIN_FLOW, "HtInitReset: Start\n"); CalledAgesaStatus = HtOptionInitReset.HtInitReset (&ResetParams->StdHeader, &ResetParams->HtConfig); IDS_HDT_CONSOLE (MAIN_FLOW, "HtInitReset: End\n"); if (CalledAgesaStatus > AgesaStatus) { AgesaStatus = CalledAgesaStatus; } } // Warm Reset, should be at the end of AmdInitReset GetWarmResetFlag (&ResetParams->StdHeader, &Request); // If a warm reset is requested in the current post stage, trigger the // warm reset and ignore the previous request if (Request.RequestBit == TRUE) { if (Request.StateBits < Request.PostStage) { AgesaDoReset (WARM_RESET_WHENEVER, &ResetParams->StdHeader); } } else { // Otherwise, if there's a previous request, restore it // so that the subsequent post stage can trigger the warm reset if (PrevRequestBit == TRUE) { Request.RequestBit = PrevRequestBit; Request.StateBits = PrevStateBits; SetWarmResetFlag (&ResetParams->StdHeader, &Request); } } // Check for Cache As Ram Corruption IDS_CAR_CORRUPTION_CHECK (&ResetParams->StdHeader); IDS_HDT_CONSOLE (MAIN_FLOW, "\nAmdInitReset: End\n\n"); AGESA_TESTPOINT (TpIfAmdInitResetExit, &ResetParams->StdHeader); return AgesaStatus; }
/** * Perform initialization services required at the Early Init POST time point. * * Execution Cache, HyperTransport, and AP Init advanced services are performed. * * @param[in] EarlyParams The interface struct for all early services * * @return The most severe AGESA_STATUS returned by any called service. * */ AGESA_STATUS AmdInitEarly ( IN OUT AMD_EARLY_PARAMS *EarlyParams ) { AGESA_STATUS CalledAgesaStatus; AGESA_STATUS EarlyInitStatus; WARM_RESET_REQUEST Request; AGESA_TESTPOINT (TpIfAmdInitEarlyEntry, &EarlyParams->StdHeader); IDS_PERF_TIME_MEASURE (&EarlyParams->StdHeader); ASSERT (EarlyParams != NULL); EarlyInitStatus = AGESA_SUCCESS; GetWarmResetFlag (&EarlyParams->StdHeader, &Request); Request.RequestBit = FALSE; SetWarmResetFlag (&EarlyParams->StdHeader, &Request); IDS_OPTION_HOOK (IDS_INIT_EARLY_BEFORE, EarlyParams, &EarlyParams->StdHeader); // Setup ROM execution cache CalledAgesaStatus = AllocateExecutionCache (&EarlyParams->StdHeader, &EarlyParams->CacheRegion[0]); if (CalledAgesaStatus > EarlyInitStatus) { EarlyInitStatus = CalledAgesaStatus; } // Full Hypertransport Initialization // IMPORTANT: All AP cores call Ht Init. HT Init handles full init for the BSC, and map init for APs. CalledAgesaStatus = AmdHtInitialize (&EarlyParams->StdHeader, &EarlyParams->PlatformConfig, &EarlyParams->HtConfig); if (CalledAgesaStatus > EarlyInitStatus) { EarlyInitStatus = CalledAgesaStatus; } // AP launch CalledAgesaStatus = AmdCpuEarly (&EarlyParams->StdHeader, &EarlyParams->PlatformConfig); if (CalledAgesaStatus > EarlyInitStatus) { EarlyInitStatus = CalledAgesaStatus; } // Warm Rest, should be at the end of AmdInitEarly GetWarmResetFlag (&EarlyParams->StdHeader, &Request); if (Request.RequestBit == TRUE) { Request.RequestBit = FALSE; Request.StateBits = WR_STATE_EARLY; SetWarmResetFlag (&EarlyParams->StdHeader, &Request); AgesaDoReset (WARM_RESET_WHENEVER, &EarlyParams->StdHeader); } else { if (Request.StateBits < WR_STATE_EARLY) { Request.StateBits = WR_STATE_EARLY; SetWarmResetFlag (&EarlyParams->StdHeader, &Request); } } CalledAgesaStatus = GnbInitAtEarly ( &EarlyParams->StdHeader, &EarlyParams->PlatformConfig, &EarlyParams->GnbConfig ); if (CalledAgesaStatus > EarlyInitStatus) { EarlyInitStatus = CalledAgesaStatus; } // Check for Cache As Ram Corruption IDS_CAR_CORRUPTION_CHECK (&EarlyParams->StdHeader); IDS_OPTION_HOOK (IDS_AFTER_WARM_RESET, EarlyParams, &EarlyParams->StdHeader); IDS_OPTION_HOOK (IDS_INIT_EARLY_AFTER, EarlyParams, &EarlyParams->StdHeader); IDS_PERF_TIME_MEASURE (&EarlyParams->StdHeader); AGESA_TESTPOINT (TpIfAmdInitEarlyExit, &EarlyParams->StdHeader); return EarlyInitStatus; }