BOOT_CODE bool_t
init_cpu(
bool_t mask_legacy_irqs
)
{
/* initialise virtual-memory-related data structures */
if (!init_vm_state()) {
return false;
}
/* initialise CPU's descriptor table registers (GDTR, IDTR, LDTR, TR) */
init_dtrs();
if (config_set(CONFIG_SYSENTER)) {
/* initialise MSRs (needs an initialised TSS) */
init_sysenter_msrs();
} else if (config_set(CONFIG_SYSCALL)) {
init_syscall_msrs();
} else {
return false;
}
/* setup additional PAT MSR */
if (!init_pat_msr()) {
return false;
}
#ifdef CONFIG_HARDWARE_DEBUG_API
/* Initialize hardware breakpoints */
Arch_initHardwareBreakpoints();
#endif
/* initialise floating-point unit */
if (!Arch_initFpu()) {
return false;
}
/* initialise local APIC */
if (!apic_init(mask_legacy_irqs)) {
return false;
}
#ifdef CONFIG_DEBUG_DISABLE_PREFETCHERS
if (!disablePrefetchers()) {
return false;
}
#endif
#ifdef CONFIG_VTX
/* initialise Intel VT-x extensions */
if (!vtx_init()) {
return false;
}
#endif
return true;
}
/** This and only this function initialises the CPU.
*
* It does NOT initialise any kernel state.
* @return For the verification build, this currently returns true always.
*/
BOOT_CODE static bool_t init_cpu(void)
{
bool_t haveHWFPU;
#ifdef CONFIG_ARCH_AARCH64
if (config_set(CONFIG_ARM_HYPERVISOR_SUPPORT)) {
if (!checkTCR_EL2()) {
return false;
}
}
#endif
activate_global_pd();
if (config_set(CONFIG_ARM_HYPERVISOR_SUPPORT)) {
vcpu_boot_init();
}
#ifdef CONFIG_HARDWARE_DEBUG_API
if (!Arch_initHardwareBreakpoints()) {
printf("Kernel built with CONFIG_HARDWARE_DEBUG_API, but this board doesn't "
"reliably support it.\n");
return false;
}
#endif
/* Setup kernel stack pointer.
* On ARM SMP, the array index here is the CPU ID
*/
#ifndef CONFIG_ARCH_ARM_V6
word_t stack_top = ((word_t) kernel_stack_alloc[SMP_TERNARY(getCurrentCPUIndex(), 0)]) + BIT(CONFIG_KERNEL_STACK_BITS);
#if defined(ENABLE_SMP_SUPPORT) && defined(CONFIG_ARCH_AARCH64)
/* the least 12 bits are used to store logical core ID */
stack_top |= getCurrentCPUIndex();
#endif
setKernelStack(stack_top);
#endif /* CONFIG_ARCH_ARM_V6 */
#ifdef CONFIG_ARCH_AARCH64
/* initialise CPU's exception vector table */
setVtable((pptr_t)arm_vector_table);
#endif /* CONFIG_ARCH_AARCH64 */
haveHWFPU = fpsimd_HWCapTest();
/* Disable FPU to avoid channels where a platform has an FPU but doesn't make use of it */
if (haveHWFPU) {
disableFpu();
}
#ifdef CONFIG_HAVE_FPU
if (haveHWFPU) {
if (!fpsimd_init()) {
return false;
}
} else {
printf("Platform claims to have FP hardware, but does not!");
return false;
}
#endif /* CONFIG_HAVE_FPU */
cpu_initLocalIRQController();
#ifdef CONFIG_ENABLE_BENCHMARKS
armv_init_ccnt();
#endif /* CONFIG_ENABLE_BENCHMARKS */
/* Export selected CPU features for access by PL0 */
armv_init_user_access();
initTimer();
return true;
}