int iBSP430clockConfigureLFXT1_ni (int enablep, int loop_limit) { int loop_delta; int rc = 0; BSP430_CLOCK_CLEAR_FAULTS_NI(); if (enablep && (0 != loop_limit)) { rc = iBSP430platformConfigurePeripheralPins_ni(BSP430_PERIPH_LFXT1, 0, 1); if (0 == rc) { loop_delta = (0 < loop_limit) ? 1 : 0; FLL_CTL0 = (FLL_CTL0 & ~(OSCCAP0 | OSCCAP1 | XTS_FLL)) | BSP430_CLOCK_LFXT1_XCAP; do { BSP430_CLOCK_CLEAR_FAULTS_NI(); loop_limit -= loop_delta; BSP430_CORE_WATCHDOG_CLEAR(); BSP430_CORE_DELAY_CYCLES(BSP430_CLOCK_LFXT1_STABILIZATION_DELAY_CYCLES); } while (BSP430_FLLPLUS_LFXT1_IS_FAULTED_NI() && (0 != loop_limit)); rc = ! BSP430_FLLPLUS_LFXT1_IS_FAULTED_NI(); } } BSP430_CLOCK_OSC_CLEAR_FAULT_NI(); if (! rc) { (void)iBSP430platformConfigurePeripheralPins_ni(BSP430_PERIPH_LFXT1, 0, 0); FLL_CTL0 &= ~(OSCCAP0 | OSCCAP1); } return rc; }
int iBSP430clockConfigureLFXT1_ni (int enablep, int loop_limit) { int loop_delta; int rc = 0; BSP430_CLOCK_CLEAR_FAULTS_NI(); if (enablep && (0 != loop_limit)) { rc = iBSP430platformConfigurePeripheralPins_ni(BSP430_PERIPH_LFXT1, 0, 1); if (0 == rc) { loop_delta = (0 < loop_limit) ? 1 : 0; /* See whether the crystal is populated and functional. Do * this with the DCO reset to the power-up configuration, * where clock should be nominal 1 MHz. * * @TODO: Preserve XT2 configuration */ BCSCTL3 = BSP430_CLOCK_LFXT1_XCAP; do { loop_limit -= loop_delta; BSP430_CORE_WATCHDOG_CLEAR(); BSP430_CORE_DELAY_CYCLES(BSP430_CLOCK_LFXT1_STABILIZATION_DELAY_CYCLES); } while ((BSP430_BC2_LFXT1_IS_FAULTED_NI()) && (0 != loop_limit)); rc = ! BSP430_BC2_LFXT1_IS_FAULTED_NI(); } } BSP430_CLOCK_OSC_CLEAR_FAULT_NI(); if (! rc) { (void)iBSP430platformConfigurePeripheralPins_ni(BSP430_PERIPH_LFXT1, 0, 0); /* Explicitly fall back to VLOCLK and disable capacitors */ BCSCTL3 = LFXT1S_2; } return rc; }
int iBSP430clockConfigureLFXT1_ni (int enablep, int loop_limit) { int loop_delta; int rc = 0; BSP430_CLOCK_CLEAR_FAULTS_NI(); if (enablep && (0 != loop_limit)) { rc = iBSP430platformConfigurePeripheralPins_ni(BSP430_PERIPH_LFXT1, 0, 1); if (0 == rc) { loop_delta = (0 < loop_limit) ? 1 : 0; /* Low frequency XT1 needed. Spin at high drive to stability, then * drop back. */ CSCTL6 = XT1DRIVE_3 | (CSCTL6 & ~(XTS | XT1BYPASS | XT1AGCOFF | XT1AUTOOFF)); do { BSP430_CLOCK_CLEAR_FAULTS_NI(); loop_limit -= loop_delta; BSP430_CORE_WATCHDOG_CLEAR(); BSP430_CORE_DELAY_CYCLES(BSP430_CLOCK_LFXT1_STABILIZATION_DELAY_CYCLES); } while ((BSP430_CS4_LFXT1_IS_FAULTED_NI()) && (0 != loop_limit)); rc = ! BSP430_CS4_LFXT1_IS_FAULTED_NI(); } } BSP430_CLOCK_OSC_CLEAR_FAULT_NI(); CSCTL6 &= ~XT1DRIVE_3; if (! rc) { (void)iBSP430platformConfigurePeripheralPins_ni(BSP430_PERIPH_LFXT1, 0, 0); /* Disable as an indication that XIN is not enabled. Also remove * capacitance setting. */ CSCTL6 = XT1BYPASS | (CSCTL6 & ~(XT1DRIVE0 | XT1DRIVE1)); } return rc; }