static BT_ERROR canSetBaudrate(BT_HANDLE hCan, BT_u32 ulBaudrate) { volatile LPC17xx_CAN_REGS *pRegs = hCan->pRegs; const BT_RESOURCE *pResource = BT_GetIntegratedResource(hCan->pDevice, BT_RESOURCE_ENUM, 0); BT_u32 ulInputClk = BT_LPC17xx_GetPeripheralClock(g_CAN_PERIPHERAL[pResource->ulStart]); BT_u32 ulPrescale = 0; BT_u32 ulCanClock = ulInputClk/(ulPrescale+1); while ((ulCanClock >= ulBaudrate*8) && (ulCanClock % ulBaudrate == 0)) { ulPrescale++; ulCanClock = ulInputClk/(ulPrescale+1); } BT_u32 ulTSEG1 = (ulInputClk/(ulPrescale*ulBaudrate)-4); BT_u32 ulTSEG2 = 1; if (ulTSEG1 > 15) { BT_u32 ulDiff = ulTSEG1 - 15; ulTSEG2 += ulDiff; ulTSEG1 -= ulDiff; } pRegs->CANBTR = (ulTSEG1 << 16) | (ulTSEG2 << 20) | (ulPrescale-1); return BT_ERR_NONE; };
static BT_ERROR spiSetBaudrate(BT_HANDLE hSpi, BT_u32 ulBaudrate) { volatile LPC17xx_SPI_REGS *pRegs = hSpi->pRegs; const BT_RESOURCE *pResource = BT_GetIntegratedResource(hSpi->pDevice, BT_RESOURCE_ENUM, 0); BT_u32 ulInputClk = BT_LPC17xx_GetPeripheralClock(g_SPI_PERIPHERAL[pResource->ulStart]); if (pResource->ulStart == 0) { BT_u32 ulDivider = ulInputClk / ulBaudrate; if (ulDivider < 8) ulDivider = 8; if (ulDivider % 2) ulDivider++; pRegs->CCR = ulDivider; } else { pRegs->CR0 &= ~LPC17xx_SPI_CR0_SCR_MASK; BT_u32 ulDivider = (ulInputClk / ulBaudrate) / 256; if (ulDivider < 2) ulDivider = 2; if (ulDivider % 2) ulDivider++; pRegs->CPSR = ulDivider; pRegs->CR0 |= ((ulInputClk / (ulBaudrate * ulDivider)-1) << 8) & LPC17xx_SPI_CR0_SCR_MASK; } spiEnable(hSpi); return BT_ERR_NONE; }
static BT_u32 pwm_get_frequency(BT_HANDLE hPwm, BT_ERROR *pError) { volatile LPC17xx_PWM_REGS *pRegs = hPwm->pRegs; BT_u32 ulInputClk = BT_LPC17xx_GetPeripheralClock(g_PWM_PERIPHERAL[hPwm->id]) / (pRegs->PWMPR + 1); return ulInputClk / pRegs->PWMMR0; }
static BT_u32 timer_getinputclock(BT_HANDLE hTimer, BT_ERROR *pError) { volatile LPC17xx_TIMER_REGS *pRegs = hTimer->pRegs; *pError = BT_ERR_NONE; const BT_RESOURCE *pResource = BT_GetIntegratedResource(hTimer->pDevice, BT_RESOURCE_ENUM, 0); return BT_LPC17xx_GetPeripheralClock(g_TIMER_PERIPHERAL[pResource->ulStart]) / (pRegs->TMRBPR+1); }
static BT_ERROR pwm_set_frequency(BT_HANDLE hPwm, BT_u32 ulValue) { volatile LPC17xx_PWM_REGS *pRegs = hPwm->pRegs; BT_ERROR Error = BT_ERR_NONE; BT_u32 ulInputClk = BT_LPC17xx_GetPeripheralClock(g_PWM_PERIPHERAL[hPwm->id]); BT_u32 ulPeriodCount = ulInputClk / ulValue; pRegs->PWMMR0 = ulPeriodCount; pRegs->PWMMCR |= LPC17xx_PWM_PWMMCR_MR0R; return BT_ERR_NONE; }
/** * Get a full configuration of the SPI. **/ static BT_ERROR spiGetConfig(BT_HANDLE hSpi, BT_SPI_CONFIG *pConfig) { volatile LPC17xx_SPI_REGS *pRegs = hSpi->pRegs; BT_ERROR Error = BT_ERR_NONE; const BT_RESOURCE *pResource = BT_GetIntegratedResource(hSpi->pDevice, BT_RESOURCE_ENUM, 0); BT_u32 ulInputClk = BT_LPC17xx_GetPeripheralClock(g_SPI_PERIPHERAL[pResource->ulStart]); if (pResource->ulStart == 0) { pConfig->ulBaudrate = ulInputClk / pRegs->CCR; pConfig->ucDataBits = (pRegs->CR >> 8) & LPC17xx_SPI_CR_DSS_MASK; pConfig->eCPOL = (pRegs->CR & LPC17xx_SPI_CR_CPOL); pConfig->eCPHA = (pRegs->CR & LPC17xx_SPI_CR_CPHA); }