static void doTestsOnDefaultValues(PCFGMNODE pRoot)
{
/* integer */
uint64_t u64;
RTTESTI_CHECK_RC(CFGMR3QueryU64(pRoot, "RamSize", &u64), VINF_SUCCESS);
size_t cb = 0;
RTTESTI_CHECK_RC(CFGMR3QuerySize(pRoot, "RamSize", &cb), VINF_SUCCESS);
RTTESTI_CHECK(cb == sizeof(uint64_t));
/* string */
char *pszName = NULL;
RTTESTI_CHECK_RC(CFGMR3QueryStringAlloc(pRoot, "Name", &pszName), VINF_SUCCESS);
RTTESTI_CHECK_RC(CFGMR3QuerySize(pRoot, "Name", &cb), VINF_SUCCESS);
RTTESTI_CHECK(cb == strlen(pszName) + 1);
MMR3HeapFree(pszName);
}
/**
* Initialize the network shaper.
*
* @returns VBox status code
* @param pVM Pointer to the VM.
*/
int pdmR3NetShaperInit(PVM pVM)
{
LogFlowFunc((": pVM=%p\n", pVM));
VM_ASSERT_EMT(pVM);
PPDMNETSHAPER pNetShaper = NULL;
int rc = MMR3HeapAllocZEx(pVM, MM_TAG_PDM_NET_SHAPER,
sizeof(PDMNETSHAPER),
(void **)&pNetShaper);
if (RT_SUCCESS(rc))
{
PCFGMNODE pCfgRoot = CFGMR3GetRoot(pVM);
PCFGMNODE pCfgNetShaper = CFGMR3GetChild(CFGMR3GetChild(pCfgRoot, "PDM"), "NetworkShaper");
pNetShaper->pVM = pVM;
rc = RTCritSectInit(&pNetShaper->cs);
if (RT_SUCCESS(rc))
{
/* Create all bandwidth groups. */
PCFGMNODE pCfgBwGrp = CFGMR3GetChild(pCfgNetShaper, "BwGroups");
if (pCfgBwGrp)
{
for (PCFGMNODE pCur = CFGMR3GetFirstChild(pCfgBwGrp); pCur; pCur = CFGMR3GetNextChild(pCur))
{
uint64_t cbMax;
size_t cbName = CFGMR3GetNameLen(pCur) + 1;
char *pszBwGrpId = (char *)RTMemAllocZ(cbName);
if (!pszBwGrpId)
{
rc = VERR_NO_MEMORY;
break;
}
rc = CFGMR3GetName(pCur, pszBwGrpId, cbName);
AssertRC(rc);
if (RT_SUCCESS(rc))
rc = CFGMR3QueryU64(pCur, "Max", &cbMax);
if (RT_SUCCESS(rc))
rc = pdmNsBwGroupCreate(pNetShaper, pszBwGrpId, cbMax);
RTMemFree(pszBwGrpId);
if (RT_FAILURE(rc))
break;
}
}
if (RT_SUCCESS(rc))
{
PUVM pUVM = pVM->pUVM;
AssertMsg(!pUVM->pdm.s.pNetShaper, ("Network shaper was already initialized\n"));
char szDesc[64];
static unsigned s_iThread;
RTStrPrintf(szDesc, sizeof(szDesc), "PDMNsTx-%d", ++s_iThread);
rc = PDMR3ThreadCreate(pVM, &pNetShaper->hTxThread, pNetShaper,
pdmR3NsTxThread, pdmR3NsTxWakeUp, 0,
RTTHREADTYPE_IO, szDesc);
if (RT_SUCCESS(rc))
{
pUVM->pdm.s.pNetShaper = pNetShaper;
return VINF_SUCCESS;
}
}
RTCritSectDelete(&pNetShaper->cs);
}
MMR3HeapFree(pNetShaper);
}
LogFlowFunc((": pVM=%p rc=%Rrc\n", pVM, rc));
return rc;
}
/**
* Initialize the network shaper.
*
* @returns VBox status code
* @param pVM The cross context VM structure.
*/
int pdmR3NetShaperInit(PVM pVM)
{
LogFlow(("pdmR3NetShaperInit: pVM=%p\n", pVM));
VM_ASSERT_EMT(pVM);
PUVM pUVM = pVM->pUVM;
AssertMsgReturn(!pUVM->pdm.s.pNetShaper, ("Network shaper was already initialized\n"), VERR_WRONG_ORDER);
PPDMNETSHAPER pShaper;
int rc = MMR3HeapAllocZEx(pVM, MM_TAG_PDM_NET_SHAPER, sizeof(PDMNETSHAPER), (void **)&pShaper);
if (RT_SUCCESS(rc))
{
PCFGMNODE pCfgNetShaper = CFGMR3GetChild(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "NetworkShaper");
pShaper->pVM = pVM;
rc = RTCritSectInit(&pShaper->Lock);
if (RT_SUCCESS(rc))
{
/* Create all bandwidth groups. */
PCFGMNODE pCfgBwGrp = CFGMR3GetChild(pCfgNetShaper, "BwGroups");
if (pCfgBwGrp)
{
for (PCFGMNODE pCur = CFGMR3GetFirstChild(pCfgBwGrp); pCur; pCur = CFGMR3GetNextChild(pCur))
{
size_t cbName = CFGMR3GetNameLen(pCur) + 1;
char *pszBwGrpId = (char *)RTMemAllocZ(cbName);
if (pszBwGrpId)
{
rc = CFGMR3GetName(pCur, pszBwGrpId, cbName);
if (RT_SUCCESS(rc))
{
uint64_t cbMax;
rc = CFGMR3QueryU64(pCur, "Max", &cbMax);
if (RT_SUCCESS(rc))
rc = pdmNsBwGroupCreate(pShaper, pszBwGrpId, cbMax);
}
RTMemFree(pszBwGrpId);
}
else
rc = VERR_NO_MEMORY;
if (RT_FAILURE(rc))
break;
}
}
if (RT_SUCCESS(rc))
{
rc = PDMR3ThreadCreate(pVM, &pShaper->pTxThread, pShaper, pdmR3NsTxThread, pdmR3NsTxWakeUp,
0 /*cbStack*/, RTTHREADTYPE_IO, "PDMNsTx");
if (RT_SUCCESS(rc))
{
pUVM->pdm.s.pNetShaper = pShaper;
return VINF_SUCCESS;
}
}
RTCritSectDelete(&pShaper->Lock);
}
MMR3HeapFree(pShaper);
}
LogFlow(("pdmR3NetShaperInit: pVM=%p rc=%Rrc\n", pVM, rc));
return rc;
}
/**
* Construct the DMI table.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pTable Where to create the DMI table.
* @param cbMax The maximum size of the DMI table.
* @param pUuid Pointer to the UUID to use if the DmiUuid
* configuration string isn't present.
* @param pCfg The handle to our config node.
* @param cCpus Number of VCPUs.
* @param pcbDmiTables Size of DMI data in bytes.
* @param pcNumDmiTables Number of DMI tables.
*/
int FwCommonPlantDMITable(PPDMDEVINS pDevIns, uint8_t *pTable, unsigned cbMax, PCRTUUID pUuid, PCFGMNODE pCfg, uint16_t cCpus, uint16_t *pcbDmiTables, uint16_t *pcNumDmiTables)
{
#define CHECKSIZE(cbWant) \
{ \
size_t cbNeed = (size_t)(pszStr + cbWant - (char *)pTable) + 5; /* +1 for strtab terminator +4 for end-of-table entry */ \
if (cbNeed > cbMax) \
{ \
if (fHideErrors) \
{ \
LogRel(("One of the DMI strings is too long -- using default DMI data!\n")); \
continue; \
} \
return PDMDevHlpVMSetError(pDevIns, VERR_TOO_MUCH_DATA, RT_SRC_POS, \
N_("One of the DMI strings is too long. Check all bios/Dmi* configuration entries. At least %zu bytes are needed but there is no space for more than %d bytes"), cbNeed, cbMax); \
} \
}
#define READCFGSTRDEF(variable, name, default_value) \
{ \
if (fForceDefault) \
pszTmp = default_value; \
else \
{ \
rc = CFGMR3QueryStringDef(pCfg, name, szBuf, sizeof(szBuf), default_value); \
if (RT_FAILURE(rc)) \
{ \
if (fHideErrors) \
{ \
LogRel(("Configuration error: Querying \"" name "\" as a string failed -- using default DMI data!\n")); \
continue; \
} \
return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, \
N_("Configuration error: Querying \"" name "\" as a string failed")); \
} \
else if (!strcmp(szBuf, "<EMPTY>")) \
pszTmp = ""; \
else \
pszTmp = szBuf; \
} \
if (!pszTmp[0]) \
variable = 0; /* empty string */ \
else \
{ \
variable = iStrNr++; \
size_t cStr = strlen(pszTmp) + 1; \
CHECKSIZE(cStr); \
memcpy(pszStr, pszTmp, cStr); \
pszStr += cStr ; \
} \
}
#define READCFGSTR(variable, name) \
READCFGSTRDEF(variable, # name, s_szDef ## name)
#define READCFGINT(variable, name) \
{ \
if (fForceDefault) \
variable = s_iDef ## name; \
else \
{ \
rc = CFGMR3QueryS32Def(pCfg, # name, & variable, s_iDef ## name); \
if (RT_FAILURE(rc)) \
{ \
if (fHideErrors) \
{ \
LogRel(("Configuration error: Querying \"" # name "\" as an int failed -- using default DMI data!\n")); \
continue; \
} \
return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, \
N_("Configuration error: Querying \"" # name "\" as an int failed")); \
} \
} \
}
#define START_STRUCT(tbl) \
pszStr = (char *)(tbl + 1); \
iStrNr = 1;
#define TERM_STRUCT \
{ \
*pszStr++ = '\0'; /* terminate set of text strings */ \
if (iStrNr == 1) \
*pszStr++ = '\0'; /* terminate a structure without strings */ \
}
bool fForceDefault = false;
#ifdef VBOX_BIOS_DMI_FALLBACK
/*
* There will be two passes. If an error occurs during the first pass, a
* message will be written to the release log and we fall back to default
* DMI data and start a second pass.
*/
bool fHideErrors = true;
#else
/*
* There will be one pass, every error is fatal and will prevent the VM
* from starting.
*/
bool fHideErrors = false;
#endif
uint8_t fDmiUseHostInfo;
int rc = CFGMR3QueryU8Def(pCfg, "DmiUseHostInfo", &fDmiUseHostInfo, 0);
if (RT_FAILURE (rc))
return PDMDEV_SET_ERROR(pDevIns, rc,
N_("Configuration error: Failed to read \"DmiUseHostInfo\""));
/* Sync up with host default DMI values */
if (fDmiUseHostInfo)
fwCommonUseHostDMIStrings();
uint8_t fDmiExposeMemoryTable;
rc = CFGMR3QueryU8Def(pCfg, "DmiExposeMemoryTable", &fDmiExposeMemoryTable, 0);
if (RT_FAILURE (rc))
return PDMDEV_SET_ERROR(pDevIns, rc,
N_("Configuration error: Failed to read \"DmiExposeMemoryTable\""));
uint8_t fDmiExposeProcessorInf;
rc = CFGMR3QueryU8Def(pCfg, "DmiExposeProcInf", &fDmiExposeProcessorInf, 0);
if (RT_FAILURE (rc))
return PDMDEV_SET_ERROR(pDevIns, rc,
N_("Configuration error: Failed to read \"DmiExposeProcInf\""));
for (;; fForceDefault = true, fHideErrors = false)
{
int iStrNr;
char szBuf[256];
char *pszStr = (char *)pTable;
char szDmiSystemUuid[64];
char *pszDmiSystemUuid;
const char *pszTmp;
if (fForceDefault)
pszDmiSystemUuid = NULL;
else
{
rc = CFGMR3QueryString(pCfg, "DmiSystemUuid", szDmiSystemUuid, sizeof(szDmiSystemUuid));
if (rc == VERR_CFGM_VALUE_NOT_FOUND)
pszDmiSystemUuid = NULL;
else if (RT_FAILURE(rc))
{
if (fHideErrors)
{
LogRel(("Configuration error: Querying \"DmiSystemUuid\" as a string failed, using default DMI data\n"));
continue;
}
return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
N_("Configuration error: Querying \"DmiSystemUuid\" as a string failed"));
}
else
pszDmiSystemUuid = szDmiSystemUuid;
}
/*********************************
* DMI BIOS information (Type 0) *
*********************************/
PDMIBIOSINF pBIOSInf = (PDMIBIOSINF)pszStr;
CHECKSIZE(sizeof(*pBIOSInf));
pszStr = (char *)&pBIOSInf->u8ReleaseMajor;
pBIOSInf->header.u8Length = RT_OFFSETOF(DMIBIOSINF, u8ReleaseMajor);
/* don't set these fields by default for legacy compatibility */
int iDmiBIOSReleaseMajor, iDmiBIOSReleaseMinor;
READCFGINT(iDmiBIOSReleaseMajor, DmiBIOSReleaseMajor);
READCFGINT(iDmiBIOSReleaseMinor, DmiBIOSReleaseMinor);
if (iDmiBIOSReleaseMajor != 0 || iDmiBIOSReleaseMinor != 0)
{
pszStr = (char *)&pBIOSInf->u8FirmwareMajor;
pBIOSInf->header.u8Length = RT_OFFSETOF(DMIBIOSINF, u8FirmwareMajor);
pBIOSInf->u8ReleaseMajor = iDmiBIOSReleaseMajor;
pBIOSInf->u8ReleaseMinor = iDmiBIOSReleaseMinor;
int iDmiBIOSFirmwareMajor, iDmiBIOSFirmwareMinor;
READCFGINT(iDmiBIOSFirmwareMajor, DmiBIOSFirmwareMajor);
READCFGINT(iDmiBIOSFirmwareMinor, DmiBIOSFirmwareMinor);
if (iDmiBIOSFirmwareMajor != 0 || iDmiBIOSFirmwareMinor != 0)
{
pszStr = (char *)(pBIOSInf + 1);
pBIOSInf->header.u8Length = sizeof(DMIBIOSINF);
pBIOSInf->u8FirmwareMajor = iDmiBIOSFirmwareMajor;
pBIOSInf->u8FirmwareMinor = iDmiBIOSFirmwareMinor;
}
}
iStrNr = 1;
pBIOSInf->header.u8Type = 0; /* BIOS Information */
pBIOSInf->header.u16Handle = 0x0000;
READCFGSTR(pBIOSInf->u8Vendor, DmiBIOSVendor);
READCFGSTR(pBIOSInf->u8Version, DmiBIOSVersion);
pBIOSInf->u16Start = 0xE000;
READCFGSTR(pBIOSInf->u8Release, DmiBIOSReleaseDate);
pBIOSInf->u8ROMSize = 1; /* 128K */
pBIOSInf->u64Characteristics = RT_BIT(4) /* ISA is supported */
| RT_BIT(7) /* PCI is supported */
| RT_BIT(15) /* Boot from CD is supported */
| RT_BIT(16) /* Selectable Boot is supported */
| RT_BIT(27) /* Int 9h, 8042 Keyboard services supported */
| RT_BIT(30) /* Int 10h, CGA/Mono Video Services supported */
/* any more?? */
;
pBIOSInf->u8CharacteristicsByte1 = RT_BIT(0) /* ACPI is supported */
/* any more?? */
;
pBIOSInf->u8CharacteristicsByte2 = 0
/* any more?? */
;
TERM_STRUCT;
/***********************************
* DMI system information (Type 1) *
***********************************/
PDMISYSTEMINF pSystemInf = (PDMISYSTEMINF)pszStr;
CHECKSIZE(sizeof(*pSystemInf));
START_STRUCT(pSystemInf);
pSystemInf->header.u8Type = 1; /* System Information */
pSystemInf->header.u8Length = sizeof(*pSystemInf);
pSystemInf->header.u16Handle = 0x0001;
READCFGSTR(pSystemInf->u8Manufacturer, DmiSystemVendor);
READCFGSTR(pSystemInf->u8ProductName, DmiSystemProduct);
READCFGSTR(pSystemInf->u8Version, DmiSystemVersion);
READCFGSTR(pSystemInf->u8SerialNumber, DmiSystemSerial);
RTUUID uuid;
if (pszDmiSystemUuid)
{
rc = RTUuidFromStr(&uuid, pszDmiSystemUuid);
if (RT_FAILURE(rc))
{
if (fHideErrors)
{
LogRel(("Configuration error: Invalid UUID for DMI tables specified, using default DMI data\n"));
continue;
}
return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
N_("Configuration error: Invalid UUID for DMI tables specified"));
}
uuid.Gen.u32TimeLow = RT_H2BE_U32(uuid.Gen.u32TimeLow);
uuid.Gen.u16TimeMid = RT_H2BE_U16(uuid.Gen.u16TimeMid);
uuid.Gen.u16TimeHiAndVersion = RT_H2BE_U16(uuid.Gen.u16TimeHiAndVersion);
pUuid = &uuid;
}
memcpy(pSystemInf->au8Uuid, pUuid, sizeof(RTUUID));
pSystemInf->u8WakeupType = 6; /* Power Switch */
READCFGSTR(pSystemInf->u8SKUNumber, DmiSystemSKU);
READCFGSTR(pSystemInf->u8Family, DmiSystemFamily);
TERM_STRUCT;
/**********************************
* DMI board information (Type 2) *
**********************************/
PDMIBOARDINF pBoardInf = (PDMIBOARDINF)pszStr;
CHECKSIZE(sizeof(*pBoardInf));
START_STRUCT(pBoardInf);
int iDmiBoardBoardType;
pBoardInf->header.u8Type = 2; /* Board Information */
pBoardInf->header.u8Length = sizeof(*pBoardInf);
pBoardInf->header.u16Handle = 0x0008;
READCFGSTR(pBoardInf->u8Manufacturer, DmiBoardVendor);
READCFGSTR(pBoardInf->u8Product, DmiBoardProduct);
READCFGSTR(pBoardInf->u8Version, DmiBoardVersion);
READCFGSTR(pBoardInf->u8SerialNumber, DmiBoardSerial);
READCFGSTR(pBoardInf->u8AssetTag, DmiBoardAssetTag);
pBoardInf->u8FeatureFlags = RT_BIT(0) /* hosting board, e.g. motherboard */
;
READCFGSTR(pBoardInf->u8LocationInChass, DmiBoardLocInChass);
pBoardInf->u16ChassisHandle = 0x0003; /* see type 3 */
READCFGINT(iDmiBoardBoardType, DmiBoardBoardType);
pBoardInf->u8BoardType = iDmiBoardBoardType;
pBoardInf->u8cObjectHandles = 0;
TERM_STRUCT;
/********************************************
* DMI System Enclosure or Chassis (Type 3) *
********************************************/
PDMICHASSIS pChassis = (PDMICHASSIS)pszStr;
CHECKSIZE(sizeof(*pChassis));
pszStr = (char*)&pChassis->u32OEMdefined;
iStrNr = 1;
#ifdef VBOX_WITH_DMI_CHASSIS
pChassis->header.u8Type = 3; /* System Enclosure or Chassis */
#else
pChassis->header.u8Type = 0x7e; /* inactive */
#endif
pChassis->header.u8Length = RT_OFFSETOF(DMICHASSIS, u32OEMdefined);
pChassis->header.u16Handle = 0x0003;
READCFGSTR(pChassis->u8Manufacturer, DmiChassisVendor);
int iDmiChassisType;
READCFGINT(iDmiChassisType, DmiChassisType);
pChassis->u8Type = iDmiChassisType;
READCFGSTR(pChassis->u8Version, DmiChassisVersion);
READCFGSTR(pChassis->u8SerialNumber, DmiChassisSerial);
READCFGSTR(pChassis->u8AssetTag, DmiChassisAssetTag);
pChassis->u8BootupState = 0x03; /* safe */
pChassis->u8PowerSupplyState = 0x03; /* safe */
pChassis->u8ThermalState = 0x03; /* safe */
pChassis->u8SecurityStatus = 0x03; /* none XXX */
# if 0
/* v2.3+, currently not supported */
pChassis->u32OEMdefined = 0;
pChassis->u8Height = 0; /* unspecified */
pChassis->u8NumPowerChords = 0; /* unspecified */
pChassis->u8ContElems = 0; /* no contained elements */
pChassis->u8ContElemRecLen = 0; /* no contained elements */
# endif
TERM_STRUCT;
/**************************************
* DMI Processor Information (Type 4) *
**************************************/
/*
* This is just a dummy processor. Should we expose the real guest CPU features
* here? Accessing this information at this point is difficult.
*/
char szSocket[32];
PDMIPROCESSORINF pProcessorInf = (PDMIPROCESSORINF)pszStr;
CHECKSIZE(sizeof(*pProcessorInf));
START_STRUCT(pProcessorInf);
if (fDmiExposeProcessorInf)
pProcessorInf->header.u8Type = 4; /* Processor Information */
else
pProcessorInf->header.u8Type = 126; /* inactive structure */
pProcessorInf->header.u8Length = sizeof(*pProcessorInf);
pProcessorInf->header.u16Handle = 0x0007;
RTStrPrintf(szSocket, sizeof(szSocket), "Socket #%u", 0);
pProcessorInf->u8SocketDesignation = iStrNr++;
{
size_t cStr = strlen(szSocket) + 1;
CHECKSIZE(cStr);
memcpy(pszStr, szSocket, cStr);
pszStr += cStr;
}
pProcessorInf->u8ProcessorType = 0x03; /* Central Processor */
pProcessorInf->u8ProcessorFamily = 0xB1; /* Pentium III with Intel SpeedStep(TM) */
READCFGSTR(pProcessorInf->u8ProcessorManufacturer, DmiProcManufacturer);
pProcessorInf->u64ProcessorID = UINT64_C(0x0FEBFBFF00010676);
/* Ext Family ID = 0
* Ext Model ID = 2
* Processor Type = 0
* Family ID = 6
* Model = 7
* Stepping = 6
* Features: FPU, VME, DE, PSE, TSC, MSR, PAE, MCE, CX8,
* APIC, SEP, MTRR, PGE, MCA, CMOV, PAT, PSE-36,
* CFLSH, DS, ACPI, MMX, FXSR, SSE, SSE2, SS */
READCFGSTR(pProcessorInf->u8ProcessorVersion, DmiProcVersion);
pProcessorInf->u8Voltage = 0x02; /* 3.3V */
pProcessorInf->u16ExternalClock = 0x00; /* unknown */
pProcessorInf->u16MaxSpeed = 3000; /* 3GHz */
pProcessorInf->u16CurrentSpeed = 3000; /* 3GHz */
pProcessorInf->u8Status = RT_BIT(6) /* CPU socket populated */
| RT_BIT(0) /* CPU enabled */
;
pProcessorInf->u8ProcessorUpgrade = 0x04; /* ZIF Socket */
pProcessorInf->u16L1CacheHandle = 0xFFFF; /* not specified */
pProcessorInf->u16L2CacheHandle = 0xFFFF; /* not specified */
pProcessorInf->u16L3CacheHandle = 0xFFFF; /* not specified */
pProcessorInf->u8SerialNumber = 0; /* not specified */
pProcessorInf->u8AssetTag = 0; /* not specified */
pProcessorInf->u8PartNumber = 0; /* not specified */
pProcessorInf->u8CoreCount = cCpus; /* */
pProcessorInf->u8CoreEnabled = cCpus;
pProcessorInf->u8ThreadCount = 1;
pProcessorInf->u16ProcessorCharacteristics
= RT_BIT(2); /* 64-bit capable */
pProcessorInf->u16ProcessorFamily2 = 0;
TERM_STRUCT;
/***************************************
* DMI Physical Memory Array (Type 16) *
***************************************/
uint64_t u64RamSize;
rc = CFGMR3QueryU64(pCfg, "RamSize", &u64RamSize);
if (RT_FAILURE (rc))
return PDMDEV_SET_ERROR(pDevIns, rc,
N_("Configuration error: Failed to read \"RamSize\""));
PDMIRAMARRAY pMemArray = (PDMIRAMARRAY)pszStr;
CHECKSIZE(sizeof(*pMemArray));
START_STRUCT(pMemArray);
if (fDmiExposeMemoryTable)
pMemArray->header.u8Type = 16; /* Physical Memory Array */
else
pMemArray->header.u8Type = 126; /* inactive structure */
pMemArray->header.u8Length = sizeof(*pMemArray);
pMemArray->header.u16Handle = 0x0005;
pMemArray->u8Location = 0x03; /* Motherboard */
pMemArray->u8Use = 0x03; /* System memory */
pMemArray->u8MemErrorCorrection = 0x01; /* Other */
pMemArray->u32MaxCapacity = (uint32_t)(u64RamSize / _1K); /* RAM size in K */
pMemArray->u16MemErrorHandle = 0xfffe; /* No error info structure */
pMemArray->u16NumberOfMemDevices = 1;
TERM_STRUCT;
/***************************************
* DMI Memory Device (Type 17) *
***************************************/
PDMIMEMORYDEV pMemDev = (PDMIMEMORYDEV)pszStr;
CHECKSIZE(sizeof(*pMemDev));
START_STRUCT(pMemDev);
if (fDmiExposeMemoryTable)
pMemDev->header.u8Type = 17; /* Memory Device */
else
pMemDev->header.u8Type = 126; /* inactive structure */
pMemDev->header.u8Length = sizeof(*pMemDev);
pMemDev->header.u16Handle = 0x0006;
pMemDev->u16PhysMemArrayHandle = 0x0005; /* handle of array we belong to */
pMemDev->u16MemErrHandle = 0xfffe; /* system doesn't provide this information */
pMemDev->u16TotalWidth = 0xffff; /* Unknown */
pMemDev->u16DataWidth = 0xffff; /* Unknown */
int16_t u16RamSizeM = (uint16_t)(u64RamSize / _1M);
if (u16RamSizeM == 0)
u16RamSizeM = 0x400; /* 1G */
pMemDev->u16Size = u16RamSizeM; /* RAM size */
pMemDev->u8FormFactor = 0x09; /* DIMM */
pMemDev->u8DeviceSet = 0x00; /* Not part of a device set */
READCFGSTRDEF(pMemDev->u8DeviceLocator, " ", "DIMM 0");
READCFGSTRDEF(pMemDev->u8BankLocator, " ", "Bank 0");
pMemDev->u8MemoryType = 0x03; /* DRAM */
pMemDev->u16TypeDetail = 0; /* Nothing special */
pMemDev->u16Speed = 1600; /* Unknown, shall be speed in MHz */
READCFGSTR(pMemDev->u8Manufacturer, DmiSystemVendor);
READCFGSTRDEF(pMemDev->u8SerialNumber, " ", "00000000");
READCFGSTRDEF(pMemDev->u8AssetTag, " ", "00000000");
READCFGSTRDEF(pMemDev->u8PartNumber, " ", "00000000");
pMemDev->u8Attributes = 0; /* Unknown */
TERM_STRUCT;
/*****************************
* DMI OEM strings (Type 11) *
*****************************/
PDMIOEMSTRINGS pOEMStrings = (PDMIOEMSTRINGS)pszStr;
CHECKSIZE(sizeof(*pOEMStrings));
START_STRUCT(pOEMStrings);
#ifdef VBOX_WITH_DMI_OEMSTRINGS
pOEMStrings->header.u8Type = 0xb; /* OEM Strings */
#else
pOEMStrings->header.u8Type = 126; /* inactive structure */
#endif
pOEMStrings->header.u8Length = sizeof(*pOEMStrings);
pOEMStrings->header.u16Handle = 0x0002;
pOEMStrings->u8Count = 2;
char szTmp[64];
RTStrPrintf(szTmp, sizeof(szTmp), "vboxVer_%u.%u.%u",
RTBldCfgVersionMajor(), RTBldCfgVersionMinor(), RTBldCfgVersionBuild());
READCFGSTRDEF(pOEMStrings->u8VBoxVersion, "DmiOEMVBoxVer", szTmp);
RTStrPrintf(szTmp, sizeof(szTmp), "vboxRev_%u", RTBldCfgRevision());
READCFGSTRDEF(pOEMStrings->u8VBoxRevision, "DmiOEMVBoxRev", szTmp);
TERM_STRUCT;
/*************************************
* DMI OEM specific table (Type 128) *
************************************/
PDMIOEMSPECIFIC pOEMSpecific = (PDMIOEMSPECIFIC)pszStr;
CHECKSIZE(sizeof(*pOEMSpecific));
START_STRUCT(pOEMSpecific);
pOEMSpecific->header.u8Type = 0x80; /* OEM specific */
pOEMSpecific->header.u8Length = sizeof(*pOEMSpecific);
pOEMSpecific->header.u16Handle = 0x0008; /* Just next free handle */
pOEMSpecific->u32CpuFreqKHz = RT_H2LE_U32((uint32_t)((uint64_t)TMCpuTicksPerSecond(PDMDevHlpGetVM(pDevIns)) / 1000));
TERM_STRUCT;
/* End-of-table marker - includes padding to account for fixed table size. */
PDMIHDR pEndOfTable = (PDMIHDR)pszStr;
pszStr = (char *)(pEndOfTable + 1);
pEndOfTable->u8Type = 0x7f;
pEndOfTable->u8Length = sizeof(*pEndOfTable);
pEndOfTable->u16Handle = 0xFEFF;
*pcbDmiTables = ((uintptr_t)pszStr - (uintptr_t)pTable) + 2;
/* We currently plant 10 DMI tables. Update this if tables number changed. */
*pcNumDmiTables = 10;
/* If more fields are added here, fix the size check in READCFGSTR */
/* Success! */
break;
}
#undef READCFGSTR
#undef READCFGINT
#undef CHECKSIZE
return VINF_SUCCESS;
}
int main()
{
/*
* Init runtime.
*/
RTR3InitExeNoArguments(RTR3INIT_FLAGS_SUPLIB);
/*
* Create empty VM structure and init SSM.
*/
PVM pVM;
int rc = SUPR3Init(NULL);
if (RT_SUCCESS(rc))
rc = SUPR3PageAlloc(RT_ALIGN_Z(sizeof(*pVM), PAGE_SIZE) >> PAGE_SHIFT, (void **)&pVM);
if (RT_FAILURE(rc))
{
RTPrintf("Fatal error: SUP Failure! rc=%Rrc\n", rc);
return 1;
}
static UVM s_UVM;
PUVM pUVM = &s_UVM;
pUVM->pVM = pVM;
pVM->pUVM = pUVM;
rc = STAMR3InitUVM(pUVM);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: STAMR3Init failed. rc=%Rrc\n", rc);
return 1;
}
rc = MMR3InitUVM(pUVM);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: STAMR3Init failed. rc=%Rrc\n", rc);
return 1;
}
rc = CFGMR3Init(pVM, NULL, NULL);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3Init failed. rc=%Rrc\n", rc);
return 1;
}
if (!CFGMR3GetRoot(pVM))
{
RTPrintf("FAILURE: CFGMR3GetRoot failed\n");
return 1;
}
/* integer */
uint64_t u64;
rc = CFGMR3QueryU64(CFGMR3GetRoot(pVM), "RamSize", &u64);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QueryU64(,\"RamSize\",) failed. rc=%Rrc\n", rc);
return 1;
}
size_t cb;
rc = CFGMR3QuerySize(CFGMR3GetRoot(pVM), "RamSize", &cb);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QuerySize(,\"RamSize\",) failed. rc=%Rrc\n", rc);
return 1;
}
if (cb != sizeof(uint64_t))
{
RTPrintf("FAILURE: Incorrect valuesize %d for \"RamSize\" value.\n", cb);
return 1;
}
/* string */
char *pszName = NULL;
rc = CFGMR3QueryStringAlloc(CFGMR3GetRoot(pVM), "Name", &pszName);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QueryStringAlloc(,\"Name\" failed. rc=%Rrc\n", rc);
return 1;
}
rc = CFGMR3QuerySize(CFGMR3GetRoot(pVM), "Name", &cb);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QuerySize(,\"RamSize\",) failed. rc=%Rrc\n", rc);
return 1;
}
if (cb != strlen(pszName) + 1)
{
RTPrintf("FAILURE: Incorrect valuesize %d for \"Name\" value '%s'.\n", cb, pszName);
return 1;
}
MMR3HeapFree(pszName);
/* test multilevel node creation */
PCFGMNODE pChild = NULL;
rc = CFGMR3InsertNode(CFGMR3GetRoot(pVM), "First/Second/Third//Final", &pChild);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3InsertNode(,\"First/Second/Third//Final\" failed. rc=%Rrc\n", rc);
return 1;
}
rc = CFGMR3InsertInteger(pChild, "BoolValue", 1);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3InsertInteger(,\"BoolValue\", 1) failed. rc=%Rrc\n", rc);
return 1;
}
PCFGMNODE pNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "First/Second/Third/Final");
if (pNode != pChild)
{
RTPrintf("FAILURE: CFGMR3GetChild(,\"First/Second/Third/Final/BoolValue\") failed. pNode=%p expected %p\n", pNode, pChild);
return 1;
}
bool f = false;
rc = CFGMR3QueryBool(pNode, "BoolValue", &f);
if (RT_FAILURE(rc) || !f)
{
RTPrintf("FAILURE: CFGMR3QueryBool(,\"BoolValue\",) failed. rc=%Rrc f=%d\n", rc, f);
return 1;
}
/* done */
rc = CFGMR3Term(pVM);
if (RT_FAILURE(rc))
{
RTPrintf("FAILURE: CFGMR3QueryU64(,\"RamSize\" failed. rc=%Rrc\n", rc);
return 1;
}
RTPrintf("tstCFGM: SUCCESS\n");
return rc;
}
/**
* Construct the DMI table.
*
* @returns VBox status code.
* @param pDevIns The device instance.
* @param pTable Where to create the DMI table.
* @param cbMax The maximum size of the DMI table.
* @param pUuid Pointer to the UUID to use if the DmiUuid
* configuration string isn't present.
* @param pCfg The handle to our config node.
*/
int FwCommonPlantDMITable(PPDMDEVINS pDevIns, uint8_t *pTable, unsigned cbMax, PCRTUUID pUuid, PCFGMNODE pCfg)
{
#define CHECKSIZE(cbWant) \
{ \
size_t cbNeed = (size_t)(pszStr + cbWant - (char *)pTable) + 5; /* +1 for strtab terminator +4 for end-of-table entry */ \
if (cbNeed > cbMax) \
{ \
if (fHideErrors) \
{ \
LogRel(("One of the DMI strings is too long -- using default DMI data!\n")); \
continue; \
} \
return PDMDevHlpVMSetError(pDevIns, VERR_TOO_MUCH_DATA, RT_SRC_POS, \
N_("One of the DMI strings is too long. Check all bios/Dmi* configuration entries. At least %zu bytes are needed but there is no space for more than %d bytes"), cbNeed, cbMax); \
} \
}
#define READCFGSTRDEF(variable, name, default_value) \
{ \
if (fForceDefault) \
pszTmp = default_value; \
else \
{ \
rc = CFGMR3QueryStringDef(pCfg, name, szBuf, sizeof(szBuf), default_value); \
if (RT_FAILURE(rc)) \
{ \
if (fHideErrors) \
{ \
LogRel(("Configuration error: Querying \"" name "\" as a string failed -- using default DMI data!\n")); \
continue; \
} \
return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, \
N_("Configuration error: Querying \"" name "\" as a string failed")); \
} \
else if (!strcmp(szBuf, "<EMPTY>")) \
pszTmp = ""; \
else \
pszTmp = szBuf; \
} \
if (!pszTmp[0]) \
variable = 0; /* empty string */ \
else \
{ \
variable = iStrNr++; \
size_t cStr = strlen(pszTmp) + 1; \
CHECKSIZE(cStr); \
memcpy(pszStr, pszTmp, cStr); \
pszStr += cStr ; \
} \
}
#define READCFGSTR(variable, name) \
READCFGSTRDEF(variable, # name, s_szDef ## name)
#define READCFGINT(variable, name) \
{ \
if (fForceDefault) \
variable = s_iDef ## name; \
else \
{ \
rc = CFGMR3QueryS32Def(pCfg, # name, & variable, s_iDef ## name); \
if (RT_FAILURE(rc)) \
{ \
if (fHideErrors) \
{ \
LogRel(("Configuration error: Querying \"" # name "\" as an int failed -- using default DMI data!\n")); \
continue; \
} \
return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, \
N_("Configuration error: Querying \"" # name "\" as an int failed")); \
} \
} \
}
#define START_STRUCT(tbl) \
pszStr = (char *)(tbl + 1); \
iStrNr = 1;
#define TERM_STRUCT \
{ \
*pszStr++ = '\0'; /* terminate set of text strings */ \
if (iStrNr == 1) \
*pszStr++ = '\0'; /* terminate a structure without strings */ \
}
bool fForceDefault = false;
#ifdef VBOX_BIOS_DMI_FALLBACK
/*
* There will be two passes. If an error occurs during the first pass, a
* message will be written to the release log and we fall back to default
* DMI data and start a second pass.
*/
bool fHideErrors = true;
#else
/*
* There will be one pass, every error is fatal and will prevent the VM
* from starting.
*/
bool fHideErrors = false;
#endif
uint8_t fDmiUseHostInfo;
int rc = CFGMR3QueryU8Def(pCfg, "DmiUseHostInfo", &fDmiUseHostInfo, 0);
if (RT_FAILURE (rc))
return PDMDEV_SET_ERROR(pDevIns, rc,
N_("Configuration error: Failed to read \"DmiUseHostInfo\""));
/* Sync up with host default DMI values */
if (fDmiUseHostInfo)
fwCommonUseHostDMIStrings();
uint8_t fDmiExposeMemoryTable;
rc = CFGMR3QueryU8Def(pCfg, "DmiExposeMemoryTable", &fDmiExposeMemoryTable, 0);
if (RT_FAILURE (rc))
return PDMDEV_SET_ERROR(pDevIns, rc,
N_("Configuration error: Failed to read \"DmiExposeMemoryTable\""));
for (;; fForceDefault = true, fHideErrors = false)
{
int iStrNr;
char szBuf[256];
char *pszStr = (char *)pTable;
char szDmiSystemUuid[64];
char *pszDmiSystemUuid;
const char *pszTmp;
if (fForceDefault)
pszDmiSystemUuid = NULL;
else
{
rc = CFGMR3QueryString(pCfg, "DmiSystemUuid", szDmiSystemUuid, sizeof(szDmiSystemUuid));
if (rc == VERR_CFGM_VALUE_NOT_FOUND)
pszDmiSystemUuid = NULL;
else if (RT_FAILURE(rc))
{
if (fHideErrors)
{
LogRel(("Configuration error: Querying \"DmiSystemUuid\" as a string failed, using default DMI data\n"));
continue;
}
return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
N_("Configuration error: Querying \"DmiSystemUuid\" as a string failed"));
}
else
pszDmiSystemUuid = szDmiSystemUuid;
}
/*********************************
* DMI BIOS information (Type 0) *
*********************************/
PDMIBIOSINF pBIOSInf = (PDMIBIOSINF)pszStr;
CHECKSIZE(sizeof(*pBIOSInf));
pszStr = (char *)&pBIOSInf->u8ReleaseMajor;
pBIOSInf->header.u8Length = RT_OFFSETOF(DMIBIOSINF, u8ReleaseMajor);
/* don't set these fields by default for legacy compatibility */
int iDmiBIOSReleaseMajor, iDmiBIOSReleaseMinor;
READCFGINT(iDmiBIOSReleaseMajor, DmiBIOSReleaseMajor);
READCFGINT(iDmiBIOSReleaseMinor, DmiBIOSReleaseMinor);
if (iDmiBIOSReleaseMajor != 0 || iDmiBIOSReleaseMinor != 0)
{
pszStr = (char *)&pBIOSInf->u8FirmwareMajor;
pBIOSInf->header.u8Length = RT_OFFSETOF(DMIBIOSINF, u8FirmwareMajor);
pBIOSInf->u8ReleaseMajor = iDmiBIOSReleaseMajor;
pBIOSInf->u8ReleaseMinor = iDmiBIOSReleaseMinor;
int iDmiBIOSFirmwareMajor, iDmiBIOSFirmwareMinor;
READCFGINT(iDmiBIOSFirmwareMajor, DmiBIOSFirmwareMajor);
READCFGINT(iDmiBIOSFirmwareMinor, DmiBIOSFirmwareMinor);
if (iDmiBIOSFirmwareMajor != 0 || iDmiBIOSFirmwareMinor != 0)
{
pszStr = (char *)(pBIOSInf + 1);
pBIOSInf->header.u8Length = sizeof(DMIBIOSINF);
pBIOSInf->u8FirmwareMajor = iDmiBIOSFirmwareMajor;
pBIOSInf->u8FirmwareMinor = iDmiBIOSFirmwareMinor;
}
}
iStrNr = 1;
pBIOSInf->header.u8Type = 0; /* BIOS Information */
pBIOSInf->header.u16Handle = 0x0000;
READCFGSTR(pBIOSInf->u8Vendor, DmiBIOSVendor);
READCFGSTR(pBIOSInf->u8Version, DmiBIOSVersion);
pBIOSInf->u16Start = 0xE000;
READCFGSTR(pBIOSInf->u8Release, DmiBIOSReleaseDate);
pBIOSInf->u8ROMSize = 1; /* 128K */
pBIOSInf->u64Characteristics = RT_BIT(4) /* ISA is supported */
| RT_BIT(7) /* PCI is supported */
| RT_BIT(15) /* Boot from CD is supported */
| RT_BIT(16) /* Selectable Boot is supported */
| RT_BIT(27) /* Int 9h, 8042 Keyboard services supported */
| RT_BIT(30) /* Int 10h, CGA/Mono Video Services supported */
/* any more?? */
;
pBIOSInf->u8CharacteristicsByte1 = RT_BIT(0) /* ACPI is supported */
/* any more?? */
;
pBIOSInf->u8CharacteristicsByte2 = 0
/* any more?? */
;
TERM_STRUCT;
/***********************************
* DMI system information (Type 1) *
***********************************/
PDMISYSTEMINF pSystemInf = (PDMISYSTEMINF)pszStr;
CHECKSIZE(sizeof(*pSystemInf));
pszStr = (char *)(pSystemInf + 1);
iStrNr = 1;
pSystemInf->header.u8Type = 1; /* System Information */
pSystemInf->header.u8Length = sizeof(*pSystemInf);
pSystemInf->header.u16Handle = 0x0001;
READCFGSTR(pSystemInf->u8Manufacturer, DmiSystemVendor);
READCFGSTR(pSystemInf->u8ProductName, DmiSystemProduct);
READCFGSTR(pSystemInf->u8Version, DmiSystemVersion);
READCFGSTR(pSystemInf->u8SerialNumber, DmiSystemSerial);
RTUUID uuid;
if (pszDmiSystemUuid)
{
rc = RTUuidFromStr(&uuid, pszDmiSystemUuid);
if (RT_FAILURE(rc))
{
if (fHideErrors)
{
LogRel(("Configuration error: Invalid UUID for DMI tables specified, using default DMI data\n"));
continue;
}
return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
N_("Configuration error: Invalid UUID for DMI tables specified"));
}
uuid.Gen.u32TimeLow = RT_H2BE_U32(uuid.Gen.u32TimeLow);
uuid.Gen.u16TimeMid = RT_H2BE_U16(uuid.Gen.u16TimeMid);
uuid.Gen.u16TimeHiAndVersion = RT_H2BE_U16(uuid.Gen.u16TimeHiAndVersion);
pUuid = &uuid;
}
memcpy(pSystemInf->au8Uuid, pUuid, sizeof(RTUUID));
pSystemInf->u8WakeupType = 6; /* Power Switch */
READCFGSTR(pSystemInf->u8SKUNumber, DmiSystemSKU);
READCFGSTR(pSystemInf->u8Family, DmiSystemFamily);
TERM_STRUCT;
/********************************************
* DMI System Enclosure or Chassis (Type 3) *
********************************************/
PDMICHASSIS pChassis = (PDMICHASSIS)pszStr;
CHECKSIZE(sizeof(*pChassis));
pszStr = (char*)&pChassis->u32OEMdefined;
iStrNr = 1;
#ifdef VBOX_WITH_DMI_CHASSIS
pChassis->header.u8Type = 3; /* System Enclosure or Chassis */
#else
pChassis->header.u8Type = 0x7e; /* inactive */
#endif
pChassis->header.u8Length = RT_OFFSETOF(DMICHASSIS, u32OEMdefined);
pChassis->header.u16Handle = 0x0003;
READCFGSTR(pChassis->u8Manufacturer, DmiChassisVendor);
pChassis->u8Type = 0x01; /* ''other'', no chassis lock present */
READCFGSTR(pChassis->u8Version, DmiChassisVersion);
READCFGSTR(pChassis->u8SerialNumber, DmiChassisSerial);
READCFGSTR(pChassis->u8AssetTag, DmiChassisAssetTag);
pChassis->u8BootupState = 0x03; /* safe */
pChassis->u8PowerSupplyState = 0x03; /* safe */
pChassis->u8ThermalState = 0x03; /* safe */
pChassis->u8SecurityStatus = 0x03; /* none XXX */
# if 0
/* v2.3+, currently not supported */
pChassis->u32OEMdefined = 0;
pChassis->u8Height = 0; /* unspecified */
pChassis->u8NumPowerChords = 0; /* unspecified */
pChassis->u8ContElems = 0; /* no contained elements */
pChassis->u8ContElemRecLen = 0; /* no contained elements */
# endif
TERM_STRUCT;
if (fDmiExposeMemoryTable)
{
/***************************************
* DMI Physical Memory Array (Type 16) *
***************************************/
uint64_t u64RamSize;
rc = CFGMR3QueryU64(pCfg, "RamSize", &u64RamSize);
if (RT_FAILURE (rc))
return PDMDEV_SET_ERROR(pDevIns, rc,
N_("Configuration error: Failed to read \"RamSize\""));
PDMIRAMARRAY pMemArray = (PDMIRAMARRAY)pszStr;
CHECKSIZE(sizeof(*pMemArray));
START_STRUCT(pMemArray);
pMemArray->header.u8Type = 16; /* Physical Memory Array */
pMemArray->header.u8Length = sizeof(*pMemArray);
pMemArray->header.u16Handle = 0x0005;
pMemArray->u8Location = 0x03; /* Motherboard */
pMemArray->u8Use = 0x03; /* System memory */
pMemArray->u8MemErrorCorrection = 0x01; /* Other */
uint32_t u32RamSizeK = (uint32_t)(u64RamSize / _1K);
pMemArray->u32MaxCapacity = u32RamSizeK; /* RAM size in K */
pMemArray->u16MemErrorHandle = 0xfffe; /* No error info structure */
pMemArray->u16NumberOfMemDevices = 1;
TERM_STRUCT;
/***************************************
* DMI Memory Device (Type 17) *
***************************************/
PDMIMEMORYDEV pMemDev = (PDMIMEMORYDEV)pszStr;
CHECKSIZE(sizeof(*pMemDev));
START_STRUCT(pMemDev);
pMemDev->header.u8Type = 17; /* Memory Device */
pMemDev->header.u8Length = sizeof(*pMemDev);
pMemDev->header.u16Handle = 0x0006;
pMemDev->u16PhysMemArrayHandle = 0x0005; /* handle of array we belong to */
pMemDev->u16MemErrHandle = 0xfffe; /* system doesn't provide this information */
pMemDev->u16TotalWidth = 0xffff; /* Unknown */
pMemDev->u16DataWidth = 0xffff; /* Unknown */
int16_t u16RamSizeM = (uint16_t)(u64RamSize / _1M);
if (u16RamSizeM == 0)
u16RamSizeM = 0x400; /* 1G */
pMemDev->u16Size = u16RamSizeM; /* RAM size */
pMemDev->u8FormFactor = 0x09; /* DIMM */
pMemDev->u8DeviceSet = 0x00; /* Not part of a device set */
READCFGSTRDEF(pMemDev->u8DeviceLocator, " ", "DIMM 0");
READCFGSTRDEF(pMemDev->u8BankLocator, " ", "Bank 0");
pMemDev->u8MemoryType = 0x03; /* DRAM */
pMemDev->u16TypeDetail = 0; /* Nothing special */
pMemDev->u16Speed = 1600; /* Unknown, shall be speed in MHz */
READCFGSTR(pMemDev->u8Manufacturer, DmiSystemVendor);
READCFGSTRDEF(pMemDev->u8SerialNumber, " ", "00000000");
READCFGSTRDEF(pMemDev->u8AssetTag, " ", "00000000");
READCFGSTRDEF(pMemDev->u8PartNumber, " ", "00000000");
pMemDev->u8Attributes = 0; /* Unknown */
TERM_STRUCT;
}
/*****************************
* DMI OEM strings (Type 11) *
*****************************/
PDMIOEMSTRINGS pOEMStrings = (PDMIOEMSTRINGS)pszStr;
CHECKSIZE(sizeof(*pOEMStrings));
pszStr = (char *)(pOEMStrings + 1);
iStrNr = 1;
#ifdef VBOX_WITH_DMI_OEMSTRINGS
pOEMStrings->header.u8Type = 0xb; /* OEM Strings */
#else
pOEMStrings->header.u8Type = 0x7e; /* inactive */
#endif
pOEMStrings->header.u8Length = sizeof(*pOEMStrings);
pOEMStrings->header.u16Handle = 0x0002;
pOEMStrings->u8Count = 2;
char szTmp[64];
RTStrPrintf(szTmp, sizeof(szTmp), "vboxVer_%u.%u.%u",
RTBldCfgVersionMajor(), RTBldCfgVersionMinor(), RTBldCfgVersionBuild());
READCFGSTRDEF(pOEMStrings->u8VBoxVersion, "DmiOEMVBoxVer", szTmp);
RTStrPrintf(szTmp, sizeof(szTmp), "vboxRev_%u", RTBldCfgRevision());
READCFGSTRDEF(pOEMStrings->u8VBoxRevision, "DmiOEMVBoxRev", szTmp);
TERM_STRUCT;
/* End-of-table marker - includes padding to account for fixed table size. */
PDMIHDR pEndOfTable = (PDMIHDR)pszStr;
pEndOfTable->u8Type = 0x7f;
pEndOfTable->u8Length = cbMax - ((char *)pszStr - (char *)pTable) - 2;
pEndOfTable->u16Handle = 0xFEFF;
/* If more fields are added here, fix the size check in READCFGSTR */
/* Success! */
break;
}
#undef READCFGSTR
#undef READCFGINT
#undef CHECKSIZE
return VINF_SUCCESS;
}