void __C(CHIP,_mem_unmap)( void *v, bus_space_handle_t memh, bus_size_t memsize, int acct) { bus_addr_t memaddr; int error; if (acct == 0) return; #ifdef EXTENT_DEBUG printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize); #endif memaddr = memh - ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)); #ifdef EXTENT_DEBUG printf("mem: freeing 0x%lx to 0x%lx\n", memaddr, memaddr + memsize - 1); #endif error = extent_free(CHIP_MEM_EXTENT(v), memaddr, memsize, EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); if (error) { printf("%s: WARNING: could not unmap 0x%lx-0x%lx (error %d)\n", __S(__C(CHIP,_mem_unmap)), memaddr, memaddr + memsize - 1, error); #ifdef EXTENT_DEBUG extent_print(CHIP_MEM_EXTENT(v)); #endif } }
int __C(CHIP,_mem_map)( void *v, bus_addr_t memaddr, bus_size_t memsize, int flags, bus_space_handle_t *memhp, int acct) { int error; if (acct == 0) goto mapit; #ifdef EXTENT_DEBUG printf("mem: allocating 0x%lx to 0x%lx\n", memaddr, memaddr + memsize - 1); #endif error = extent_alloc_region(CHIP_MEM_EXTENT(v), memaddr, memsize, EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); if (error) { #ifdef EXTENT_DEBUG printf("mem: allocation failed (%d)\n", error); extent_print(CHIP_MEM_EXTENT(v)); #endif return (error); } mapit: *memhp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr; return (0); }
void tsp_bus_mem_init2(bus_space_tag_t t, void *v) { struct tsp_config *pcp = v; struct ts_pchip *pccsr = pcp->pc_csr; int i, error; /* * Allocate the DMA windows out of the extent map. */ for (i = 0; i < 4; i++) { alpha_mb(); if ((pccsr->tsp_wsba[i].tsg_r & WSBA_ENA) == 0) { /* Window not in use. */ continue; } error = extent_alloc_region(CHIP_MEM_EXTENT(v), WSBA_ADDR(pccsr->tsp_wsba[i].tsg_r), WSM_LEN(pccsr->tsp_wsm[i].tsg_r), EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); if (error) { printf("WARNING: unable to reserve DMA window " "0x%lx - 0x%lx\n", WSBA_ADDR(pccsr->tsp_wsba[i].tsg_r), WSBA_ADDR(pccsr->tsp_wsba[i].tsg_r) + (WSM_LEN(pccsr->tsp_wsm[i].tsg_r) - 1)); } } }
int __C(CHIP,_mem_alloc)( void *v, bus_addr_t rstart, bus_addr_t rend, bus_size_t size, bus_size_t align, bus_size_t boundary, int flags, bus_addr_t *addrp, bus_space_handle_t *bshp) { bus_addr_t memaddr; int error; /* * Do the requested allocation. */ #ifdef EXTENT_DEBUG printf("mem: allocating from 0x%lx to 0x%lx\n", rstart, rend); #endif error = extent_alloc_subregion(CHIP_MEM_EXTENT(v), rstart, rend, size, align, boundary, EX_FAST | EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0), &memaddr); if (error) { #ifdef EXTENT_DEBUG printf("mem: allocation failed (%d)\n", error); extent_print(CHIP_MEM_EXTENT(v)); #endif } #ifdef EXTENT_DEBUG printf("mem: allocated 0x%lx to 0x%lx\n", memaddr, memaddr + size - 1); #endif *addrp = memaddr; *bshp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr; return (0); }
void irongate_bus_mem_init2(bus_space_tag_t t, void *v) { u_long size, start, end; int i, error; /* * Since the AMD 751 doesn't have DMA windows, we need to * allocate RAM out of the extent map. */ for (i = 0; i < mem_cluster_cnt; i++) { start = mem_clusters[i].start; size = mem_clusters[i].size & ~PAGE_MASK; end = mem_clusters[i].start + size; if (start <= IOM_BEGIN && end >= IOM_END) { /* * The ISA hole lies somewhere in this * memory cluster. The UP1000 firmware * doesn't report this to us properly, * so we have to cope, since devices are * mapped into the ISA hole, but RAM is * not. * * Sigh, the UP1000 is a really cool machine, * but it is sometimes too PC-like for my * taste. */ if (start < IOM_BEGIN) { error = extent_alloc_region(CHIP_MEM_EXTENT(v), start, (IOM_BEGIN - start), EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); if (error) { printf("WARNING: unable to reserve " "chunk from mem cluster %d " "(0x%lx - 0x%lx)\n", i, start, (u_long) IOM_BEGIN - 1); } } if (end > IOM_END) { error = extent_alloc_region(CHIP_MEM_EXTENT(v), IOM_END, (end - IOM_END), EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); if (error) { printf("WARNING: unable to reserve " "chunk from mem cluster %d " "(0x%lx - 0x%lx)\n", i, (u_long) IOM_END, end - 1); } } } else { error = extent_alloc_region(CHIP_MEM_EXTENT(v), start, size, EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)); if (error) { printf("WARNING: unable reserve mem cluster %d " "(0x%lx - 0x%lx)\n", i, start, start + (size - 1)); } } } }
void __C(CHIP,_bus_mem_init)( bus_space_tag_t t, void *v) { struct extent *ex; /* * Initialize the bus space tag. */ /* cookie */ t->abs_cookie = v; /* mapping/unmapping */ t->abs_map = __C(CHIP,_mem_map); t->abs_unmap = __C(CHIP,_mem_unmap); t->abs_subregion = __C(CHIP,_mem_subregion); t->abs_translate = __C(CHIP,_mem_translate); t->abs_get_window = __C(CHIP,_mem_get_window); /* allocation/deallocation */ t->abs_alloc = __C(CHIP,_mem_alloc); t->abs_free = __C(CHIP,_mem_free); /* get kernel virtual address */ t->abs_vaddr = __C(CHIP,_mem_vaddr); /* mmap for user */ t->abs_mmap = __C(CHIP,_mem_mmap); /* barrier */ t->abs_barrier = __C(CHIP,_mem_barrier); /* read (single) */ t->abs_r_1 = __C(CHIP,_mem_read_1); t->abs_r_2 = __C(CHIP,_mem_read_2); t->abs_r_4 = __C(CHIP,_mem_read_4); t->abs_r_8 = __C(CHIP,_mem_read_8); /* read multiple */ t->abs_rm_1 = __C(CHIP,_mem_read_multi_1); t->abs_rm_2 = __C(CHIP,_mem_read_multi_2); t->abs_rm_4 = __C(CHIP,_mem_read_multi_4); t->abs_rm_8 = __C(CHIP,_mem_read_multi_8); /* read region */ t->abs_rr_1 = __C(CHIP,_mem_read_region_1); t->abs_rr_2 = __C(CHIP,_mem_read_region_2); t->abs_rr_4 = __C(CHIP,_mem_read_region_4); t->abs_rr_8 = __C(CHIP,_mem_read_region_8); /* write (single) */ t->abs_w_1 = __C(CHIP,_mem_write_1); t->abs_w_2 = __C(CHIP,_mem_write_2); t->abs_w_4 = __C(CHIP,_mem_write_4); t->abs_w_8 = __C(CHIP,_mem_write_8); /* write multiple */ t->abs_wm_1 = __C(CHIP,_mem_write_multi_1); t->abs_wm_2 = __C(CHIP,_mem_write_multi_2); t->abs_wm_4 = __C(CHIP,_mem_write_multi_4); t->abs_wm_8 = __C(CHIP,_mem_write_multi_8); /* write region */ t->abs_wr_1 = __C(CHIP,_mem_write_region_1); t->abs_wr_2 = __C(CHIP,_mem_write_region_2); t->abs_wr_4 = __C(CHIP,_mem_write_region_4); t->abs_wr_8 = __C(CHIP,_mem_write_region_8); /* set multiple */ t->abs_sm_1 = __C(CHIP,_mem_set_multi_1); t->abs_sm_2 = __C(CHIP,_mem_set_multi_2); t->abs_sm_4 = __C(CHIP,_mem_set_multi_4); t->abs_sm_8 = __C(CHIP,_mem_set_multi_8); /* set region */ t->abs_sr_1 = __C(CHIP,_mem_set_region_1); t->abs_sr_2 = __C(CHIP,_mem_set_region_2); t->abs_sr_4 = __C(CHIP,_mem_set_region_4); t->abs_sr_8 = __C(CHIP,_mem_set_region_8); /* copy */ t->abs_c_1 = __C(CHIP,_mem_copy_region_1); t->abs_c_2 = __C(CHIP,_mem_copy_region_2); t->abs_c_4 = __C(CHIP,_mem_copy_region_4); t->abs_c_8 = __C(CHIP,_mem_copy_region_8); ex = extent_create(__S(__C(CHIP,_bus_mem)), 0x0UL, 0xffffffffUL, (void *)CHIP_MEM_EX_STORE(v), CHIP_MEM_EX_STORE_SIZE(v), EX_NOWAIT|EX_NOCOALESCE); CHIP_MEM_EXTENT(v) = ex; }