static void USB_HostApplicationInit(void)
{
usb_status_t status = kStatus_USB_Success;
IRQn_Type usbIrq;
#if ((defined USB_HOST_CONFIG_KHCI) && (USB_HOST_CONFIG_KHCI))
IRQn_Type usbFsIrqs[] = USB_IRQS;
usbIrq = usbFsIrqs[CONTROLLER_ID - kUSB_ControllerKhci0];
CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcPll0, CLOCK_GetFreq(kCLOCK_PllFllSelClk));
#endif /* USB_HOST_CONFIG_KHCI */
#if ((defined USB_HOST_CONFIG_EHCI) && (USB_HOST_CONFIG_EHCI))
IRQn_Type usbHsIrqs[] = USBHS_IRQS;
usbIrq = usbHsIrqs[CONTROLLER_ID - kUSB_ControllerEhci0];
CLOCK_EnableUsbhs0Clock(kCLOCK_UsbSrcPll0, CLOCK_GetFreq(kCLOCK_PllFllSelClk));
USB_EhciPhyInit(CONTROLLER_ID, BOARD_XTAL0_CLK_HZ);
#endif /* USB_HOST_CONFIG_EHCI */
#if ((defined FSL_FEATURE_SOC_MPU_COUNT) && (FSL_FEATURE_SOC_MPU_COUNT))
MPU_Enable(MPU, 0);
#endif /* FSL_FEATURE_SOC_MPU_COUNT */
status = USB_HostInit(CONTROLLER_ID, &g_HostHandle, USB_HostEvent);
if (status != kStatus_USB_Success)
{
usb_echo("host init error\r\n");
return;
}
NVIC_SetPriority(usbIrq, USB_HOST_INTERRUPT_PRIORITY);
NVIC_EnableIRQ(usbIrq);
usb_echo("host init done\r\n");
}
/*!
* @brief Application initialization function.
*
* This function initializes the application.
*
* @return None.
*/
void APPInit(void)
{
uint8_t irqNo;
#if defined(USB_DEVICE_CONFIG_EHCI) && (USB_DEVICE_CONFIG_EHCI > 0)
uint8_t ehciIrq[] = USBHS_IRQS;
irqNo = ehciIrq[CONTROLLER_ID - kUSB_ControllerEhci0];
CLOCK_EnableUsbhs0Clock(kCLOCK_UsbSrcPll0, CLOCK_GetFreq(kCLOCK_PllFllSelClk));
USB_EhciPhyInit(CONTROLLER_ID, BOARD_XTAL0_CLK_HZ);
#endif
#if defined(USB_DEVICE_CONFIG_KHCI) && (USB_DEVICE_CONFIG_KHCI > 0)
uint8_t khciIrq[] = USB_IRQS;
irqNo = khciIrq[CONTROLLER_ID - kUSB_ControllerKhci0];
SystemCoreClockUpdate();
#if ((defined FSL_FEATURE_USB_KHCI_IRC48M_MODULE_CLOCK_ENABLED) && (FSL_FEATURE_USB_KHCI_IRC48M_MODULE_CLOCK_ENABLED))
CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U);
#else
CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcPll0, CLOCK_GetFreq(kCLOCK_PllFllSelClk));
#endif /* FSL_FEATURE_USB_KHCI_IRC48M_MODULE_CLOCK_ENABLED */
#endif
#if (defined(FSL_FEATURE_SOC_MPU_COUNT) && (FSL_FEATURE_SOC_MPU_COUNT > 0U))
MPU_Enable(MPU, 0);
#endif /* FSL_FEATURE_SOC_MPU_COUNT */
/*
* If the SOC has USB KHCI dedicated RAM, the RAM memory needs to be clear after
* the KHCI clock is enabled. When the demo uses USB EHCI IP, the USB KHCI dedicated
* RAM can not be used and the memory can't be accessed.
*/
#if (defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U))
#if (defined(FSL_FEATURE_USB_KHCI_USB_RAM_BASE_ADDRESS) && (FSL_FEATURE_USB_KHCI_USB_RAM_BASE_ADDRESS > 0U))
for (int i = 0; i < FSL_FEATURE_USB_KHCI_USB_RAM; i++)
{
((uint8_t *)FSL_FEATURE_USB_KHCI_USB_RAM_BASE_ADDRESS)[i] = 0x00U;
}
#endif /* FSL_FEATURE_USB_KHCI_USB_RAM_BASE_ADDRESS */
#endif /* FSL_FEATURE_USB_KHCI_USB_RAM */
s_cdcVcom.speed = USB_SPEED_FULL;
s_cdcVcom.attach = 0;
s_cdcVcom.deviceHandle = NULL;
if (kStatus_USB_Success != USB_DeviceInit(CONTROLLER_ID, USB_DeviceCallback, &s_cdcVcom.deviceHandle))
{
usb_echo("USB device vcom failed\r\n");
return;
}
else
{
usb_echo("USB device CDC vcom demo\r\n");
}
NVIC_SetPriority((IRQn_Type)irqNo, USB_DEVICE_INTERRUPT_PRIORITY);
NVIC_EnableIRQ((IRQn_Type)irqNo);
USB_DeviceRun(s_cdcVcom.deviceHandle);
}
/*!
* @brief app initialization.
*/
void APP_init(void)
{
usb_status_t status = kStatus_USB_Success;
IRQn_Type usb_irq;
usb_uartConfiguration uartConfiguration;
g_xfer.buffer = (uint8_t *)&usbRecvUart[0];
g_xfer.size = USB_HOST_CDC_UART_RX_MAX_LEN;
USB_UartGetDefaultConfiguratoion(&uartConfiguration);
uartConfiguration.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE;
uartConfiguration.enableTx = true;
uartConfiguration.enableRx = true;
USB_UartInit((USB_UartType *)BOARD_DEBUG_UART_BASEADDR, &uartConfiguration, CLOCK_GetFreq(BOARD_DEBUG_UART_CLKSRC));
USB_UartCreateHandle((USB_UartType *)BOARD_DEBUG_UART_BASEADDR, &g_UartHandle, UART_UserCallback, NULL);
USB_UartReceiveDataIRQ((USB_UartType *)BOARD_DEBUG_UART_BASEADDR, &g_UartHandle, &g_xfer, NULL);
g_AttachFlag = 0;
USB_HostCdcInitBuffer();
#if ((defined USB_HOST_CONFIG_KHCI) && (USB_HOST_CONFIG_KHCI))
IRQn_Type usb_fs_irqs[] = USB_IRQS;
usb_irq = usb_fs_irqs[CONTROLLER_ID - kUSB_ControllerKhci0];
CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcPll0, CLOCK_GetFreq(kCLOCK_PllFllSelClk));
#endif
#if ((defined USB_HOST_CONFIG_EHCI) && (USB_HOST_CONFIG_EHCI))
IRQn_Type usb_hs_irqs[] = USBHS_IRQS;
usb_irq = usb_hs_irqs[CONTROLLER_ID - kUSB_ControllerEhci0];
CLOCK_EnableUsbhs0Clock(kCLOCK_UsbSrcPll0, CLOCK_GetFreq(kCLOCK_PllFllSelClk));
USB_EhciPhyInit(CONTROLLER_ID, BOARD_XTAL0_CLK_HZ);
#endif
#if ((defined FSL_FEATURE_SOC_MPU_COUNT) && (FSL_FEATURE_SOC_MPU_COUNT))
MPU_Enable(MPU, 0);
#endif /* FSL_FEATURE_SOC_MPU_COUNT */
status = USB_HostInit(CONTROLLER_ID, &g_hostHandle, USB_HostEvent);
if (status != kStatus_USB_Success)
{
usb_echo("host init error\r\n");
return;
}
NVIC_SetPriority(usb_irq, USB_HOST_INTERRUPT_PRIORITY);
NVIC_EnableIRQ(usb_irq);
usb_echo("host init done\r\n");
usb_echo("This example requires that the CDC device uses Hardware flow\r\n");
usb_echo(
"if the device does't support it, please set USB_HOST_UART_SUPPORT_HW_FLOW to zero and rebuild this "
"project\r\n");
usb_echo("Type strings, then the string\r\n");
usb_echo("will be echoed back from the device\r\n");
}
/** Initialize the high frequency ticker
*
*/
void us_ticker_init(void)
{
/* Common for ticker/timer. */
uint32_t busClock;
/* Structure to initialize PIT. */
pit_config_t pitConfig;
PIT_GetDefaultConfig(&pitConfig);
PIT_Init(PIT, &pitConfig);
busClock = CLOCK_GetFreq(kCLOCK_BusClk);
/* Let the timer to count if re-init. */
if (!us_ticker_inited) {
PIT_SetTimerPeriod(PIT, kPIT_Chnl_0, busClock / 1000000 - 1);
PIT_SetTimerPeriod(PIT, kPIT_Chnl_1, 0xFFFFFFFF);
PIT_SetTimerChainMode(PIT, kPIT_Chnl_1, true);
PIT_StartTimer(PIT, kPIT_Chnl_0);
PIT_StartTimer(PIT, kPIT_Chnl_1);
}
/* Configure interrupt generation counters and disable ticker interrupts. */
PIT_StopTimer(PIT, kPIT_Chnl_3);
PIT_StopTimer(PIT, kPIT_Chnl_2);
PIT_SetTimerPeriod(PIT, kPIT_Chnl_2, busClock / 1000000 - 1);
PIT_SetTimerChainMode(PIT, kPIT_Chnl_3, true);
NVIC_SetVector(PIT3_IRQn, (uint32_t) pit_isr);
NVIC_EnableIRQ(PIT3_IRQn);
PIT_DisableInterrupts(PIT, kPIT_Chnl_3, kPIT_TimerInterruptEnable);
us_ticker_inited = true;
}
/*!
* @brief Main function
*/
int main(void)
{
uint8_t ch;
lpuart_config_t config;
BOARD_InitPins();
BOARD_BootClockRUN();
CLOCK_SetLpuart1Clock(1U);
/*
* config.baudRate_Bps = 115200U;
* config.parityMode = kLPUART_ParityDisabled;
* config.stopBitCount = kLPUART_OneStopBit;
* config.txFifoWatermark = 0;
* config.rxFifoWatermark = 0;
* config.enableTx = false;
* config.enableRx = false;
*/
LPUART_GetDefaultConfig(&config);
config.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE;
config.enableTx = true;
config.enableRx = true;
LPUART_Init(DEMO_LPUART, &config, CLOCK_GetFreq(DEMO_LPUART_CLKSRC));
LPUART_WriteBlocking(DEMO_LPUART, txbuff, sizeof(txbuff) - 1);
while (1)
{
LPUART_ReadBlocking(DEMO_LPUART, &ch, 1);
LPUART_WriteBlocking(DEMO_LPUART, &ch, 1);
}
}
static int i2c_mcux_configure(struct device *dev, u32_t dev_config_raw)
{
I2C_Type *base = DEV_BASE(dev);
const struct i2c_mcux_config *config = DEV_CFG(dev);
union dev_config dev_config = (union dev_config)dev_config_raw;
u32_t clock_freq;
u32_t baudrate;
if (!dev_config.bits.is_master_device) {
return -EINVAL;
}
if (dev_config.bits.use_10_bit_addr) {
return -EINVAL;
}
switch (dev_config.bits.speed) {
case I2C_SPEED_STANDARD:
baudrate = KHZ(100);
break;
case I2C_SPEED_FAST:
baudrate = MHZ(1);
break;
default:
return -EINVAL;
}
clock_freq = CLOCK_GetFreq(config->clock_source);
I2C_MasterSetBaudRate(base, baudrate, clock_freq);
return 0;
}
void initLPUART(void)
{
lpuart_config_t config;
lpuart_transfer_t xfer;
/*
* config.baudRate_Bps = 115200U;
* config.parityMode = kLPUART_ParityDisabled;
* config.stopBitCount = kLPUART_OneStopBit;
* config.txFifoWatermark = 0;
* config.rxFifoWatermark = 0;
* config.enableTx = false;
* config.enableRx = false;
*/
LPUART_GetDefaultConfig(&config);
config.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE;
config.enableTx = true;
config.enableRx = true;
LPUART_Init(DEMO_LPUART, &config, CLOCK_GetFreq(DEMO_LPUART_CLKSRC));
LPUART_TransferCreateHandle(DEMO_LPUART, &g_lpuartHandle, LPUART_UserCallback, NULL);
/* Send g_tipString out. */
xfer.data = g_tipString;
xfer.dataSize = sizeof(g_tipString) - 1;
txOnGoing = true;
LPUART_TransferSendNonBlocking(DEMO_LPUART, &g_lpuartHandle, &xfer);
/* Wait send finished */
while (txOnGoing)
{
}
/* Start to echo. */
}
/*!
* @brief Main function
*/
int main(void)
{
uint8_t ch;
lpsci_config_t config;
BOARD_InitPins();
BOARD_BootClockRUN();
CLOCK_SetLpsci0Clock(0x1U);
/*
* config.parityMode = kLPSCI_ParityDisabled;
* config.stopBitCount = kLPSCI_OneStopBit;
* config.enableTx = false;
* config.enableRx = false;
*/
LPSCI_GetDefaultConfig(&config);
config.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE;
LPSCI_Init(DEMO_LPSCI, &config, CLOCK_GetFreq(DEMO_LPSCI_CLKSRC));
LPSCI_EnableTx(DEMO_LPSCI, true);
LPSCI_EnableRx(DEMO_LPSCI, true);
LPSCI_WriteBlocking(DEMO_LPSCI, txbuff, sizeof(txbuff) - 1);
while (1)
{
LPSCI_ReadBlocking(DEMO_LPSCI, &ch, 1);
LPSCI_WriteBlocking(DEMO_LPSCI, &ch, 1);
}
}
void serial_init(serial_t *obj, PinName tx, PinName rx)
{
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
obj->index = pinmap_merge(uart_tx, uart_rx);
MBED_ASSERT((int)obj->index != NC);
uart_config_t config;
UART_GetDefaultConfig(&config);
config.baudRate_Bps = 9600;
config.enableTx = false;
config.enableRx = false;
UART_Init(uart_addrs[obj->index], &config, CLOCK_GetFreq(uart_clocks[obj->index]));
pinmap_pinout(tx, PinMap_UART_TX);
pinmap_pinout(rx, PinMap_UART_RX);
if (tx != NC) {
UART_EnableTx(uart_addrs[obj->index], true);
pin_mode(tx, PullUp);
}
if (rx != NC) {
UART_EnableRx(uart_addrs[obj->index], true);
pin_mode(rx, PullUp);
}
if (obj->index == STDIO_UART) {
stdio_uart_inited = 1;
memcpy(&stdio_uart, obj, sizeof(serial_t));
}
}
static int i2c_mcux_configure(struct device *dev, u32_t dev_config_raw)
{
I2C_Type *base = DEV_BASE(dev);
const struct i2c_mcux_config *config = DEV_CFG(dev);
u32_t clock_freq;
u32_t baudrate;
if (!(I2C_MODE_MASTER & dev_config_raw)) {
return -EINVAL;
}
if (I2C_ADDR_10_BITS & dev_config_raw) {
return -EINVAL;
}
switch (I2C_SPEED_GET(dev_config_raw)) {
case I2C_SPEED_STANDARD:
baudrate = KHZ(100);
break;
case I2C_SPEED_FAST:
baudrate = MHZ(1);
break;
default:
return -EINVAL;
}
clock_freq = CLOCK_GetFreq(config->clock_source);
I2C_MasterSetBaudRate(base, baudrate, clock_freq);
return 0;
}
void spi_format(spi_t *obj, int bits, int mode, int slave)
{
dspi_master_config_t master_config;
dspi_slave_config_t slave_config;
/* Bits: values between 4 and 16 are valid */
MBED_ASSERT(bits >= 4 && bits <= 16);
obj->spi.bits = bits;
if (slave) {
/* Slave config */
DSPI_SlaveGetDefaultConfig(&slave_config);
slave_config.whichCtar = kDSPI_Ctar0;
slave_config.ctarConfig.bitsPerFrame = (uint32_t)bits;;
slave_config.ctarConfig.cpol = (mode & 0x2) ? kDSPI_ClockPolarityActiveLow : kDSPI_ClockPolarityActiveHigh;
slave_config.ctarConfig.cpha = (mode & 0x1) ? kDSPI_ClockPhaseSecondEdge : kDSPI_ClockPhaseFirstEdge;
DSPI_SlaveInit(spi_address[obj->spi.instance], &slave_config);
} else {
/* Master config */
DSPI_MasterGetDefaultConfig(&master_config);
master_config.ctarConfig.bitsPerFrame = (uint32_t)bits;;
master_config.ctarConfig.cpol = (mode & 0x2) ? kDSPI_ClockPolarityActiveLow : kDSPI_ClockPolarityActiveHigh;
master_config.ctarConfig.cpha = (mode & 0x1) ? kDSPI_ClockPhaseSecondEdge : kDSPI_ClockPhaseFirstEdge;
master_config.ctarConfig.direction = kDSPI_MsbFirst;
master_config.ctarConfig.pcsToSckDelayInNanoSec = 0;
DSPI_MasterInit(spi_address[obj->spi.instance], &master_config, CLOCK_GetFreq(spi_clocks[obj->spi.instance]));
}
}
void us_ticker_init(void)
{
if (us_ticker_inited) {
return;
}
us_ticker_inited = 1;
//Common for ticker/timer
uint32_t busClock;
// Structure to initialize PIT
pit_config_t pitConfig;
PIT_GetDefaultConfig(&pitConfig);
PIT_Init(PIT, &pitConfig);
busClock = CLOCK_GetFreq(kCLOCK_BusClk);
//Timer
PIT_SetTimerPeriod(PIT, kPIT_Chnl_0, busClock / 1000000 - 1);
PIT_SetTimerPeriod(PIT, kPIT_Chnl_1, 0xFFFFFFFF);
PIT_SetTimerChainMode(PIT, kPIT_Chnl_1, true);
PIT_StartTimer(PIT, kPIT_Chnl_0);
PIT_StartTimer(PIT, kPIT_Chnl_1);
//Ticker
PIT_SetTimerPeriod(PIT, kPIT_Chnl_2, busClock / 1000000 - 1);
PIT_SetTimerChainMode(PIT, kPIT_Chnl_3, true);
NVIC_SetVector(PIT0_IRQn, (uint32_t)pit_isr);
NVIC_EnableIRQ(PIT0_IRQn);
}
void spi_frequency(spi_t *obj, int hz)
{
uint32_t busClock = CLOCK_GetFreq(spi_clocks[obj->spi.instance]);
DSPI_MasterSetBaudRate(spi_address[obj->spi.instance], kDSPI_Ctar0, (uint32_t)hz, busClock);
//Half clock period delay after SPI transfer
DSPI_MasterSetDelayTimes(spi_address[obj->spi.instance], kDSPI_Ctar0, kDSPI_LastSckToPcs, busClock, 500000000 / hz);
}
/*!
* @brief Main function
*/
int main(void)
{
volatile uint32_t i;
uint32_t sysFreq;
/* Structure for OSC configuration */
osc_config_t oscConfig;
oscConfig.freq = BOARD_XTAL0_CLK_HZ;
oscConfig.capLoad = 0U;
oscConfig.workMode = kOSC_ModeOscLowPower;
oscConfig.oscerConfig.enableMode = kOSC_ErClkEnable;
BOARD_InitPins();
CLOCK_InitOsc0(&oscConfig);
CLOCK_SetXtal0Freq(BOARD_XTAL0_CLK_HZ);
/* Set clock divider to safe value to switch mode */
CLOCK_SetSimSafeDivs();
#if (defined(FSL_FEATURE_MCG_HAS_PLL_INTERNAL_MODE) && FSL_FEATURE_MCG_HAS_PLL_INTERNAL_MODE)
/* Calculate frdiv */
if (!APP_GetAvailableFrdiv())
{
while (1)
{
}
}
#endif /* FSL_FEATURE_MCG_HAS_PLL_INTERNAL_MODE || FSL_FEATURE_MCG_USE_PLLREFSEL */
/* Configure pll */
if (!APP_GetAvailablePllConfig(&g_pllConfig))
{
while (1)
{
}
}
APP_BootToPeeExample();
/* Change clock PEE -> PBE -> BLPE */
APP_ChangePeeToBlpeExample();
/* Change clock BLPE -> PBE -> PEE */
APP_ChangeBlpeToPeeExample();
/* Get System clock to blink a LED */
sysFreq = CLOCK_GetFreq(kCLOCK_CoreSysClk) / 20U;
/* Enable a LED */
LED_INIT();
/* Blink a LED */
while (1)
{
for (i = 0; i < sysFreq; i++)
{
__NOP();
}
LED_TOGGLE();
}
}
static int i2c_mcux_init(struct device *dev)
{
I2C_Type *base = DEV_BASE(dev);
const struct i2c_mcux_config *config = DEV_CFG(dev);
struct i2c_mcux_data *data = DEV_DATA(dev);
u32_t clock_freq, bitrate_cfg;
i2c_master_config_t master_config;
int error;
k_sem_init(&data->device_sync_sem, 0, UINT_MAX);
clock_freq = CLOCK_GetFreq(config->clock_source);
I2C_MasterGetDefaultConfig(&master_config);
I2C_MasterInit(base, &master_config, clock_freq);
I2C_MasterTransferCreateHandle(base, &data->handle,
i2c_mcux_master_transfer_callback, dev);
bitrate_cfg = _i2c_map_dt_bitrate(config->bitrate);
error = i2c_mcux_configure(dev, I2C_MODE_MASTER | bitrate_cfg);
if (error) {
return error;
}
config->irq_config_func(dev);
return 0;
}
/**
* Initialises a UART interface
*
*
* @param[in] uart the interface which should be initialised
*
* @return 0 : on success, EIO : if an error occurred with any step
*/
int32_t hal_uart_init(uart_dev_t *uart)
{
usart_config_t config = {0};
status_t status;
config.baudRate_Bps = uart->config.baud_rate;
config.enableRx = true;
config.enableTx = true;
config.loopback = false;
config.fifoConfig.enableTxFifo = false;
config.fifoConfig.enableRxFifo = false;
switch(uart->config.parity)
{
case NO_PARITY:
config.parityMode = kUSART_ParityDisabled;
break;
case ODD_PARITY:
config.parityMode = kUSART_ParityOdd;
break;
case EVEN_PARITY:
config.parityMode = kUSART_ParityEven;
break;
default:
return -EIO;
}
switch(uart->config.data_width)
{
case DATA_WIDTH_7BIT:
config.bitCountPerChar = kUSART_7BitsPerChar;
break;
case DATA_WIDTH_8BIT:
config.bitCountPerChar = kUSART_8BitsPerChar;
break;
default:
return -EIO;
}
switch(uart->config.stop_bits)
{
case STOP_BITS_1:
config.stopBitCount = kUSART_OneStopBit;
break;
case STOP_BITS_2:
config.stopBitCount = kUSART_TwoStopBit;
break;
default:
return -EIO;
}
status = USART_Init((USART_Type *)s_uartBaseAddrs[uart->port], &config, CLOCK_GetFreq(kCLOCK_Usart));
if(kStatus_Success != status)
return -EIO;
return 0;
}
void pwmout_init(pwmout_t* obj, PinName pin)
{
PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
MBED_ASSERT(pwm != (PWMName)NC);
obj->pwm_name = pwm;
uint32_t pwm_base_clock;
/* Set the TPM clock source to be IRC 48M */
CLOCK_SetTpmClock(1U);
pwm_base_clock = CLOCK_GetFreq(kCLOCK_McgIrc48MClk);
float clkval = (float)pwm_base_clock / 1000000.0f;
uint32_t clkdiv = 0;
while (clkval > 1) {
clkdiv++;
clkval /= 2.0f;
if (clkdiv == 7) {
break;
}
}
pwm_clock_mhz = clkval;
uint32_t channel = pwm & 0xF;
uint32_t instance = pwm >> TPM_SHIFT;
tpm_config_t tpmInfo;
TPM_GetDefaultConfig(&tpmInfo);
tpmInfo.prescale = (tpm_clock_prescale_t)clkdiv;
/* Initialize TPM module */
TPM_Init(tpm_addrs[instance], &tpmInfo);
tpm_chnl_pwm_signal_param_t config = {
.chnlNumber = (tpm_chnl_t)channel,
.level = kTPM_HighTrue,
.dutyCyclePercent = 0,
};
// default to 20ms: standard for servos, and fine for e.g. brightness control
TPM_SetupPwm(tpm_addrs[instance], &config, 1, kTPM_EdgeAlignedPwm, 50, pwm_base_clock);
TPM_StartTimer(tpm_addrs[instance], kTPM_SystemClock);
// Wire pinout
pinmap_pinout(pin, PinMap_PWM);
}
void pwmout_free(pwmout_t* obj)
{
TPM_Deinit(tpm_addrs[obj->pwm_name >> TPM_SHIFT]);
}
/** Set interrupt for specified timestamp
*
* @param timestamp The time in microseconds to be set
*/
void lp_ticker_set_interrupt(timestamp_t timestamp)
{
uint32_t now_us, delta_us, delta_ticks;
if (!lp_ticker_inited) {
lp_ticker_init();
}
lptmr_schedule = 0;
now_us = lp_ticker_read();
delta_us = timestamp > now_us ? timestamp - now_us : (uint32_t)((uint64_t)timestamp + 0xFFFFFFFF - now_us);
/* Checking if LPTRM can handle this sleep */
delta_ticks = USEC_TO_COUNT(delta_us, CLOCK_GetFreq(kCLOCK_Er32kClk));
if (delta_ticks > MAX_LPTMR_SLEEP) {
/* Using RTC if wait time is over 16b (2s @32kHz) */
uint32_t delta_sec;
delta_us += COUNT_TO_USEC(RTC->TPR, CLOCK_GetFreq(kCLOCK_Er32kClk)); /* Accounting for started second */
delta_sec = delta_us / SEC_IN_USEC;
delta_us -= delta_sec * SEC_IN_USEC;
RTC->TAR = RTC->TSR + delta_sec - 1;
RTC_EnableInterrupts(RTC, kRTC_AlarmInterruptEnable);
/* Set aditional, subsecond, sleep time */
if (delta_us) {
lptmr_schedule = USEC_TO_COUNT(delta_us, CLOCK_GetFreq(kCLOCK_Er32kClk));
}
} else {
/* Below RTC resolution using LPTMR */
LPTMR_SetTimerPeriod(LPTMR0, delta_ticks);
LPTMR_EnableInterrupts(LPTMR0, kLPTMR_TimerInterruptEnable);
LPTMR_StartTimer(LPTMR0);
}
}
/*!
* @brief Main function
*/
int main(void)
{
volatile uint32_t i;
uint32_t sysFreq;
/* Structure for OSC configuration */
osc_config_t oscConfig;
oscConfig.freq = BOARD_XTAL0_CLK_HZ;
oscConfig.capLoad = 0U;
oscConfig.workMode = kOSC_ModeOscLowPower;
oscConfig.oscerConfig.enableMode = kOSC_ErClkEnable;
BOARD_InitPins();
CLOCK_InitOsc0(&oscConfig);
CLOCK_SetXtal0Freq(BOARD_XTAL0_CLK_HZ);
/* Set clock divider to safe value to switch mode */
CLOCK_SetSimSafeDivs();
/* Calculate frdiv */
if (!APP_GetAvailableFrdiv())
{
while (1)
{
}
}
/* Boot to Fee mode */
APP_BootToFeeExample();
/* Change clock FEE -> FBE -> BLPE */
APP_ChangeFeeToBlpeExample();
/* Change clock BLPE -> FBE -> FEE */
APP_ChangeBlpeToFeeExample();
/* Get System clock to blink a LED */
sysFreq = CLOCK_GetFreq(kCLOCK_CoreSysClk) / 20U;
/* Enable a LED */
LED_INIT();
/* Blink a LED */
while (1)
{
for (i = 0; i < sysFreq; i++)
{
__NOP();
}
LED_TOGGLE();
}
}
int main(void) {
int N;
int32_t dt_micros=0;
BOARD_InitPins();
//BOARD_BootClockRUN(); //120 MHz
BOARD_BootClockHSRUN(); //180MHz
BOARD_InitDebugConsole();
initMicros();
PRINTF("FIR/FFT Benchmarking...\r\n");
PRINTF(" : System Clock = %i Hz\r\n",CLOCK_GetFreq(kCLOCK_CoreSysClk));
//PRINTF(" : LPTMR Source Clock = %i Hz\r\n", LPTMR_CLOCK_HZ);
//PRINTF(" : micros per tick = %4.1f\r\n", millis_per_tic*1000);
//loop forever
N = MAX_N;
int N_LOOP = 0;
for (;;) {
if (N_LOOP < 4) {
//do the processing
#if (OPERATION_TO_DO == DO_NAIVE_FIR)
dt_micros = naive_fir_func(N,N_TRIALS);
#elif (OPERATION_TO_DO == DO_KISS_FFT)
dt_micros = kiss_fft_func(N,N_TRIALS);
#elif (OPERATION_TO_DO == DO_ARM_FFT)
dt_micros = arm_fft_func(N,N_TRIALS);
#endif
//report the timing
PRINTF("%s: N = %i\tin %6.1f usec per operation\r\n",alg_name,N,((float)dt_micros)/((float)N_TRIALS));
//prepare for next step
N = N/2;
if (N < 8) {
N = MAX_N;
N_LOOP++;
}
}
}
return 0;
}
void serial_init(serial_t *obj, PinName tx, PinName rx) {
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
obj->index = pinmap_merge(uart_tx, uart_rx);
MBED_ASSERT((int)obj->index != NC);
// Need to initialize the clocks here as ticker init gets called before mbed_sdk_init
if (SystemCoreClock == DEFAULT_SYSTEM_CLOCK)
BOARD_BootClockRUN();
/* Set the LPUART clock source */
if (obj->index == LPUART_0) {
CLOCK_SetLpuart0Clock(1U);
} else {
CLOCK_SetLpuart1Clock(1U);
}
lpuart_config_t config;
LPUART_GetDefaultConfig(&config);
config.baudRate_Bps = 9600;
config.enableTx = false;
config.enableRx = false;
LPUART_Init(uart_addrs[obj->index], &config, CLOCK_GetFreq(uart_clocks[obj->index]));
pinmap_pinout(tx, PinMap_UART_TX);
pinmap_pinout(rx, PinMap_UART_RX);
if (tx != NC) {
LPUART_EnableTx(uart_addrs[obj->index], true);
pin_mode(tx, PullUp);
}
if (rx != NC) {
LPUART_EnableRx(uart_addrs[obj->index], true);
pin_mode(rx, PullUp);
}
if (obj->index == STDIO_UART) {
stdio_uart_inited = 1;
memcpy(&stdio_uart, obj, sizeof(serial_t));
}
}
/*!
* @brief Main function
*/
int main(void)
{
lpuart_config_t config;
BOARD_InitPins();
BOARD_BootClockRUN();
CLOCK_SetLpuart1Clock(1U);
/*
* config.baudRate_Bps = 115200U;
* config.parityMode = kLPUART_ParityDisabled;
* config.stopBitCount = kLPUART_OneStopBit;
* config.txFifoWatermark = 0;
* config.rxFifoWatermark = 0;
* config.enableTx = false;
* config.enableRx = false;
*/
LPUART_GetDefaultConfig(&config);
config.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE;
config.enableTx = true;
config.enableRx = true;
LPUART_Init(DEMO_LPUART, &config, CLOCK_GetFreq(DEMO_LPUART_CLKSRC));
/* Send g_tipString out. */
LPUART_WriteBlocking(DEMO_LPUART, g_tipString, sizeof(g_tipString) / sizeof(g_tipString[0]));
/* Enable RX interrupt. */
LPUART_EnableInterrupts(DEMO_LPUART, kLPUART_RxDataRegFullInterruptEnable);
EnableIRQ(DEMO_LPUART_IRQn);
while (1)
{
/* Send data only when LPUART TX register is empty and ring buffer has data to send out. */
while ((kLPUART_TxDataRegEmptyFlag & LPUART_GetStatusFlags(DEMO_LPUART)) && (rxIndex != txIndex))
{
LPUART_WriteByte(DEMO_LPUART, demoRingBuffer[txIndex]);
txIndex++;
txIndex %= DEMO_RING_BUFFER_SIZE;
}
}
}
static int uart_mcux_init(struct device *dev)
{
const struct uart_mcux_config *config = dev->config->config_info;
uart_config_t uart_config;
u32_t clock_freq;
clock_freq = CLOCK_GetFreq(config->clock_source);
UART_GetDefaultConfig(&uart_config);
uart_config.enableTx = true;
uart_config.enableRx = true;
uart_config.baudRate_Bps = config->baud_rate;
UART_Init(config->base, &uart_config, clock_freq);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
config->irq_config_func(dev);
#endif
return 0;
}
/* Initialize the external memory. */
void BOARD_InitSDRAM(void)
{
emc_basic_config_t basicConfig;
emc_dynamic_timing_config_t dynTiming;
emc_dynamic_chip_config_t dynChipConfig;
/* Basic configuration. */
basicConfig.endian = kEMC_LittleEndian;
basicConfig.fbClkSrc = kEMC_IntloopbackEmcclk;
/* EMC Clock = CPU FREQ/2 here can fit CPU freq from 12M ~ 180M.
* If you change the divide to 0 and EMC clock is larger than 100M
* please take refer to emc.dox to adjust EMC clock delay.
*/
basicConfig.emcClkDiv = 1;
/* Dynamic memory timing configuration. */
dynTiming.readConfig = kEMC_Cmddelay;
dynTiming.refreshPeriod_Nanosec = SDRAM_REFRESHPERIOD_NS;
dynTiming.tRp_Ns = SDRAM_TRP_NS;
dynTiming.tRas_Ns = SDRAM_TRAS_NS;
dynTiming.tSrex_Ns = SDRAM_TSREX_NS;
dynTiming.tApr_Ns = SDRAM_TAPR_NS;
dynTiming.tWr_Ns = (1000000000 / CLOCK_GetFreq(kCLOCK_EMC) + SDRAM_TWRDELT_NS); /* one clk + 6ns */
dynTiming.tDal_Ns = dynTiming.tWr_Ns + dynTiming.tRp_Ns;
dynTiming.tRc_Ns = SDRAM_TRC_NS;
dynTiming.tRfc_Ns = SDRAM_RFC_NS;
dynTiming.tXsr_Ns = SDRAM_XSR_NS;
dynTiming.tRrd_Ns = SDRAM_RRD_NS;
dynTiming.tMrd_Nclk = SDRAM_MRD_NCLK;
/* Dynamic memory chip specific configuration: Chip 0 - MTL48LC8M16A2B4-6A */
dynChipConfig.chipIndex = 0;
dynChipConfig.dynamicDevice = kEMC_Sdram;
dynChipConfig.rAS_Nclk = SDRAM_RAS_NCLK;
dynChipConfig.sdramModeReg = SDRAM_MODEREG_VALUE;
dynChipConfig.sdramExtModeReg = 0; /* it has no use for normal sdram */
dynChipConfig.devAddrMap = SDRAM_DEV_MEMORYMAP;
/* EMC Basic configuration. */
EMC_Init(EMC, &basicConfig);
/* EMC Dynamc memory configuration. */
EMC_DynamicMemInit(EMC, &dynTiming, &dynChipConfig, 1);
}
void analogin_init(analogin_t *obj, PinName pin)
{
uint32_t clkval;
uint32_t clkdiv = 1;
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
MBED_ASSERT(obj->adc != (ADCName)NC);
uint32_t instance = obj->adc >> ADC_INSTANCE_SHIFT;
adc_config_t adc_config;
uint32_t reg;
uint32_t pin_number = pin & 0x1F;
uint8_t port_number = pin / 32;
ADC_ClockPower_Configuration();
/* Ensure the ADC clock derived from the system clock is less than 80MHz */
clkval = CLOCK_GetFreq(kCLOCK_CoreSysClk);
while ((clkval / clkdiv) > MAX_ADC_CLOCK) {
clkdiv++;
}
/* Calibration after power up. */
if (!(ADC_DoSelfCalibration(adc_addrs[instance]))) {
/* Calibration failed */
return;
}
ADC_GetDefaultConfig(&adc_config);
adc_config.clockDividerNumber = clkdiv;
ADC_Init(adc_addrs[instance], &adc_config);
pinmap_pinout(pin, PinMap_ADC);
/* Clear the DIGIMODE bit */
reg = IOCON->PIO[port_number][pin_number] & ~IOCON_PIO_DIGIMODE_MASK;
IOCON->PIO[port_number][pin_number] = reg;
}
static Status tml_Init(void) {
i2c_master_config_t masterConfig;
uint32_t sourceClock;
gpio_pin_config_t irq_config = {kGPIO_DigitalInput, 0,};
gpio_pin_config_t ven_config = {kGPIO_DigitalOutput, 0,};
GPIO_PinInit(NXPNCI_IRQ_GPIO, NXPNCI_IRQ_PIN, &irq_config);
GPIO_PinInit(NXPNCI_VEN_GPIO, NXPNCI_VEN_PIN, &ven_config);
I2C_MasterGetDefaultConfig(&masterConfig);
masterConfig.baudRate_Bps = NXPNCI_I2C_BAUDRATE;
sourceClock = CLOCK_GetFreq(I2C0_CLK_SRC);
masterXfer.slaveAddress = NXPNCI_I2C_ADDR_7BIT;
masterXfer.subaddress = 0;
masterXfer.subaddressSize = 0;
masterXfer.flags = kI2C_TransferDefaultFlag;
I2C_MasterInit(NXPNCI_I2C_INSTANCE, &masterConfig, sourceClock);
IrqSem = xSemaphoreCreateBinary();
return SUCCESS;
}
void us_ticker_init(void)
{
/* Common for ticker/timer. */
uint32_t busClock;
/* Structure to initialize PIT. */
pit_config_t pitConfig;
if (us_ticker_inited) {
/* calling init again should cancel current interrupt */
TPM_DisableInterrupts(TPM2, kTPM_TimeOverflowInterruptEnable);
return;
}
PIT_GetDefaultConfig(&pitConfig);
PIT_Init(PIT, &pitConfig);
busClock = CLOCK_GetFreq(kCLOCK_BusClk);
PIT_SetTimerPeriod(PIT, kPIT_Chnl_0, busClock / 1000000 - 1);
PIT_SetTimerPeriod(PIT, kPIT_Chnl_1, 0xFFFFFFFF);
PIT_SetTimerChainMode(PIT, kPIT_Chnl_1, true);
PIT_StartTimer(PIT, kPIT_Chnl_0);
PIT_StartTimer(PIT, kPIT_Chnl_1);
/* Configure interrupt generation counters and disable ticker interrupts. */
tpm_config_t tpmConfig;
TPM_GetDefaultConfig(&tpmConfig);
/* Set to Div 32 to get 1MHz clock source for TPM */
tpmConfig.prescale = kTPM_Prescale_Divide_32;
TPM_Init(TPM2, &tpmConfig);
NVIC_SetVector(TPM2_IRQn, (uint32_t)tpm_isr);
NVIC_EnableIRQ(TPM2_IRQn);
us_ticker_inited = true;
}
void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
uint32_t i2c_sda = pinmap_peripheral(sda, PinMap_I2C_SDA);
uint32_t i2c_scl = pinmap_peripheral(scl, PinMap_I2C_SCL);
obj->instance = pinmap_merge(i2c_sda, i2c_scl);
obj->next_repeated_start = 0;
MBED_ASSERT((int)obj->instance != NC);
i2c_master_config_t master_config;
I2C_MasterGetDefaultConfig(&master_config);
I2C_MasterInit(i2c_addrs[obj->instance], &master_config, CLOCK_GetFreq(i2c_clocks[obj->instance]));
I2C_EnableInterrupts(i2c_addrs[obj->instance], kI2C_GlobalInterruptEnable);
pinmap_pinout(sda, PinMap_I2C_SDA);
pinmap_pinout(scl, PinMap_I2C_SCL);
#if defined(FSL_FEATURE_PORT_HAS_OPEN_DRAIN) && FSL_FEATURE_PORT_HAS_OPEN_DRAIN
PORT_Type *port_addrs[] = PORT_BASE_PTRS;
PORT_Type *base = port_addrs[sda >> GPIO_PORT_SHIFT];
base->PCR[sda & 0xFF] |= PORT_PCR_ODE_MASK;
base->PCR[scl & 0xFF] |= PORT_PCR_ODE_MASK;
#endif
}
/*!
* @brief Main function
*/
int main(void)
{
lpuart_config_t lpuartConfig;
lpuart_transfer_t xfer;
lpuart_transfer_t sendXfer;
lpuart_transfer_t receiveXfer;
BOARD_InitPins();
BOARD_BootClockRUN();
CLOCK_SetLpuartClock(1U);
/* Initialize the LPUART. */
/*
* lpuartConfig.baudRate_Bps = 115200U;
* lpuartConfig.parityMode = kLPUART_ParityDisabled;
* lpuartConfig.stopBitCount = kLPUART_OneStopBit;
* lpuartConfig.txFifoWatermark = 0;
* lpuartConfig.rxFifoWatermark = 0;
* lpuartConfig.enableTx = false;
* lpuartConfig.enableRx = false;
*/
LPUART_GetDefaultConfig(&lpuartConfig);
lpuartConfig.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE;
lpuartConfig.enableTx = true;
lpuartConfig.enableRx = true;
LPUART_Init(DEMO_LPUART, &lpuartConfig, CLOCK_GetFreq(DEMO_LPUART_CLKSRC));
/* Configure DMA. */
DMAMGR_Init();
/* Request dma channels from DMA manager. */
DMAMGR_RequestChannel(LPUART_TX_DMA_REQUEST, LPUART_TX_DMA_CHANNEL, &g_lpuartTxEdmaHandle);
DMAMGR_RequestChannel(LPUART_RX_DMA_REQUEST, LPUART_RX_DMA_CHANNEL, &g_lpuartRxEdmaHandle);
/* Create LPUART DMA handle. */
LPUART_TransferCreateHandleEDMA(DEMO_LPUART, &g_lpuartEdmaHandle, LPUART_UserCallback, NULL, &g_lpuartTxEdmaHandle,
&g_lpuartRxEdmaHandle);
/* Send g_tipString out. */
xfer.data = g_tipString;
xfer.dataSize = sizeof(g_tipString) - 1;
txOnGoing = true;
LPUART_SendEDMA(DEMO_LPUART, &g_lpuartEdmaHandle, &xfer);
/* Wait send finished */
while (txOnGoing)
{
}
/* Start to echo. */
sendXfer.data = g_txBuffer;
sendXfer.dataSize = ECHO_BUFFER_LENGTH;
receiveXfer.data = g_rxBuffer;
receiveXfer.dataSize = ECHO_BUFFER_LENGTH;
while (1)
{
/* If RX is idle and g_rxBuffer is empty, start to read data to g_rxBuffer. */
if ((!rxOnGoing) && rxBufferEmpty)
{
rxOnGoing = true;
LPUART_ReceiveEDMA(DEMO_LPUART, &g_lpuartEdmaHandle, &receiveXfer);
}
/* If TX is idle and g_txBuffer is full, start to send data. */
if ((!txOnGoing) && txBufferFull)
{
txOnGoing = true;
LPUART_SendEDMA(DEMO_LPUART, &g_lpuartEdmaHandle, &sendXfer);
}
/* If g_txBuffer is empty and g_rxBuffer is full, copy g_rxBuffer to g_txBuffer. */
if ((!rxBufferEmpty) && (!txBufferFull))
{
memcpy(g_txBuffer, g_rxBuffer, ECHO_BUFFER_LENGTH);
rxBufferEmpty = true;
txBufferFull = true;
}
}
}
void serial_baud(serial_t *obj, int baudrate)
{
LPUART_SetBaudRate(uart_addrs[obj->index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->index]));
}
