/* Transform (subreg (plus reg const)) to (plus (subreg reg) const)
when it is possible. Return X or the transformation result if the
transformation is done. */
static rtx
move_plus_up (rtx x)
{
rtx subreg_reg;
enum machine_mode x_mode, subreg_reg_mode;
if (GET_CODE (x) != SUBREG || !subreg_lowpart_p (x))
return x;
subreg_reg = SUBREG_REG (x);
x_mode = GET_MODE (x);
subreg_reg_mode = GET_MODE (subreg_reg);
if (GET_CODE (x) == SUBREG && GET_CODE (subreg_reg) == PLUS
&& GET_MODE_SIZE (x_mode) <= GET_MODE_SIZE (subreg_reg_mode)
&& CONSTANT_P (XEXP (subreg_reg, 1))
&& GET_MODE_CLASS (x_mode) == MODE_INT
&& GET_MODE_CLASS (subreg_reg_mode) == MODE_INT)
{
rtx cst = simplify_subreg (x_mode, XEXP (subreg_reg, 1), subreg_reg_mode,
subreg_lowpart_offset (x_mode,
subreg_reg_mode));
if (cst && CONSTANT_P (cst))
return gen_rtx_PLUS (x_mode, lowpart_subreg (x_mode,
XEXP (subreg_reg, 0),
subreg_reg_mode), cst);
}
return x;
}
void
lm32_print_operand_address (FILE * file, rtx addr)
{
switch (GET_CODE (addr))
{
case REG:
fprintf (file, "(%s+0)", reg_names[REGNO (addr)]);
break;
case MEM:
output_address (XEXP (addr, 0));
break;
case PLUS:
{
rtx arg0 = XEXP (addr, 0);
rtx arg1 = XEXP (addr, 1);
if (GET_CODE (arg0) == REG && CONSTANT_P (arg1))
{
if (GET_CODE (arg1) == CONST_INT)
fprintf (file, "(%s+%ld)", reg_names[REGNO (arg0)],
INTVAL (arg1));
else
{
fprintf (file, "(%s+", reg_names[REGNO (arg0)]);
output_addr_const (file, arg1);
fprintf (file, ")");
}
}
else if (CONSTANT_P (arg0) && CONSTANT_P (arg1))
output_addr_const (file, addr);
else
fatal_insn ("bad operand", addr);
}
break;
case SYMBOL_REF:
if (SYMBOL_REF_SMALL_P (addr))
{
fprintf (file, "gp(");
output_addr_const (file, addr);
fprintf (file, ")");
}
else
fatal_insn ("can't use non gp relative absolute address", addr);
break;
default:
fatal_insn ("invalid addressing mode", addr);
break;
}
}
/* Return true if insn is an instruction that sets a target register.
if CHECK_CONST is true, only return true if the source is constant.
If such a set is found and REGNO is nonzero, assign the register number
of the destination register to *REGNO. */
static int
insn_sets_btr_p (const_rtx insn, int check_const, int *regno)
{
rtx set;
if (NONJUMP_INSN_P (insn)
&& (set = single_set (insn)))
{
rtx dest = SET_DEST (set);
rtx src = SET_SRC (set);
if (GET_CODE (dest) == SUBREG)
dest = XEXP (dest, 0);
if (REG_P (dest)
&& TEST_HARD_REG_BIT (all_btrs, REGNO (dest)))
{
gcc_assert (!btr_referenced_p (src, NULL));
if (!check_const || CONSTANT_P (src))
{
if (regno)
*regno = REGNO (dest);
return 1;
}
}
}
return 0;
}
int
constant_address_p (rtx X)
{
return (CONSTANT_P(X) &&
GET_CODE(X)!=CONST_DOUBLE
&& GET_CODE(X)!=CONST_VECTOR);
}
static rtx
conforming_compare (rtx_insn *insn)
{
rtx set, src, dest;
set = single_set (insn);
if (set == NULL)
return NULL;
src = SET_SRC (set);
if (GET_CODE (src) != COMPARE)
return NULL;
dest = SET_DEST (set);
if (!REG_P (dest) || REGNO (dest) != targetm.flags_regnum)
return NULL;
if (!REG_P (XEXP (src, 0)))
return NULL;
if (CONSTANT_P (XEXP (src, 1)) || REG_P (XEXP (src, 1)))
return src;
if (GET_CODE (XEXP (src, 1)) == UNSPEC)
{
for (int i = 0; i < XVECLEN (XEXP (src, 1), 0); i++)
if (!REG_P (XVECEXP (XEXP (src, 1), 0, i)))
return NULL;
return src;
}
return NULL;
}
/* Compute the sum of X and Y, making canonicalizations assumed in an
address, namely: sum constant integers, surround the sum of two
constants with a CONST, put the constant as the second operand, and
group the constant on the outermost sum.
This routine assumes both inputs are already in canonical form. */
static rtx
form_sum (rtx x, rtx y)
{
machine_mode mode = GET_MODE (x);
if (mode == VOIDmode)
mode = GET_MODE (y);
if (mode == VOIDmode)
mode = Pmode;
if (CONST_INT_P (x))
return plus_constant (mode, y, INTVAL (x));
else if (CONST_INT_P (y))
return plus_constant (mode, x, INTVAL (y));
else if (CONSTANT_P (x))
std::swap (x, y);
if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
/* Note that if the operands of Y are specified in the opposite
order in the recursive calls below, infinite recursion will
occur. */
if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
/* If both constant, encapsulate sum. Otherwise, just form sum. A
constant will have been placed second. */
if (CONSTANT_P (x) && CONSTANT_P (y))
{
if (GET_CODE (x) == CONST)
x = XEXP (x, 0);
if (GET_CODE (y) == CONST)
y = XEXP (y, 0);
return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
}
return gen_rtx_PLUS (mode, x, y);
}
void
c54x_print_operand(FILE *stream, rtx op, char letter)
{
rtx mem;
rtx base;
rtx disp;
switch(GET_CODE(op)) {
case REG:
fprintf(stream, "%s", reg_names[REGNO(op)]);
break;
case CONST_INT:
if(letter == 'I') {
fprintf(stream, "#0%xh", 0xffff & XINT(op, 0));
} else {
fprintf(stream, "%d", XINT(op, 0));
}
break;
case MEM:
mem = XEXP(op, 0);
switch(GET_CODE(mem)) {
case LABEL_REF:
case SYMBOL_REF:
fprintf(stream, "%s", XSTR(mem, 0));
break;
case REG:
fprintf(stream, "*%s", reg_names[REGNO(mem)]);
break;
case PLUS:
base = XEXP(mem, 0);
disp = XEXP(mem, 1);
if( REG_P(base) && CONSTANT_P(disp) ) {
fprintf(stream, "*%s(%d)", reg_names[REGNO(base)], XINT(disp, 0));
}
break;
default:
fprintf(stream, "mem:");
print_rtl(stream, mem);
break;
}
break;
default:
fprintf(stream, "op:");
print_rtl(stream, op);
break;
}
}
static void
moxie_print_operand (FILE *file, rtx x, int code)
{
rtx operand = x;
/* New code entries should just be added to the switch below. If
handling is finished, just return. If handling was just a
modification of the operand, the modified operand should be put in
"operand", and then do a break to let default handling
(zero-modifier) output the operand. */
switch (code)
{
case 0:
/* No code, print as usual. */
break;
default:
LOSE_AND_RETURN ("invalid operand modifier letter", x);
}
/* Print an operand as without a modifier letter. */
switch (GET_CODE (operand))
{
case REG:
if (REGNO (operand) > MOXIE_R13)
internal_error ("internal error: bad register: %d", REGNO (operand));
fprintf (file, "%s", reg_names[REGNO (operand)]);
return;
case MEM:
output_address (GET_MODE (XEXP (operand, 0)), XEXP (operand, 0));
return;
default:
/* No need to handle all strange variants, let output_addr_const
do it for us. */
if (CONSTANT_P (operand))
{
output_addr_const (file, operand);
return;
}
LOSE_AND_RETURN ("unexpected operand", x);
}
}
rtx
compare_from_rtx (rtx op0, rtx op1, enum rtx_code code, int unsignedp,
enum machine_mode mode, rtx size)
{
rtx tem;
/* If one operand is constant, make it the second one. Only do this
if the other operand is not constant as well. */
if (swap_commutative_operands_p (op0, op1))
{
tem = op0;
op0 = op1;
op1 = tem;
code = swap_condition (code);
}
do_pending_stack_adjust ();
code = unsignedp ? unsigned_condition (code) : code;
tem = simplify_relational_operation (code, VOIDmode, mode, op0, op1);
if (tem)
{
if (CONSTANT_P (tem))
return tem;
if (COMPARISON_P (tem))
{
code = GET_CODE (tem);
op0 = XEXP (tem, 0);
op1 = XEXP (tem, 1);
mode = GET_MODE (op0);
unsignedp = (code == GTU || code == LTU
|| code == GEU || code == LEU);
}
}
emit_cmp_insn (op0, op1, code, size, mode, unsignedp);
#if HAVE_cc0
return gen_rtx_fmt_ee (code, VOIDmode, cc0_rtx, const0_rtx);
#else
return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
#endif
}
static rtx
propagate_rtx (rtx x, machine_mode mode, rtx old_rtx, rtx new_rtx,
bool speed)
{
rtx tem;
bool collapsed;
int flags;
if (REG_P (new_rtx) && REGNO (new_rtx) < FIRST_PSEUDO_REGISTER)
return NULL_RTX;
flags = 0;
if (REG_P (new_rtx)
|| CONSTANT_P (new_rtx)
|| (GET_CODE (new_rtx) == SUBREG
&& REG_P (SUBREG_REG (new_rtx))
&& (GET_MODE_SIZE (mode)
<= GET_MODE_SIZE (GET_MODE (SUBREG_REG (new_rtx))))))
flags |= PR_CAN_APPEAR;
if (!varying_mem_p (new_rtx))
flags |= PR_HANDLE_MEM;
if (speed)
flags |= PR_OPTIMIZE_FOR_SPEED;
tem = x;
collapsed = propagate_rtx_1 (&tem, old_rtx, copy_rtx (new_rtx), flags);
if (tem == x || !collapsed)
return NULL_RTX;
/* gen_lowpart_common will not be able to process VOIDmode entities other
than CONST_INTs. */
if (GET_MODE (tem) == VOIDmode && !CONST_INT_P (tem))
return NULL_RTX;
if (GET_MODE (tem) == VOIDmode)
tem = rtl_hooks.gen_lowpart_no_emit (mode, tem);
else
gcc_assert (GET_MODE (tem) == mode);
return tem;
}
int
c54x_expand_movqi(rtx ops[])
{
int done = 0;
int i;
fprintf(stderr, "--->>>");
for(i=0; i < 2; i++) {
print_rtl(stderr, ops[i]);
}
fprintf(stderr, "<<<---\n");
if(ACC_REG_P(ops[0])) {
ops[0] = copy_rtx(ops[0]);
PUT_MODE(ops[0], PSImode);
fprintf(stderr, "+++");
print_rtl(stderr, ops[0]);
fprintf(stderr, "+++\n");
done = 1;
if(MEM_P(ops[1])) {
emit_insn(gen_ldm(ops[0], ops[1]));
} else if(REG_P(ops[1])) {
emit_insn(gen_ldu(ops[0], ops[1]));
} else if(CONSTANT_P(ops[1])) {
emit_insn(gen_ld_const(ops[0], ops[1], gen_reg_rtx(QImode)));
} else {
done = 2;
}
} else if( (REG_P(ops[0]) && (GET_CODE(ops[1]) == MEM && REG_P(XEXP(ops[1],0))))
|| (T_REG_P(ops[0]) && ARSP_REG_P(ops[1])) )
{
done = 2;
}
return done;
}
static rtx
conforming_compare (rtx_insn *insn)
{
rtx set, src, dest;
set = single_set (insn);
if (set == NULL)
return NULL;
src = SET_SRC (set);
if (GET_CODE (src) != COMPARE)
return NULL;
dest = SET_DEST (set);
if (!REG_P (dest) || REGNO (dest) != targetm.flags_regnum)
return NULL;
if (REG_P (XEXP (src, 0))
&& (REG_P (XEXP (src, 1)) || CONSTANT_P (XEXP (src, 1))))
return src;
return NULL;
}
static bool
insn_prefetch_values_to_profile (rtx insn, histogram_values *values)
{
rtx mem, address;
int write;
histogram_value hist;
/* It only makes sense to look for memory references in ordinary insns. */
if (GET_CODE (insn) != INSN)
return false;
if (!find_mem_reference (insn, &mem, &write))
return false;
address = XEXP (mem, 0);
if (side_effects_p (address))
return false;
/* APPLE LOCAL begin should be in FSF, and has been submitted. */
if (GET_CODE (PATTERN (insn)) == CLOBBER)
return false;
/* APPLE LOCAL end should be in FSF, and has been submitted. */
if (CONSTANT_P (address))
return false;
hist = ggc_alloc (sizeof (*hist));
hist->value = address;
hist->mode = GET_MODE (address);
hist->seq = NULL_RTX;
hist->insn = insn;
hist->type = HIST_TYPE_CONST_DELTA;
VEC_safe_push (histogram_value, *values, hist);
return true;
}
static int
reload_cse_simplify_set (rtx set, rtx insn)
{
int did_change = 0;
int dreg;
rtx src;
enum reg_class dclass;
int old_cost;
cselib_val *val;
struct elt_loc_list *l;
#ifdef LOAD_EXTEND_OP
enum rtx_code extend_op = UNKNOWN;
#endif
bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
dreg = true_regnum (SET_DEST (set));
if (dreg < 0)
return 0;
src = SET_SRC (set);
if (side_effects_p (src) || true_regnum (src) >= 0)
return 0;
dclass = REGNO_REG_CLASS (dreg);
#ifdef LOAD_EXTEND_OP
/* When replacing a memory with a register, we need to honor assumptions
that combine made wrt the contents of sign bits. We'll do this by
generating an extend instruction instead of a reg->reg copy. Thus
the destination must be a register that we can widen. */
if (MEM_P (src)
&& GET_MODE_BITSIZE (GET_MODE (src)) < BITS_PER_WORD
&& (extend_op = LOAD_EXTEND_OP (GET_MODE (src))) != UNKNOWN
&& !REG_P (SET_DEST (set)))
return 0;
#endif
val = cselib_lookup (src, GET_MODE (SET_DEST (set)), 0);
if (! val)
return 0;
/* If memory loads are cheaper than register copies, don't change them. */
if (MEM_P (src))
old_cost = MEMORY_MOVE_COST (GET_MODE (src), dclass, 1);
else if (REG_P (src))
old_cost = REGISTER_MOVE_COST (GET_MODE (src),
REGNO_REG_CLASS (REGNO (src)), dclass);
else
old_cost = rtx_cost (src, SET, speed);
for (l = val->locs; l; l = l->next)
{
rtx this_rtx = l->loc;
int this_cost;
if (CONSTANT_P (this_rtx) && ! references_value_p (this_rtx, 0))
{
#ifdef LOAD_EXTEND_OP
if (extend_op != UNKNOWN)
{
HOST_WIDE_INT this_val;
/* ??? I'm lazy and don't wish to handle CONST_DOUBLE. Other
constants, such as SYMBOL_REF, cannot be extended. */
if (GET_CODE (this_rtx) != CONST_INT)
continue;
this_val = INTVAL (this_rtx);
switch (extend_op)
{
case ZERO_EXTEND:
this_val &= GET_MODE_MASK (GET_MODE (src));
break;
case SIGN_EXTEND:
/* ??? In theory we're already extended. */
if (this_val == trunc_int_for_mode (this_val, GET_MODE (src)))
break;
default:
gcc_unreachable ();
}
this_rtx = GEN_INT (this_val);
}
#endif
this_cost = rtx_cost (this_rtx, SET, speed);
}
else if (REG_P (this_rtx))
{
#ifdef LOAD_EXTEND_OP
if (extend_op != UNKNOWN)
{
this_rtx = gen_rtx_fmt_e (extend_op, word_mode, this_rtx);
this_cost = rtx_cost (this_rtx, SET, speed);
}
else
#endif
this_cost = REGISTER_MOVE_COST (GET_MODE (this_rtx),
REGNO_REG_CLASS (REGNO (this_rtx)),
dclass);
}
else
continue;
/* If equal costs, prefer registers over anything else. That
tends to lead to smaller instructions on some machines. */
if (this_cost < old_cost
|| (this_cost == old_cost
&& REG_P (this_rtx)
&& !REG_P (SET_SRC (set))))
{
#ifdef LOAD_EXTEND_OP
if (GET_MODE_BITSIZE (GET_MODE (SET_DEST (set))) < BITS_PER_WORD
&& extend_op != UNKNOWN
#ifdef CANNOT_CHANGE_MODE_CLASS
&& !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SET_DEST (set)),
word_mode,
REGNO_REG_CLASS (REGNO (SET_DEST (set))))
#endif
)
{
rtx wide_dest = gen_rtx_REG (word_mode, REGNO (SET_DEST (set)));
ORIGINAL_REGNO (wide_dest) = ORIGINAL_REGNO (SET_DEST (set));
validate_change (insn, &SET_DEST (set), wide_dest, 1);
}
#endif
validate_unshare_change (insn, &SET_SRC (set), this_rtx, 1);
old_cost = this_cost, did_change = 1;
}
}
return did_change;
}
/* Find values inside INSN for that we want to measure histograms for
division/modulo optimization and stores them to VALUES. */
static void
insn_divmod_values_to_profile (rtx insn, histogram_values *values)
{
rtx set, set_src, op1, op2;
enum machine_mode mode;
histogram_value hist;
if (!INSN_P (insn))
return;
set = single_set (insn);
if (!set)
return;
mode = GET_MODE (SET_DEST (set));
if (!INTEGRAL_MODE_P (mode))
return;
set_src = SET_SRC (set);
switch (GET_CODE (set_src))
{
case DIV:
case MOD:
case UDIV:
case UMOD:
op1 = XEXP (set_src, 0);
op2 = XEXP (set_src, 1);
if (side_effects_p (op2))
return;
/* Check for a special case where the divisor is power of 2. */
if ((GET_CODE (set_src) == UMOD) && !CONSTANT_P (op2))
{
hist = ggc_alloc (sizeof (*hist));
hist->value = op2;
hist->seq = NULL_RTX;
hist->mode = mode;
hist->insn = insn;
hist->type = HIST_TYPE_POW2;
hist->hdata.pow2.may_be_other = 1;
VEC_safe_push (histogram_value, *values, hist);
}
/* Check whether the divisor is not in fact a constant. */
if (!CONSTANT_P (op2))
{
hist = ggc_alloc (sizeof (*hist));
hist->value = op2;
hist->mode = mode;
hist->seq = NULL_RTX;
hist->insn = insn;
hist->type = HIST_TYPE_SINGLE_VALUE;
VEC_safe_push (histogram_value, *values, hist);
}
/* For mod, check whether it is not often a noop (or replaceable by
a few subtractions). */
if (GET_CODE (set_src) == UMOD && !side_effects_p (op1))
{
rtx tmp;
hist = ggc_alloc (sizeof (*hist));
start_sequence ();
tmp = simplify_gen_binary (DIV, mode, copy_rtx (op1), copy_rtx (op2));
hist->value = force_operand (tmp, NULL_RTX);
hist->seq = get_insns ();
end_sequence ();
hist->mode = mode;
hist->insn = insn;
hist->type = HIST_TYPE_INTERVAL;
hist->hdata.intvl.int_start = 0;
hist->hdata.intvl.steps = 2;
hist->hdata.intvl.may_be_less = 1;
hist->hdata.intvl.may_be_more = 1;
VEC_safe_push (histogram_value, *values, hist);
}
return;
default:
return;
}
}
void
do_compare_rtx_and_jump (rtx op0, rtx op1, enum rtx_code code, int unsignedp,
enum machine_mode mode, rtx size, rtx if_false_label,
rtx if_true_label, int prob)
{
rtx tem;
rtx dummy_label = NULL_RTX;
rtx last;
/* Reverse the comparison if that is safe and we want to jump if it is
false. Also convert to the reverse comparison if the target can
implement it. */
if ((! if_true_label
|| ! can_compare_p (code, mode, ccp_jump))
&& (! FLOAT_MODE_P (mode)
|| code == ORDERED || code == UNORDERED
|| (! HONOR_NANS (mode) && (code == LTGT || code == UNEQ))
|| (! HONOR_SNANS (mode) && (code == EQ || code == NE))))
{
enum rtx_code rcode;
if (FLOAT_MODE_P (mode))
rcode = reverse_condition_maybe_unordered (code);
else
rcode = reverse_condition (code);
/* Canonicalize to UNORDERED for the libcall. */
if (can_compare_p (rcode, mode, ccp_jump)
|| (code == ORDERED && ! can_compare_p (ORDERED, mode, ccp_jump)))
{
tem = if_true_label;
if_true_label = if_false_label;
if_false_label = tem;
code = rcode;
prob = inv (prob);
}
}
/* If one operand is constant, make it the second one. Only do this
if the other operand is not constant as well. */
if (swap_commutative_operands_p (op0, op1))
{
tem = op0;
op0 = op1;
op1 = tem;
code = swap_condition (code);
}
do_pending_stack_adjust ();
code = unsignedp ? unsigned_condition (code) : code;
if (0 != (tem = simplify_relational_operation (code, mode, VOIDmode,
op0, op1)))
{
if (CONSTANT_P (tem))
{
rtx label = (tem == const0_rtx || tem == CONST0_RTX (mode))
? if_false_label : if_true_label;
if (label)
emit_jump (label);
return;
}
code = GET_CODE (tem);
mode = GET_MODE (tem);
op0 = XEXP (tem, 0);
op1 = XEXP (tem, 1);
unsignedp = (code == GTU || code == LTU || code == GEU || code == LEU);
}
if (! if_true_label)
dummy_label = if_true_label = gen_label_rtx ();
if (GET_MODE_CLASS (mode) == MODE_INT
&& ! can_compare_p (code, mode, ccp_jump))
{
switch (code)
{
case LTU:
do_jump_by_parts_greater_rtx (mode, 1, op1, op0,
if_false_label, if_true_label, prob);
break;
case LEU:
do_jump_by_parts_greater_rtx (mode, 1, op0, op1,
if_true_label, if_false_label,
inv (prob));
break;
case GTU:
do_jump_by_parts_greater_rtx (mode, 1, op0, op1,
if_false_label, if_true_label, prob);
break;
case GEU:
do_jump_by_parts_greater_rtx (mode, 1, op1, op0,
if_true_label, if_false_label,
inv (prob));
break;
case LT:
do_jump_by_parts_greater_rtx (mode, 0, op1, op0,
if_false_label, if_true_label, prob);
break;
case LE:
do_jump_by_parts_greater_rtx (mode, 0, op0, op1,
if_true_label, if_false_label,
inv (prob));
break;
case GT:
do_jump_by_parts_greater_rtx (mode, 0, op0, op1,
if_false_label, if_true_label, prob);
break;
case GE:
do_jump_by_parts_greater_rtx (mode, 0, op1, op0,
if_true_label, if_false_label,
inv (prob));
break;
case EQ:
do_jump_by_parts_equality_rtx (mode, op0, op1, if_false_label,
if_true_label, prob);
break;
case NE:
do_jump_by_parts_equality_rtx (mode, op0, op1, if_true_label,
if_false_label, inv (prob));
break;
default:
gcc_unreachable ();
}
}
else
{
if (GET_MODE_CLASS (mode) == MODE_FLOAT
&& ! can_compare_p (code, mode, ccp_jump)
&& can_compare_p (swap_condition (code), mode, ccp_jump))
{
rtx tmp;
code = swap_condition (code);
tmp = op0;
op0 = op1;
op1 = tmp;
}
else if (GET_MODE_CLASS (mode) == MODE_FLOAT
&& ! can_compare_p (code, mode, ccp_jump)
/* Never split ORDERED and UNORDERED. These must be implemented. */
&& (code != ORDERED && code != UNORDERED)
/* Split a floating-point comparison if we can jump on other
conditions... */
&& (have_insn_for (COMPARE, mode)
/* ... or if there is no libcall for it. */
|| code_to_optab[code] == NULL))
{
enum rtx_code first_code;
bool and_them = split_comparison (code, mode, &first_code, &code);
/* If there are no NaNs, the first comparison should always fall
through. */
if (!HONOR_NANS (mode))
gcc_assert (first_code == (and_them ? ORDERED : UNORDERED));
else
{
if (and_them)
{
rtx dest_label;
/* If we only jump if true, just bypass the second jump. */
if (! if_false_label)
{
if (! dummy_label)
dummy_label = gen_label_rtx ();
dest_label = dummy_label;
}
else
dest_label = if_false_label;
do_compare_rtx_and_jump (op0, op1, first_code, unsignedp, mode,
size, dest_label, NULL_RTX, prob);
}
else
do_compare_rtx_and_jump (op0, op1, first_code, unsignedp, mode,
size, NULL_RTX, if_true_label, prob);
}
}
last = get_last_insn ();
emit_cmp_and_jump_insns (op0, op1, code, size, mode, unsignedp,
if_true_label);
if (prob != -1 && profile_status != PROFILE_ABSENT)
{
for (last = NEXT_INSN (last);
last && NEXT_INSN (last);
last = NEXT_INSN (last))
if (JUMP_P (last))
break;
if (!last
|| !JUMP_P (last)
|| NEXT_INSN (last)
|| !any_condjump_p (last))
{
if (dump_file)
fprintf (dump_file, "Failed to add probability note\n");
}
else
{
gcc_assert (!find_reg_note (last, REG_BR_PROB, 0));
add_reg_note (last, REG_BR_PROB, GEN_INT (prob));
}
}
}
if (if_false_label)
emit_jump (if_false_label);
if (dummy_label)
emit_label (dummy_label);
}
void
do_compare_rtx_and_jump (rtx op0, rtx op1, enum rtx_code code, int unsignedp,
enum machine_mode mode, rtx size, rtx if_false_label,
rtx if_true_label)
{
rtx tem;
int dummy_true_label = 0;
/* Reverse the comparison if that is safe and we want to jump if it is
false. */
if (! if_true_label && ! FLOAT_MODE_P (mode))
{
if_true_label = if_false_label;
if_false_label = 0;
code = reverse_condition (code);
}
/* If one operand is constant, make it the second one. Only do this
if the other operand is not constant as well. */
if (swap_commutative_operands_p (op0, op1))
{
tem = op0;
op0 = op1;
op1 = tem;
code = swap_condition (code);
}
do_pending_stack_adjust ();
code = unsignedp ? unsigned_condition (code) : code;
if (0 != (tem = simplify_relational_operation (code, mode, VOIDmode,
op0, op1)))
{
if (CONSTANT_P (tem))
{
rtx label = (tem == const0_rtx || tem == CONST0_RTX (mode))
? if_false_label : if_true_label;
if (label)
emit_jump (label);
return;
}
code = GET_CODE (tem);
mode = GET_MODE (tem);
op0 = XEXP (tem, 0);
op1 = XEXP (tem, 1);
unsignedp = (code == GTU || code == LTU || code == GEU || code == LEU);
}
if (! if_true_label)
{
dummy_true_label = 1;
if_true_label = gen_label_rtx ();
}
if (GET_MODE_CLASS (mode) == MODE_INT
&& ! can_compare_p (code, mode, ccp_jump))
{
switch (code)
{
case LTU:
do_jump_by_parts_greater_rtx (mode, 1, op1, op0,
if_false_label, if_true_label);
break;
case LEU:
do_jump_by_parts_greater_rtx (mode, 1, op0, op1,
if_true_label, if_false_label);
break;
case GTU:
do_jump_by_parts_greater_rtx (mode, 1, op0, op1,
if_false_label, if_true_label);
break;
case GEU:
do_jump_by_parts_greater_rtx (mode, 1, op1, op0,
if_true_label, if_false_label);
break;
case LT:
do_jump_by_parts_greater_rtx (mode, 0, op1, op0,
if_false_label, if_true_label);
break;
case LE:
do_jump_by_parts_greater_rtx (mode, 0, op0, op1,
if_true_label, if_false_label);
break;
case GT:
do_jump_by_parts_greater_rtx (mode, 0, op0, op1,
if_false_label, if_true_label);
break;
case GE:
do_jump_by_parts_greater_rtx (mode, 0, op1, op0,
if_true_label, if_false_label);
break;
case EQ:
do_jump_by_parts_equality_rtx (mode, op0, op1, if_false_label,
if_true_label);
break;
case NE:
do_jump_by_parts_equality_rtx (mode, op0, op1, if_true_label,
if_false_label);
break;
default:
gcc_unreachable ();
}
}
else
emit_cmp_and_jump_insns (op0, op1, code, size, mode, unsignedp,
if_true_label);
if (if_false_label)
emit_jump (if_false_label);
if (dummy_true_label)
emit_label (if_true_label);
}
static bool
propagate_rtx_1 (rtx *px, rtx old_rtx, rtx new_rtx, int flags)
{
rtx x = *px, tem = NULL_RTX, op0, op1, op2;
enum rtx_code code = GET_CODE (x);
machine_mode mode = GET_MODE (x);
machine_mode op_mode;
bool can_appear = (flags & PR_CAN_APPEAR) != 0;
bool valid_ops = true;
if (!(flags & PR_HANDLE_MEM) && MEM_P (x) && !MEM_READONLY_P (x))
{
/* If unsafe, change MEMs to CLOBBERs or SCRATCHes (to preserve whether
they have side effects or not). */
*px = (side_effects_p (x)
? gen_rtx_CLOBBER (GET_MODE (x), const0_rtx)
: gen_rtx_SCRATCH (GET_MODE (x)));
return false;
}
/* If X is OLD_RTX, return NEW_RTX. But not if replacing only within an
address, and we are *not* inside one. */
if (x == old_rtx)
{
*px = new_rtx;
return can_appear;
}
/* If this is an expression, try recursive substitution. */
switch (GET_RTX_CLASS (code))
{
case RTX_UNARY:
op0 = XEXP (x, 0);
op_mode = GET_MODE (op0);
valid_ops &= propagate_rtx_1 (&op0, old_rtx, new_rtx, flags);
if (op0 == XEXP (x, 0))
return true;
tem = simplify_gen_unary (code, mode, op0, op_mode);
break;
case RTX_BIN_ARITH:
case RTX_COMM_ARITH:
op0 = XEXP (x, 0);
op1 = XEXP (x, 1);
valid_ops &= propagate_rtx_1 (&op0, old_rtx, new_rtx, flags);
valid_ops &= propagate_rtx_1 (&op1, old_rtx, new_rtx, flags);
if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1))
return true;
tem = simplify_gen_binary (code, mode, op0, op1);
break;
case RTX_COMPARE:
case RTX_COMM_COMPARE:
op0 = XEXP (x, 0);
op1 = XEXP (x, 1);
op_mode = GET_MODE (op0) != VOIDmode ? GET_MODE (op0) : GET_MODE (op1);
valid_ops &= propagate_rtx_1 (&op0, old_rtx, new_rtx, flags);
valid_ops &= propagate_rtx_1 (&op1, old_rtx, new_rtx, flags);
if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1))
return true;
tem = simplify_gen_relational (code, mode, op_mode, op0, op1);
break;
case RTX_TERNARY:
case RTX_BITFIELD_OPS:
op0 = XEXP (x, 0);
op1 = XEXP (x, 1);
op2 = XEXP (x, 2);
op_mode = GET_MODE (op0);
valid_ops &= propagate_rtx_1 (&op0, old_rtx, new_rtx, flags);
valid_ops &= propagate_rtx_1 (&op1, old_rtx, new_rtx, flags);
valid_ops &= propagate_rtx_1 (&op2, old_rtx, new_rtx, flags);
if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1) && op2 == XEXP (x, 2))
return true;
if (op_mode == VOIDmode)
op_mode = GET_MODE (op0);
tem = simplify_gen_ternary (code, mode, op_mode, op0, op1, op2);
break;
case RTX_EXTRA:
/* The only case we try to handle is a SUBREG. */
if (code == SUBREG)
{
op0 = XEXP (x, 0);
valid_ops &= propagate_rtx_1 (&op0, old_rtx, new_rtx, flags);
if (op0 == XEXP (x, 0))
return true;
tem = simplify_gen_subreg (mode, op0, GET_MODE (SUBREG_REG (x)),
SUBREG_BYTE (x));
}
break;
case RTX_OBJ:
if (code == MEM && x != new_rtx)
{
rtx new_op0;
op0 = XEXP (x, 0);
/* There are some addresses that we cannot work on. */
if (!can_simplify_addr (op0))
return true;
op0 = new_op0 = targetm.delegitimize_address (op0);
valid_ops &= propagate_rtx_1 (&new_op0, old_rtx, new_rtx,
flags | PR_CAN_APPEAR);
/* Dismiss transformation that we do not want to carry on. */
if (!valid_ops
|| new_op0 == op0
|| !(GET_MODE (new_op0) == GET_MODE (op0)
|| GET_MODE (new_op0) == VOIDmode))
return true;
canonicalize_address (new_op0);
/* Copy propagations are always ok. Otherwise check the costs. */
if (!(REG_P (old_rtx) && REG_P (new_rtx))
&& !should_replace_address (op0, new_op0, GET_MODE (x),
MEM_ADDR_SPACE (x),
flags & PR_OPTIMIZE_FOR_SPEED))
return true;
tem = replace_equiv_address_nv (x, new_op0);
}
else if (code == LO_SUM)
{
op0 = XEXP (x, 0);
op1 = XEXP (x, 1);
/* The only simplification we do attempts to remove references to op0
or make it constant -- in both cases, op0's invalidity will not
make the result invalid. */
propagate_rtx_1 (&op0, old_rtx, new_rtx, flags | PR_CAN_APPEAR);
valid_ops &= propagate_rtx_1 (&op1, old_rtx, new_rtx, flags);
if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1))
return true;
/* (lo_sum (high x) x) -> x */
if (GET_CODE (op0) == HIGH && rtx_equal_p (XEXP (op0, 0), op1))
tem = op1;
else
tem = gen_rtx_LO_SUM (mode, op0, op1);
/* OP1 is likely not a legitimate address, otherwise there would have
been no LO_SUM. We want it to disappear if it is invalid, return
false in that case. */
return memory_address_p (mode, tem);
}
else if (code == REG)
{
if (rtx_equal_p (x, old_rtx))
{
*px = new_rtx;
return can_appear;
}
}
break;
default:
break;
}
/* No change, no trouble. */
if (tem == NULL_RTX)
return true;
*px = tem;
/* Allow replacements that simplify operations on a vector or complex
value to a component. The most prominent case is
(subreg ([vec_]concat ...)). */
if (REG_P (tem) && !HARD_REGISTER_P (tem)
&& (VECTOR_MODE_P (GET_MODE (new_rtx))
|| COMPLEX_MODE_P (GET_MODE (new_rtx)))
&& GET_MODE (tem) == GET_MODE_INNER (GET_MODE (new_rtx)))
return true;
/* The replacement we made so far is valid, if all of the recursive
replacements were valid, or we could simplify everything to
a constant. */
return valid_ops || can_appear || CONSTANT_P (tem);
}
void
sdbout_symbol (tree decl, int local)
{
tree type = TREE_TYPE (decl);
tree context = NULL_TREE;
rtx value;
int regno = -1;
const char *name;
/* If we are called before sdbout_init is run, just save the symbol
for later. */
if (!sdbout_initialized)
{
preinit_symbols = tree_cons (0, decl, preinit_symbols);
return;
}
sdbout_one_type (type);
switch (TREE_CODE (decl))
{
case CONST_DECL:
/* Enum values are defined by defining the enum type. */
return;
case FUNCTION_DECL:
/* Don't mention a nested function under its parent. */
context = decl_function_context (decl);
if (context == current_function_decl)
return;
/* Check DECL_INITIAL to distinguish declarations from definitions.
Don't output debug info here for declarations; they will have
a DECL_INITIAL value of 0. */
if (! DECL_INITIAL (decl))
return;
if (!MEM_P (DECL_RTL (decl))
|| GET_CODE (XEXP (DECL_RTL (decl), 0)) != SYMBOL_REF)
return;
PUT_SDB_DEF (IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl)));
PUT_SDB_VAL (XEXP (DECL_RTL (decl), 0));
PUT_SDB_SCL (TREE_PUBLIC (decl) ? C_EXT : C_STAT);
break;
case TYPE_DECL:
/* Done with tagged types. */
if (DECL_NAME (decl) == 0)
return;
if (DECL_IGNORED_P (decl))
return;
/* Don't output intrinsic types. GAS chokes on SDB .def
statements that contain identifiers with embedded spaces
(eg "unsigned long"). */
if (DECL_IS_BUILTIN (decl))
return;
/* Output typedef name. */
if (template_name_p (DECL_NAME (decl)))
PUT_SDB_DEF (IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl)));
else
PUT_SDB_DEF (IDENTIFIER_POINTER (DECL_NAME (decl)));
PUT_SDB_SCL (C_TPDEF);
break;
case PARM_DECL:
/* Parm decls go in their own separate chains
and are output by sdbout_reg_parms and sdbout_parms. */
gcc_unreachable ();
case VAR_DECL:
/* Don't mention a variable that is external.
Let the file that defines it describe it. */
if (DECL_EXTERNAL (decl))
return;
/* Ignore __FUNCTION__, etc. */
if (DECL_IGNORED_P (decl))
return;
/* If there was an error in the declaration, don't dump core
if there is no RTL associated with the variable doesn't
exist. */
if (!DECL_RTL_SET_P (decl))
return;
SET_DECL_RTL (decl,
eliminate_regs (DECL_RTL (decl), VOIDmode, NULL_RTX));
#ifdef LEAF_REG_REMAP
if (crtl->uses_only_leaf_regs)
leaf_renumber_regs_insn (DECL_RTL (decl));
#endif
value = DECL_RTL (decl);
/* Don't mention a variable at all
if it was completely optimized into nothingness.
If DECL was from an inline function, then its rtl
is not identically the rtl that was used in this
particular compilation. */
if (REG_P (value))
{
regno = REGNO (value);
if (regno >= FIRST_PSEUDO_REGISTER)
return;
}
else if (GET_CODE (value) == SUBREG)
{
while (GET_CODE (value) == SUBREG)
value = SUBREG_REG (value);
if (REG_P (value))
{
if (REGNO (value) >= FIRST_PSEUDO_REGISTER)
return;
}
regno = REGNO (alter_subreg (&value));
SET_DECL_RTL (decl, value);
}
/* Don't output anything if an auto variable
gets RTL that is static.
GAS version 2.2 can't handle such output. */
else if (MEM_P (value) && CONSTANT_P (XEXP (value, 0))
&& ! TREE_STATIC (decl))
return;
/* Emit any structure, union, or enum type that has not been output.
This occurs for tag-less structs (et al) used to declare variables
within functions. */
if (TREE_CODE (type) == ENUMERAL_TYPE
|| TREE_CODE (type) == RECORD_TYPE
|| TREE_CODE (type) == UNION_TYPE
|| TREE_CODE (type) == QUAL_UNION_TYPE)
{
if (COMPLETE_TYPE_P (type) /* not a forward reference */
&& KNOWN_TYPE_TAG (type) == 0) /* not yet declared */
sdbout_one_type (type);
}
/* Defer SDB information for top-level initialized variables! */
if (! local
&& MEM_P (value)
&& DECL_INITIAL (decl))
return;
/* C++ in 2.3 makes nameless symbols. That will be fixed later.
For now, avoid crashing. */
if (DECL_NAME (decl) == NULL_TREE)
return;
/* Record the name for, starting a symtab entry. */
if (local)
name = IDENTIFIER_POINTER (DECL_NAME (decl));
else
name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl));
if (MEM_P (value)
&& GET_CODE (XEXP (value, 0)) == SYMBOL_REF)
{
PUT_SDB_DEF (name);
if (TREE_PUBLIC (decl))
{
PUT_SDB_VAL (XEXP (value, 0));
PUT_SDB_SCL (C_EXT);
}
else
{
PUT_SDB_VAL (XEXP (value, 0));
PUT_SDB_SCL (C_STAT);
}
}
else if (regno >= 0)
{
PUT_SDB_DEF (name);
PUT_SDB_INT_VAL (DBX_REGISTER_NUMBER (regno));
PUT_SDB_SCL (C_REG);
}
else if (MEM_P (value)
&& (MEM_P (XEXP (value, 0))
|| (REG_P (XEXP (value, 0))
&& REGNO (XEXP (value, 0)) != HARD_FRAME_POINTER_REGNUM
&& REGNO (XEXP (value, 0)) != STACK_POINTER_REGNUM)))
/* If the value is indirect by memory or by a register
that isn't the frame pointer
then it means the object is variable-sized and address through
that register or stack slot. COFF has no way to represent this
so all we can do is output the variable as a pointer. */
{
PUT_SDB_DEF (name);
if (REG_P (XEXP (value, 0)))
{
PUT_SDB_INT_VAL (DBX_REGISTER_NUMBER (REGNO (XEXP (value, 0))));
PUT_SDB_SCL (C_REG);
}
else
{
/* DECL_RTL looks like (MEM (MEM (PLUS (REG...)
(CONST_INT...)))).
We want the value of that CONST_INT. */
/* Encore compiler hates a newline in a macro arg, it seems. */
PUT_SDB_INT_VAL (DEBUGGER_AUTO_OFFSET
(XEXP (XEXP (value, 0), 0)));
PUT_SDB_SCL (C_AUTO);
}
/* Effectively do build_pointer_type, but don't cache this type,
since it might be temporary whereas the type it points to
might have been saved for inlining. */
/* Don't use REFERENCE_TYPE because dbx can't handle that. */
type = make_node (POINTER_TYPE);
TREE_TYPE (type) = TREE_TYPE (decl);
}
else if (MEM_P (value)
&& ((GET_CODE (XEXP (value, 0)) == PLUS
&& REG_P (XEXP (XEXP (value, 0), 0))
&& CONST_INT_P (XEXP (XEXP (value, 0), 1)))
/* This is for variables which are at offset zero from
the frame pointer. This happens on the Alpha.
Non-frame pointer registers are excluded above. */
|| (REG_P (XEXP (value, 0)))))
{
/* DECL_RTL looks like (MEM (PLUS (REG...) (CONST_INT...)))
or (MEM (REG...)). We want the value of that CONST_INT
or zero. */
PUT_SDB_DEF (name);
PUT_SDB_INT_VAL (DEBUGGER_AUTO_OFFSET (XEXP (value, 0)));
PUT_SDB_SCL (C_AUTO);
}
else
{
/* It is something we don't know how to represent for SDB. */
return;
}
break;
default:
break;
}
PUT_SDB_TYPE (plain_type (type));
PUT_SDB_ENDEF;
}
static bool
speculative_prefetching_transform (rtx insn)
{
rtx histogram, value;
gcov_type val, count, all;
edge e;
rtx mem, address;
int write;
if (!maybe_hot_bb_p (BLOCK_FOR_INSN (insn)))
return false;
if (!find_mem_reference (insn, &mem, &write))
return false;
address = XEXP (mem, 0);
if (side_effects_p (address))
return false;
if (CONSTANT_P (address))
return false;
for (histogram = REG_NOTES (insn);
histogram;
histogram = XEXP (histogram, 1))
if (REG_NOTE_KIND (histogram) == REG_VALUE_PROFILE
&& XEXP (XEXP (histogram, 0), 0) == GEN_INT (HIST_TYPE_CONST_DELTA))
break;
if (!histogram)
return false;
histogram = XEXP (XEXP (histogram, 0), 1);
value = XEXP (histogram, 0);
histogram = XEXP (histogram, 1);
/* Skip last value referenced. */
histogram = XEXP (histogram, 1);
val = INTVAL (XEXP (histogram, 0));
histogram = XEXP (histogram, 1);
count = INTVAL (XEXP (histogram, 0));
histogram = XEXP (histogram, 1);
all = INTVAL (XEXP (histogram, 0));
/* With that few executions we do not really have a reason to optimize the
statement, and more importantly, the data about differences of addresses
are spoiled by the first item that had no previous value to compare
with. */
if (all < 4)
return false;
/* We require that count be at least half of all; this means
that for the transformation to fire the value must be constant
at least 50% of time (and 75% gives the guarantee of usage). */
if (!rtx_equal_p (address, value) || 2 * count < all)
return false;
/* If the difference is too small, it does not make too much sense to
prefetch, as the memory is probably already in cache. */
if (val >= NOPREFETCH_RANGE_MIN && val <= NOPREFETCH_RANGE_MAX)
return false;
if (dump_file)
fprintf (dump_file, "Speculative prefetching for insn %d\n",
INSN_UID (insn));
e = split_block (BLOCK_FOR_INSN (insn), PREV_INSN (insn));
insert_insn_on_edge (gen_speculative_prefetch (address, val, write), e);
return true;
}
static rtx
may_unswitch_on (basic_block bb, struct loop *loop, rtx *cinsn)
{
rtx test, at, op[2], stest;
struct rtx_iv iv;
unsigned i;
enum machine_mode mode;
/* BB must end in a simple conditional jump. */
if (EDGE_COUNT (bb->succs) != 2)
return NULL_RTX;
if (!any_condjump_p (BB_END (bb)))
return NULL_RTX;
/* With branches inside loop. */
if (!flow_bb_inside_loop_p (loop, EDGE_SUCC (bb, 0)->dest)
|| !flow_bb_inside_loop_p (loop, EDGE_SUCC (bb, 1)->dest))
return NULL_RTX;
/* It must be executed just once each iteration (because otherwise we
are unable to update dominator/irreducible loop information correctly). */
if (!just_once_each_iteration_p (loop, bb))
return NULL_RTX;
/* Condition must be invariant. */
test = get_condition (BB_END (bb), &at, true, false);
if (!test)
return NULL_RTX;
for (i = 0; i < 2; i++)
{
op[i] = XEXP (test, i);
if (CONSTANT_P (op[i]))
continue;
if (!iv_analyze (at, op[i], &iv))
return NULL_RTX;
if (iv.step != const0_rtx
|| iv.first_special)
return NULL_RTX;
op[i] = get_iv_value (&iv, const0_rtx);
}
mode = GET_MODE (op[0]);
if (mode == VOIDmode)
mode = GET_MODE (op[1]);
if (GET_MODE_CLASS (mode) == MODE_CC)
{
if (at != BB_END (bb))
return NULL_RTX;
if (!rtx_equal_p (op[0], XEXP (test, 0))
|| !rtx_equal_p (op[1], XEXP (test, 1)))
return NULL_RTX;
*cinsn = BB_END (bb);
return test;
}
stest = simplify_gen_relational (GET_CODE (test), SImode,
mode, op[0], op[1]);
if (stest == const0_rtx
|| stest == const_true_rtx)
return stest;
return canon_condition (gen_rtx_fmt_ee (GET_CODE (test), SImode,
op[0], op[1]));
}
void
do_compare_rtx_and_jump (rtx op0, rtx op1, enum rtx_code code, int unsignedp,
machine_mode mode, rtx size,
rtx_code_label *if_false_label,
rtx_code_label *if_true_label, int prob)
{
rtx tem;
rtx_code_label *dummy_label = NULL;
/* Reverse the comparison if that is safe and we want to jump if it is
false. Also convert to the reverse comparison if the target can
implement it. */
if ((! if_true_label
|| ! can_compare_p (code, mode, ccp_jump))
&& (! FLOAT_MODE_P (mode)
|| code == ORDERED || code == UNORDERED
|| (! HONOR_NANS (mode) && (code == LTGT || code == UNEQ))
|| (! HONOR_SNANS (mode) && (code == EQ || code == NE))))
{
enum rtx_code rcode;
if (FLOAT_MODE_P (mode))
rcode = reverse_condition_maybe_unordered (code);
else
rcode = reverse_condition (code);
/* Canonicalize to UNORDERED for the libcall. */
if (can_compare_p (rcode, mode, ccp_jump)
|| (code == ORDERED && ! can_compare_p (ORDERED, mode, ccp_jump)))
{
std::swap (if_true_label, if_false_label);
code = rcode;
prob = inv (prob);
}
}
/* If one operand is constant, make it the second one. Only do this
if the other operand is not constant as well. */
if (swap_commutative_operands_p (op0, op1))
{
std::swap (op0, op1);
code = swap_condition (code);
}
do_pending_stack_adjust ();
code = unsignedp ? unsigned_condition (code) : code;
if (0 != (tem = simplify_relational_operation (code, mode, VOIDmode,
op0, op1)))
{
if (CONSTANT_P (tem))
{
rtx_code_label *label = (tem == const0_rtx
|| tem == CONST0_RTX (mode))
? if_false_label : if_true_label;
if (label)
emit_jump (label);
return;
}
code = GET_CODE (tem);
mode = GET_MODE (tem);
op0 = XEXP (tem, 0);
op1 = XEXP (tem, 1);
unsignedp = (code == GTU || code == LTU || code == GEU || code == LEU);
}
if (! if_true_label)
dummy_label = if_true_label = gen_label_rtx ();
if (GET_MODE_CLASS (mode) == MODE_INT
&& ! can_compare_p (code, mode, ccp_jump))
{
switch (code)
{
case LTU:
do_jump_by_parts_greater_rtx (mode, 1, op1, op0,
if_false_label, if_true_label, prob);
break;
case LEU:
do_jump_by_parts_greater_rtx (mode, 1, op0, op1,
if_true_label, if_false_label,
inv (prob));
break;
case GTU:
do_jump_by_parts_greater_rtx (mode, 1, op0, op1,
if_false_label, if_true_label, prob);
break;
case GEU:
do_jump_by_parts_greater_rtx (mode, 1, op1, op0,
if_true_label, if_false_label,
inv (prob));
break;
case LT:
do_jump_by_parts_greater_rtx (mode, 0, op1, op0,
if_false_label, if_true_label, prob);
break;
case LE:
do_jump_by_parts_greater_rtx (mode, 0, op0, op1,
if_true_label, if_false_label,
inv (prob));
break;
case GT:
do_jump_by_parts_greater_rtx (mode, 0, op0, op1,
if_false_label, if_true_label, prob);
break;
case GE:
do_jump_by_parts_greater_rtx (mode, 0, op1, op0,
if_true_label, if_false_label,
inv (prob));
break;
case EQ:
do_jump_by_parts_equality_rtx (mode, op0, op1, if_false_label,
if_true_label, prob);
break;
case NE:
do_jump_by_parts_equality_rtx (mode, op0, op1, if_true_label,
if_false_label, inv (prob));
break;
default:
gcc_unreachable ();
}
}
else
{
if (SCALAR_FLOAT_MODE_P (mode)
&& ! can_compare_p (code, mode, ccp_jump)
&& can_compare_p (swap_condition (code), mode, ccp_jump))
{
code = swap_condition (code);
std::swap (op0, op1);
}
else if (SCALAR_FLOAT_MODE_P (mode)
&& ! can_compare_p (code, mode, ccp_jump)
/* Never split ORDERED and UNORDERED.
These must be implemented. */
&& (code != ORDERED && code != UNORDERED)
/* Split a floating-point comparison if
we can jump on other conditions... */
&& (have_insn_for (COMPARE, mode)
/* ... or if there is no libcall for it. */
|| code_to_optab (code) == unknown_optab))
{
enum rtx_code first_code;
bool and_them = split_comparison (code, mode, &first_code, &code);
/* If there are no NaNs, the first comparison should always fall
through. */
if (!HONOR_NANS (mode))
gcc_assert (first_code == (and_them ? ORDERED : UNORDERED));
else
{
int first_prob = prob;
if (first_code == UNORDERED)
first_prob = REG_BR_PROB_BASE / 100;
else if (first_code == ORDERED)
first_prob = REG_BR_PROB_BASE - REG_BR_PROB_BASE / 100;
if (and_them)
{
rtx_code_label *dest_label;
/* If we only jump if true, just bypass the second jump. */
if (! if_false_label)
{
if (! dummy_label)
dummy_label = gen_label_rtx ();
dest_label = dummy_label;
}
else
dest_label = if_false_label;
do_compare_rtx_and_jump (op0, op1, first_code, unsignedp, mode,
size, dest_label, NULL, first_prob);
}
else
do_compare_rtx_and_jump (op0, op1, first_code, unsignedp, mode,
size, NULL, if_true_label, first_prob);
}
}
emit_cmp_and_jump_insns (op0, op1, code, size, mode, unsignedp,
if_true_label, prob);
}
if (if_false_label)
emit_jump (if_false_label);
if (dummy_label)
emit_label (dummy_label);
}
void
do_compare_rtx_and_jump (rtx op0, rtx op1, enum rtx_code code, int unsignedp,
enum machine_mode mode, rtx size, rtx if_false_label,
rtx if_true_label)
{
rtx tem;
int dummy_true_label = 0;
/* Reverse the comparison if that is safe and we want to jump if it is
false. */
if (! if_true_label && ! FLOAT_MODE_P (mode))
{
if_true_label = if_false_label;
if_false_label = 0;
code = reverse_condition (code);
}
/* If one operand is constant, make it the second one. Only do this
if the other operand is not constant as well. */
if (swap_commutative_operands_p (op0, op1))
{
tem = op0;
op0 = op1;
op1 = tem;
code = swap_condition (code);
}
do_pending_stack_adjust ();
code = unsignedp ? unsigned_condition (code) : code;
if (0 != (tem = simplify_relational_operation (code, mode, VOIDmode,
op0, op1)))
{
if (CONSTANT_P (tem))
{
rtx label = (tem == const0_rtx || tem == CONST0_RTX (mode))
? if_false_label : if_true_label;
if (label)
emit_jump (label);
return;
}
code = GET_CODE (tem);
mode = GET_MODE (tem);
op0 = XEXP (tem, 0);
op1 = XEXP (tem, 1);
unsignedp = (code == GTU || code == LTU || code == GEU || code == LEU);
}
if (! if_true_label)
{
dummy_true_label = 1;
if_true_label = gen_label_rtx ();
}
emit_cmp_and_jump_insns (op0, op1, code, size, mode, unsignedp,
if_true_label);
if (if_false_label)
emit_jump (if_false_label);
if (dummy_true_label)
emit_label (if_true_label);
}
static int
reload_cse_simplify_operands (rtx insn, rtx testreg)
{
int i, j;
/* For each operand, all registers that are equivalent to it. */
HARD_REG_SET equiv_regs[MAX_RECOG_OPERANDS];
const char *constraints[MAX_RECOG_OPERANDS];
/* Vector recording how bad an alternative is. */
int *alternative_reject;
/* Vector recording how many registers can be introduced by choosing
this alternative. */
int *alternative_nregs;
/* Array of vectors recording, for each operand and each alternative,
which hard register to substitute, or -1 if the operand should be
left as it is. */
int *op_alt_regno[MAX_RECOG_OPERANDS];
/* Array of alternatives, sorted in order of decreasing desirability. */
int *alternative_order;
extract_insn (insn);
if (recog_data.n_alternatives == 0 || recog_data.n_operands == 0)
return 0;
/* Figure out which alternative currently matches. */
if (! constrain_operands (1))
fatal_insn_not_found (insn);
alternative_reject = XALLOCAVEC (int, recog_data.n_alternatives);
alternative_nregs = XALLOCAVEC (int, recog_data.n_alternatives);
alternative_order = XALLOCAVEC (int, recog_data.n_alternatives);
memset (alternative_reject, 0, recog_data.n_alternatives * sizeof (int));
memset (alternative_nregs, 0, recog_data.n_alternatives * sizeof (int));
/* For each operand, find out which regs are equivalent. */
for (i = 0; i < recog_data.n_operands; i++)
{
cselib_val *v;
struct elt_loc_list *l;
rtx op;
enum machine_mode mode;
CLEAR_HARD_REG_SET (equiv_regs[i]);
/* cselib blows up on CODE_LABELs. Trying to fix that doesn't seem
right, so avoid the problem here. Likewise if we have a constant
and the insn pattern doesn't tell us the mode we need. */
if (LABEL_P (recog_data.operand[i])
|| (CONSTANT_P (recog_data.operand[i])
&& recog_data.operand_mode[i] == VOIDmode))
continue;
op = recog_data.operand[i];
mode = GET_MODE (op);
#ifdef LOAD_EXTEND_OP
if (MEM_P (op)
&& GET_MODE_BITSIZE (mode) < BITS_PER_WORD
&& LOAD_EXTEND_OP (mode) != UNKNOWN)
{
rtx set = single_set (insn);
/* We might have multiple sets, some of which do implicit
extension. Punt on this for now. */
if (! set)
continue;
/* If the destination is also a MEM or a STRICT_LOW_PART, no
extension applies.
Also, if there is an explicit extension, we don't have to
worry about an implicit one. */
else if (MEM_P (SET_DEST (set))
|| GET_CODE (SET_DEST (set)) == STRICT_LOW_PART
|| GET_CODE (SET_SRC (set)) == ZERO_EXTEND
|| GET_CODE (SET_SRC (set)) == SIGN_EXTEND)
; /* Continue ordinary processing. */
#ifdef CANNOT_CHANGE_MODE_CLASS
/* If the register cannot change mode to word_mode, it follows that
it cannot have been used in word_mode. */
else if (REG_P (SET_DEST (set))
&& CANNOT_CHANGE_MODE_CLASS (GET_MODE (SET_DEST (set)),
word_mode,
REGNO_REG_CLASS (REGNO (SET_DEST (set)))))
; /* Continue ordinary processing. */
#endif
/* If this is a straight load, make the extension explicit. */
else if (REG_P (SET_DEST (set))
&& recog_data.n_operands == 2
&& SET_SRC (set) == op
&& SET_DEST (set) == recog_data.operand[1-i])
{
validate_change (insn, recog_data.operand_loc[i],
gen_rtx_fmt_e (LOAD_EXTEND_OP (mode),
word_mode, op),
1);
validate_change (insn, recog_data.operand_loc[1-i],
gen_rtx_REG (word_mode, REGNO (SET_DEST (set))),
1);
if (! apply_change_group ())
return 0;
return reload_cse_simplify_operands (insn, testreg);
}
else
/* ??? There might be arithmetic operations with memory that are
safe to optimize, but is it worth the trouble? */
continue;
}
#endif /* LOAD_EXTEND_OP */
v = cselib_lookup (op, recog_data.operand_mode[i], 0);
if (! v)
continue;
for (l = v->locs; l; l = l->next)
if (REG_P (l->loc))
SET_HARD_REG_BIT (equiv_regs[i], REGNO (l->loc));
}
for (i = 0; i < recog_data.n_operands; i++)
{
enum machine_mode mode;
int regno;
const char *p;
op_alt_regno[i] = XALLOCAVEC (int, recog_data.n_alternatives);
for (j = 0; j < recog_data.n_alternatives; j++)
op_alt_regno[i][j] = -1;
p = constraints[i] = recog_data.constraints[i];
mode = recog_data.operand_mode[i];
/* Add the reject values for each alternative given by the constraints
for this operand. */
j = 0;
while (*p != '\0')
{
char c = *p++;
if (c == ',')
j++;
else if (c == '?')
alternative_reject[j] += 3;
else if (c == '!')
alternative_reject[j] += 300;
}
/* We won't change operands which are already registers. We
also don't want to modify output operands. */
regno = true_regnum (recog_data.operand[i]);
if (regno >= 0
|| constraints[i][0] == '='
|| constraints[i][0] == '+')
continue;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
{
int rclass = (int) NO_REGS;
if (! TEST_HARD_REG_BIT (equiv_regs[i], regno))
continue;
SET_REGNO (testreg, regno);
PUT_MODE (testreg, mode);
/* We found a register equal to this operand. Now look for all
alternatives that can accept this register and have not been
assigned a register they can use yet. */
j = 0;
p = constraints[i];
for (;;)
{
char c = *p;
switch (c)
{
case '=': case '+': case '?':
case '#': case '&': case '!':
case '*': case '%':
case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
case '<': case '>': case 'V': case 'o':
case 'E': case 'F': case 'G': case 'H':
case 's': case 'i': case 'n':
case 'I': case 'J': case 'K': case 'L':
case 'M': case 'N': case 'O': case 'P':
case 'p': case 'X': case TARGET_MEM_CONSTRAINT:
/* These don't say anything we care about. */
break;
case 'g': case 'r':
rclass = reg_class_subunion[(int) rclass][(int) GENERAL_REGS];
break;
default:
rclass
= (reg_class_subunion
[(int) rclass]
[(int) REG_CLASS_FROM_CONSTRAINT ((unsigned char) c, p)]);
break;
case ',': case '\0':
/* See if REGNO fits this alternative, and set it up as the
replacement register if we don't have one for this
alternative yet and the operand being replaced is not
a cheap CONST_INT. */
if (op_alt_regno[i][j] == -1
&& reg_fits_class_p (testreg, rclass, 0, mode)
&& (GET_CODE (recog_data.operand[i]) != CONST_INT
|| (rtx_cost (recog_data.operand[i], SET,
optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)))
> rtx_cost (testreg, SET,
optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn))))))
{
alternative_nregs[j]++;
op_alt_regno[i][j] = regno;
}
j++;
rclass = (int) NO_REGS;
break;
}
p += CONSTRAINT_LEN (c, p);
if (c == '\0')
break;
}
}
}
/* Record all alternatives which are better or equal to the currently
matching one in the alternative_order array. */
for (i = j = 0; i < recog_data.n_alternatives; i++)
if (alternative_reject[i] <= alternative_reject[which_alternative])
alternative_order[j++] = i;
recog_data.n_alternatives = j;
/* Sort it. Given a small number of alternatives, a dumb algorithm
won't hurt too much. */
for (i = 0; i < recog_data.n_alternatives - 1; i++)
{
int best = i;
int best_reject = alternative_reject[alternative_order[i]];
int best_nregs = alternative_nregs[alternative_order[i]];
int tmp;
for (j = i + 1; j < recog_data.n_alternatives; j++)
{
int this_reject = alternative_reject[alternative_order[j]];
int this_nregs = alternative_nregs[alternative_order[j]];
if (this_reject < best_reject
|| (this_reject == best_reject && this_nregs > best_nregs))
{
best = j;
best_reject = this_reject;
best_nregs = this_nregs;
}
}
tmp = alternative_order[best];
alternative_order[best] = alternative_order[i];
alternative_order[i] = tmp;
}
/* Substitute the operands as determined by op_alt_regno for the best
alternative. */
j = alternative_order[0];
for (i = 0; i < recog_data.n_operands; i++)
{
enum machine_mode mode = recog_data.operand_mode[i];
if (op_alt_regno[i][j] == -1)
continue;
validate_change (insn, recog_data.operand_loc[i],
gen_rtx_REG (mode, op_alt_regno[i][j]), 1);
}
for (i = recog_data.n_dups - 1; i >= 0; i--)
{
int op = recog_data.dup_num[i];
enum machine_mode mode = recog_data.operand_mode[op];
if (op_alt_regno[op][j] == -1)
continue;
validate_change (insn, recog_data.dup_loc[i],
gen_rtx_REG (mode, op_alt_regno[op][j]), 1);
}
return apply_change_group ();
}
/* Scan X and replace any eliminable registers (such as fp) with a
replacement (such as sp) if SUBST_P, plus an offset. The offset is
a change in the offset between the eliminable register and its
substitution if UPDATE_P, or the full offset if FULL_P, or
otherwise zero. If FULL_P, we also use the SP offsets for
elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating
offsets of register elimnable to SP. If UPDATE_SP_OFFSET is
non-zero, don't use difference of the offset and the previous
offset.
MEM_MODE is the mode of an enclosing MEM. We need this to know how
much to adjust a register for, e.g., PRE_DEC. Also, if we are
inside a MEM, we are allowed to replace a sum of a hard register
and the constant zero with the hard register, which we cannot do
outside a MEM. In addition, we need to record the fact that a
hard register is referenced outside a MEM.
If we make full substitution to SP for non-null INSN, add the insn
sp offset. */
rtx
lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
bool subst_p, bool update_p,
HOST_WIDE_INT update_sp_offset, bool full_p)
{
enum rtx_code code = GET_CODE (x);
struct lra_elim_table *ep;
rtx new_rtx;
int i, j;
const char *fmt;
int copied = 0;
lra_assert (!update_p || !full_p);
lra_assert (update_sp_offset == 0 || (!subst_p && update_p && !full_p));
if (! current_function_decl)
return x;
switch (code)
{
CASE_CONST_ANY:
case CONST:
case SYMBOL_REF:
case CODE_LABEL:
case PC:
case CC0:
case ASM_INPUT:
case ADDR_VEC:
case ADDR_DIFF_VEC:
case RETURN:
return x;
case REG:
/* First handle the case where we encounter a bare hard register
that is eliminable. Replace it with a PLUS. */
if ((ep = get_elimination (x)) != NULL)
{
rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
if (update_sp_offset != 0)
{
if (ep->to_rtx == stack_pointer_rtx)
return plus_constant (Pmode, to, update_sp_offset);
return to;
}
else if (update_p)
return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
else if (full_p)
return plus_constant (Pmode, to,
ep->offset
- (insn != NULL_RTX
&& ep->to_rtx == stack_pointer_rtx
? lra_get_insn_recog_data (insn)->sp_offset
: 0));
else
return to;
}
return x;
case PLUS:
/* If this is the sum of an eliminable register and a constant, rework
the sum. */
if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
{
if ((ep = get_elimination (XEXP (x, 0))) != NULL)
{
HOST_WIDE_INT offset;
rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
if (! update_p && ! full_p)
return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
if (update_sp_offset != 0)
offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
else
offset = (update_p
? ep->offset - ep->previous_offset : ep->offset);
if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
offset -= lra_get_insn_recog_data (insn)->sp_offset;
if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) == -offset)
return to;
else
return gen_rtx_PLUS (Pmode, to,
plus_constant (Pmode,
XEXP (x, 1), offset));
}
/* If the hard register is not eliminable, we are done since
the other operand is a constant. */
return x;
}
/* If this is part of an address, we want to bring any constant
to the outermost PLUS. We will do this by doing hard
register replacement in our operands and seeing if a constant
shows up in one of them.
Note that there is no risk of modifying the structure of the
insn, since we only get called for its operands, thus we are
either modifying the address inside a MEM, or something like
an address operand of a load-address insn. */
{
rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
new0 = move_plus_up (new0);
new1 = move_plus_up (new1);
if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
return form_sum (new0, new1);
}
return x;
case MULT:
/* If this is the product of an eliminable hard register and a
constant, apply the distribute law and move the constant out
so that we have (plus (mult ..) ..). This is needed in order
to keep load-address insns valid. This case is pathological.
We ignore the possibility of overflow here. */
if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
&& (ep = get_elimination (XEXP (x, 0))) != NULL)
{
rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
if (update_sp_offset != 0)
{
if (ep->to_rtx == stack_pointer_rtx)
return plus_constant (Pmode,
gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
update_sp_offset * INTVAL (XEXP (x, 1)));
return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
}
else if (update_p)
return plus_constant (Pmode,
gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
(ep->offset - ep->previous_offset)
* INTVAL (XEXP (x, 1)));
else if (full_p)
{
HOST_WIDE_INT offset = ep->offset;
if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
offset -= lra_get_insn_recog_data (insn)->sp_offset;
return
plus_constant (Pmode,
gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
offset * INTVAL (XEXP (x, 1)));
}
else
return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
}
/* fall through */
case CALL:
case COMPARE:
/* See comments before PLUS about handling MINUS. */
case MINUS:
case DIV: case UDIV:
case MOD: case UMOD:
case AND: case IOR: case XOR:
case ROTATERT: case ROTATE:
case ASHIFTRT: case LSHIFTRT: case ASHIFT:
case NE: case EQ:
case GE: case GT: case GEU: case GTU:
case LE: case LT: case LEU: case LTU:
{
rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
rtx new1 = XEXP (x, 1)
? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
subst_p, update_p,
update_sp_offset, full_p) : 0;
if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
}
return x;
case EXPR_LIST:
/* If we have something in XEXP (x, 0), the usual case,
eliminate it. */
if (XEXP (x, 0))
{
new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != XEXP (x, 0))
{
/* If this is a REG_DEAD note, it is not valid anymore.
Using the eliminated version could result in creating a
REG_DEAD note for the stack or frame pointer. */
if (REG_NOTE_KIND (x) == REG_DEAD)
return (XEXP (x, 1)
? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
subst_p, update_p,
update_sp_offset, full_p)
: NULL_RTX);
x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
}
}
/* fall through */
case INSN_LIST:
case INT_LIST:
/* Now do eliminations in the rest of the chain. If this was
an EXPR_LIST, this might result in allocating more memory than is
strictly needed, but it simplifies the code. */
if (XEXP (x, 1))
{
new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != XEXP (x, 1))
return
gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
XEXP (x, 0), new_rtx);
}
return x;
case PRE_INC:
case POST_INC:
case PRE_DEC:
case POST_DEC:
/* We do not support elimination of a register that is modified.
elimination_effects has already make sure that this does not
happen. */
return x;
case PRE_MODIFY:
case POST_MODIFY:
/* We do not support elimination of a hard register that is
modified. LRA has already make sure that this does not
happen. The only remaining case we need to consider here is
that the increment value may be an eliminable register. */
if (GET_CODE (XEXP (x, 1)) == PLUS
&& XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
{
rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1),
mem_mode, subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != XEXP (XEXP (x, 1), 1))
return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
gen_rtx_PLUS (GET_MODE (x),
XEXP (x, 0), new_rtx));
}
return x;
case STRICT_LOW_PART:
case NEG: case NOT:
case SIGN_EXTEND: case ZERO_EXTEND:
case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
case FLOAT: case FIX:
case UNSIGNED_FIX: case UNSIGNED_FLOAT:
case ABS:
case SQRT:
case FFS:
case CLZ:
case CTZ:
case POPCOUNT:
case PARITY:
case BSWAP:
new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != XEXP (x, 0))
return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
return x;
case SUBREG:
new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != SUBREG_REG (x))
{
int x_size = GET_MODE_SIZE (GET_MODE (x));
int new_size = GET_MODE_SIZE (GET_MODE (new_rtx));
if (MEM_P (new_rtx) && x_size <= new_size)
{
SUBREG_REG (x) = new_rtx;
alter_subreg (&x, false);
return x;
}
else if (! subst_p)
{
/* LRA can transform subregs itself. So don't call
simplify_gen_subreg until LRA transformations are
finished. Function simplify_gen_subreg can do
non-trivial transformations (like truncation) which
might make LRA work to fail. */
SUBREG_REG (x) = new_rtx;
return x;
}
else
return simplify_gen_subreg (GET_MODE (x), new_rtx,
GET_MODE (new_rtx), SUBREG_BYTE (x));
}
return x;
case MEM:
/* Our only special processing is to pass the mode of the MEM to our
recursive call and copy the flags. While we are here, handle this
case more efficiently. */
return
replace_equiv_address_nv
(x,
lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x),
subst_p, update_p, update_sp_offset, full_p));
case USE:
/* Handle insn_list USE that a call to a pure function may generate. */
new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode,
subst_p, update_p, update_sp_offset, full_p);
if (new_rtx != XEXP (x, 0))
return gen_rtx_USE (GET_MODE (x), new_rtx);
return x;
case CLOBBER:
case SET:
gcc_unreachable ();
default:
break;
}
/* Process each of our operands recursively. If any have changed, make a
copy of the rtx. */
fmt = GET_RTX_FORMAT (code);
for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
{
if (*fmt == 'e')
{
new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != XEXP (x, i) && ! copied)
{
x = shallow_copy_rtx (x);
copied = 1;
}
XEXP (x, i) = new_rtx;
}
else if (*fmt == 'E')
{
int copied_vec = 0;
for (j = 0; j < XVECLEN (x, i); j++)
{
new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
{
rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
XVEC (x, i)->elem);
if (! copied)
{
x = shallow_copy_rtx (x);
copied = 1;
}
XVEC (x, i) = new_v;
copied_vec = 1;
}
XVECEXP (x, i, j) = new_rtx;
}
}
}
return x;
}
