void strh_reg(uint8_t rt, uint8_t rn, uint8_t rm, enum SRType shift_t, uint8_t shift_n) { union apsr_t apsr = CORE_apsr_read(); uint32_t offset; offset = Shift(CORE_reg_read(rm), 32, shift_t, shift_n, apsr.bits.C); uint32_t address; address = CORE_reg_read(rn) + offset; write_halfword_unaligned(address, CORE_reg_read(rt) & 0xffff); }
void str_reg(uint8_t rt, uint8_t rn, uint8_t rm, enum SRType shift_t, uint8_t shift_n) { uint32_t rn_val = CORE_reg_read(rn); uint32_t rm_val = CORE_reg_read(rm); uint32_t rt_val = CORE_reg_read(rt); union apsr_t apsr = CORE_apsr_read(); uint32_t offset = Shift(rm_val, 32, shift_t, shift_n, apsr.bits.C); uint32_t address = rn_val + offset; uint32_t data = rt_val; write_word_unaligned(address, data); }
void orr_reg(uint8_t setflags, uint8_t rd, uint8_t rn, uint8_t rm, enum SRType shift_t, uint8_t shift_n) { uint32_t result; bool carry_out; union apsr_t apsr = CORE_apsr_read(); Shift_C(CORE_reg_read(rm), 32, shift_t, shift_n, apsr.bits.C, &result, &carry_out); result = CORE_reg_read(rn) | result; CORE_reg_write(rd, result); if (setflags) { apsr.bits.N = HIGH_BIT(result); apsr.bits.Z = result == 0; apsr.bits.C = carry_out; CORE_apsr_write(apsr); } }
void bic_reg(uint8_t rd, uint8_t rn, uint8_t rm, bool setflags, enum SRType shift_t, uint8_t shift_n) { union apsr_t apsr = CORE_apsr_read(); uint32_t shifted; bool carry_out; Shift_C(CORE_reg_read(rm), 32, shift_t, shift_n, apsr.bits.C, &shifted, &carry_out); uint32_t result = CORE_reg_read(rn) & ~shifted; CORE_reg_write(rd, result); if (setflags) { apsr.bits.N = HIGH_BIT(result); apsr.bits.Z = result == 0; apsr.bits.C = carry_out; CORE_apsr_write(apsr); } }
EXPORT void CORE_xPSR_write(uint32_t xPSR) { union ipsr_t i = CORE_ipsr_read(); union epsr_t e = CORE_epsr_read(); union apsr_t a = CORE_apsr_read(); i.storage &= ~xPSR_ipsr_mask; i.storage |= xPSR & xPSR_ipsr_mask; CORE_ipsr_write(i); e.storage &= ~xPSR_epsr_mask; e.storage |= xPSR & xPSR_epsr_mask; CORE_epsr_write(e); uint32_t apsr_mask; if (HaveDSPExt()) apsr_mask = xPSR_apsr_dsp_mask; else apsr_mask = xPSR_apsr_nodsp_mask; a.storage &= ~apsr_mask; a.storage |= xPSR & apsr_mask; CORE_apsr_write(a); }