/** * ============================================================================ * @n@b Osal_cppiBeginMemAccess * * @b brief * @n The function is used to indicate that a block of memory is * about to be accessed. If the memory block is cached then this * indicates that the application would need to ensure that the * cache is updated with the data from the actual memory. * * @param[in] ptr * Address of memory block * * @param[in] size * Size of memory block * @retval * Not Applicable * ============================================================================= */ void Osal_cppiBeginMemAccess (void *ptr, uint32_t size) { /* Recommended sequence for cache operations is: * 1) Disable all interrupts * 2) Perform the cache block operation * 3) Wait until the cache operation is done either by polling * the corresponding WC register or using _mfence () * instruction. * 4) Enable interrupts back. */ /* Disable all interrupts */ Osal_biosInterruptCsEnter (); /* Invalidate L1D cache and wait until operation is complete. * Use this approach if L2 cache is not enabled */ CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT); /* Invalidate L2 cache. This should invalidate L1D as well. * Wait until operation is complete. */ /* CACHE_invL2 (ptr, size, CACHE_FENCE_WAIT); */ /* Invalidate the prefetch buffer also. */ CSL_XMC_invalidatePrefetchBuffer(); /* Enable back interrupts */ Osal_biosInterruptCsExit (); return; }
/** * @b Description * @n * The function is used by the SRIO driver to indicate that * its about to access a block of memory and we need to ensure * that the cache contents for this block are invalidated before * we try and use it. * * @param[in] ptr * Pointer to the buffer which is being accessed * @param[in] size * Size of the buffer which is to be accessed. * * @retval * None */ void Osal_srioBeginMemAccess(void* ptr, uint32_t size) { #if 0 CACHE_invL1d (ptr, size, CACHE_WAIT); /* Cleanup the prefectch buffer also. */ CSL_XMC_invalidatePrefetchBuffer(); #else UInt key; /* Disable Interrupts */ key = Hwi_disable(); /* Cleanup the prefetch buffer also. */ CSL_XMC_invalidatePrefetchBuffer(); /* Invalidate the cache. */ CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT); /* Reenable Interrupts. */ Hwi_restore(key); #endif }
/** * @b Description * @n * The function is used to indicate that a block of memory is * about to be accessed. If the memory block is cached then this * indicates that the application would need to ensure that the * cache is updated with the data from the actual memory. * * @param[in] ptr * Address of memory block * @param[in] size * Size of memory block * * @retval * Not Applicable */ void Osal_qmssBeginMemAccess (void *ptr, uint32_t size) { #if 0 /* Invalidate L1D cache and wait until operation is complete. * Use this approach if L2 cache is not enabled */ CACHE_invL1d (ptr, size, CACHE_WAIT); /* Cleanup the prefectch buffer also. */ CSL_XMC_invalidatePrefetchBuffer(); #else UInt key; /* Disable Interrupts */ key = Hwi_disable(); /* Cleanup the prefetch buffer also. */ CSL_XMC_invalidatePrefetchBuffer(); /* Invalidate the cache. */ CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT); /* Reenable Interrupts. */ Hwi_restore(key); #endif }
/****************************************************************************** * flushCache ******************************************************************************/ static void flushCache (void) { uint32_t key; /* Disable Interrupts */ key = _disable_interrupts(); CSL_XMC_invalidatePrefetchBuffer(); /*------------------------------------------------------------------------- * Also flushes L1P and L1D. *------------------------------------------------------------------------*/ CACHE_wbInvAllL2(CACHE_NOWAIT); _mfence(); asm(" NOP 9"); asm(" NOP 7"); /* Reenable Interrupts. */ _restore_interrupts(key); }