//#include <cyg/io/pci.h>
#include <cyg/hal/hal_io.h> // I/O macros
#include <cyg/infra/diag.h>
#include CYGHWR_MEMORY_LAYOUT_H
#ifdef CYGPKG_REDBOOT
#include <redboot.h>
#endif
#include <cyg/hal/platform.h> /* platform setting */
// The memory map is weakly defined, allowing the application to redefine
// it if necessary. The regions defined below are the minimum requirements.
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
// Mapping for the Spartan3esk development boards
CYGARC_MEMDESC_NOCACHE( 0x00000000, (XPAR_MICROBLAZE_0_DCACHE_BASEADDR - 1) ), /* Uncached */
CYGARC_MEMDESC_CACHE( XPAR_MICROBLAZE_0_DCACHE_BASEADDR, XPAR_MICROBLAZE_0_DCACHE_HIGHADDR ), /* Cached region */
CYGARC_MEMDESC_NOCACHE( XPAR_MICROBLAZE_0_DCACHE_HIGHADDR + 1, 0xFFFFFFFF), /* Uncached */
CYGARC_MEMDESC_TABLE_END
};
//--------------------------------------------------------------------------
// Platform init code.
void _s3esk_assert(char *file, int line)
{
cyg_uint32 old;
HAL_DISABLE_INTERRUPTS(old);
diag_printf("Microblaze firmware failure - file: %s, line: %d\n", file, line);
while (1) ;
// Purpose: HAL aux objects: startup tables.
// Description: Tables for per-platform initialization
//
//####DESCRIPTIONEND####
//
//=============================================================================
#include <pkgconf/hal.h>
#include <cyg/hal/hal_mem.h> // HAL memory definitions
#include <cyg/hal/hal_if.h> // hal_if_init
// The memory map is weakly defined, allowing the application to redefine
// it if necessary. The regions defined below are the minimum requirements.
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
// Mapping for the FADS POWERPC development board
CYGARC_MEMDESC_NOCACHE( 0x02800000, 0x00100000 ), // ROM region
CYGARC_MEMDESC_NOCACHE( 0x02200000, 0x00010000 ), // MCP registers/PRAM/DPRAM 64 kByte
CYGARC_MEMDESC_NOCACHE( 0x02100000, 0x00001000 ), // 4 kByte Board Control
CYGARC_MEMDESC_CACHE( 0x00000000, 0x00400000 ), // main memory
CYGARC_MEMDESC_TABLE_END
};
void
hal_platform_init(void)
{
#ifdef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
hal_if_init();
#endif
}
#include <cyg/hal/hal_mem.h> // HAL memory definitions
#include <cyg/infra/cyg_type.h>
// The memory map is weakly defined, allowing the application to redefine
// it if necessary. The regions defined below are the minimum requirements.
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
// Mapping for the Motorola MPC8260 development board
CYGARC_MEMDESC_CACHE( 0x00000000, 0x01000000 ), // Main memory 60x SDRAM
CYGARC_MEMDESC_NOCACHEGUARD( 0x04000000, 0x00400000 ), // Local Bus SDRAM
// The BCSR are actually only 8 registers, but they repeatedly map
// into the 1 MB space described here.
// The BAT register uses a Block Length of 4MB so that both the BCSRs
// and the IMMR space is Managed thru the MMU. In fact, the ATM UNI
// Proc. Control is also mapped into this block.
// See MPC8260 PowerQUICC II ADS User's Manual, p. 3-35, note 2
CYGARC_MEMDESC_NOCACHE( 0x04500000, 0x00400000 ), // BCSR registers
CYGARC_MEMDESC_NOCACHE( 0xff800000, 0x00800000 ), // ROM region
CYGARC_MEMDESC_TABLE_END
};
static volatile CYG_WORD *BCSR0 = (CYG_WORD *)0x04500000;
static volatile CYG_WORD *BCSR1 = (CYG_WORD *)0x04500004;
static volatile CYG_WORD *BCSR2 = (CYG_WORD *)0x04500008;
// Some macros used for debugging
#define GREEN_LED_ON (*BCSR0 &= 0xFDFFFFFF)
#define RED_LED_OFF (*BCSR0 |= 0x01000000)
#define GREEN_LED_OFF (*BCSR0 |= 0x02000000)
#define RED_LED_ON (*BCSR0 &= 0xFEFFFFFF)
#include <cyg/hal/hal_intr.h> // interrupt definitions
#include <cyg/hal/hal_cache.h>
#include <cyg/infra/cyg_ass.h> // assertion macros
#include <cyg/io/pci.h>
#include <cyg/hal/hal_io.h> // I/O macros
#include CYGHWR_MEMORY_LAYOUT_H
// Functions defined in this module
void _csb281_fs6377_init(int mode);
static void _csb281_i2c_init(void);
// The memory map is weakly defined, allowing the application to redefine
// it if necessary. The regions defined below are the minimum requirements.
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
// Mapping for the Cogent CSB281 development boards
CYGARC_MEMDESC_NOCACHE( 0x70000000, 0x10000000 ), // FLASH region, LCD, PS/2
CYGARC_MEMDESC_NOCACHE( 0xf0000000, 0x10000000 ), // PCI space, LEDS, control
CYGARC_MEMDESC_CACHE( CYGMEM_REGION_ram, CYGMEM_REGION_ram_SIZE ), // Main memory
// Main memory, mapped non-cacheable for PCI use
CYGARC_MEMDESC_NOCACHE_PA(CYGMEM_SECTION_pci_window,
CYGARC_PHYSICAL_ADDRESS(CYGMEM_SECTION_pci_window),
CYGMEM_SECTION_pci_window_SIZE),
CYGARC_MEMDESC_TABLE_END
};
//--------------------------------------------------------------------------
// Platform init code.
void
hal_platform_init(void)
{
#include <cyg/infra/cyg_type.h>
#include <cyg/hal/hal_mem.h> // HAL memory definitions
#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
#include <cyg/hal/ppc_regs.h>
#include <cyg/hal/quicc/ppc8xx.h>
#include <cyg/hal/hal_if.h> // hal_if_init
#include <cyg/hal/hal_io.h>
#include CYGHWR_MEMORY_LAYOUT_H
// The memory map is weakly defined, allowing the application to redefine
// it if necessary. The regions defined below are the minimum requirements.
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
// Mapping for the Adder 85x development boards
CYGARC_MEMDESC_CACHE( 0xfe000000, 0x00800000 ), // ROM region
CYGARC_MEMDESC_NOCACHE( 0xff000000, 0x00100000 ), // MCP registers
CYGARC_MEMDESC_NOCACHE( 0xfa000000, 0x00400000 ), // Control/Status+LEDs
CYGARC_MEMDESC_CACHE( CYGMEM_REGION_ram, CYGMEM_REGION_ram_SIZE ), // Main memory
CYGARC_MEMDESC_TABLE_END
};
void
_adder_set_leds(int pat);
//--------------------------------------------------------------------------
// Platform init code.
void
hal_platform_init(void)
{
volatile EPPC *eppc = (volatile EPPC *)eppc_base();
//
//=============================================================================
#include <pkgconf/hal.h>
#include <cyg/hal/hal_mem.h> // HAL memory definitions
#include <pkgconf/hal_powerpc_quicc.h>
#include <cyg/infra/cyg_type.h>
#include <cyg/hal/quicc/ppc8xx.h>
#include <cyg/hal/hal_if.h> // hal_if_init
// The memory map is weakly defined, allowing the application to redefine
// it if necessary. The regions defined below are the minimum requirements.
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
// Mapping for the Motorola MBX860 development board
CYGARC_MEMDESC_CACHE( 0xfe000000, 0x00400000 ), // ROM region
CYGARC_MEMDESC_NOCACHE( 0xfa000000, 0x00400000 ), // Control/Status+LEDs
CYGARC_MEMDESC_CACHE( 0x00000000, 0x00800000 ), // Main memory
CYGARC_MEMDESC_TABLE_END
};
#ifdef _DOWNLOAD_UCODE_UPDATE // Not currently used
//
// The MPC8xx CPM (Control Processor) has some problems (overlapping structures) which
// can be fixed by downloading new ucode. This code came from:
// http://www.mot.com/SPS/ADC/pps/subpgs/etoolbox/8XX/i2c_spi.html
//
static unsigned char i2c_ucode_low[] = {
0x7F, 0xFF, 0xEF, 0xD9, 0x3F, 0xFD, 0x00, 0x00,
0x7F, 0xFB, 0x49, 0xF7, 0x7F, 0xF9, 0x00, 0x00,