/* Return ADC clock rate */
uint32_t Chip_Clock_GetADCClockRate(void)
{
uint32_t div, clkRate = 0;
div = Chip_Clock_GetADCClockDiv();
/* ADC clock only enabled if div>0 */
if (div > 0) {
switch (Chip_Clock_GetADCClockSource()) {
case SYSCON_ADCCLKSELSRC_MAINCLK:
clkRate = Chip_Clock_GetMainClockRate();
break;
case SYSCON_ADCCLKSELSRC_SYSPLLOUT:
clkRate = Chip_Clock_GetSystemPLLOutClockRate(false);
break;
case SYSCON_ADCCLKSELSRC_FROHF:
clkRate = Chip_Clock_GetFROHFRate();
break;
}
clkRate = clkRate / div;
}
return clkRate;
}
/* Return main B clock rate */
uint32_t Chip_Clock_GetMain_B_ClockRate(void)
{
uint32_t clkRate = 0;
switch (Chip_Clock_GetMain_B_ClockSource()) {
case SYSCON_MAIN_B_CLKSRC_MAINCLKSELA:
clkRate = Chip_Clock_GetMain_A_ClockRate();
break;
case SYSCON_MAIN_B_CLKSRC_PLL:
clkRate = Chip_Clock_GetSystemPLLOutClockRate(false);
break;
case SYSCON_MAIN_B_CLKSRC_RTC:
clkRate = Chip_Clock_GetRTCOscRate();
break;
}
return clkRate;
}
/**
* @brief Main program body
* @return Does not return
*/
int main(void)
{
/* Generic Initialization */
SystemCoreClockUpdate();
/* Board_Init calls Chip_GPIO_Init and enables GPIO clock if needed,
Chip_GPIO_Init is not called again */
Board_Init();
Board_LED_Set(0, false);
Chip_PININT_Init(LPC_PININT);
/* Configure GPIO pin as input */
Chip_GPIO_SetPinDIRInput(LPC_GPIO, GPIO_PININT_PORT, GPIO_PININT_PIN);
/* Configure pin as GPIO */
Chip_IOCON_PinMuxSet(LPC_IOCON, GPIO_PININT_PORT, GPIO_PININT_PIN,
(IOCON_FUNC0 | IOCON_DIGITAL_EN | IOCON_GPIO_MODE));
/* Configure pin interrupt selection for the GPIO pin in Input Mux Block */
Chip_INMUX_PinIntSel(GPIO_PININT_INDEX, GPIO_PININT_PORT, GPIO_PININT_PIN);
/* Configure channel interrupt as edge sensitive and falling edge interrupt */
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
/* Enable interrupt in the NVIC */
NVIC_EnableIRQ(PININT_NVIC_NAME);
/* Enable wakeup for PININT0 */
Chip_SYSCON_EnableWakeup(SYSCON_STARTER_PINT0);
/* save the clock source, power down the PLL */
saved_clksrc = Chip_Clock_GetMainClockSource();
/* Go to sleep mode - LED will toggle on each wakeup event */
while (1) {
/* Go to sleep state - will wake up automatically on interrupt */
/* Disable PLL, if previously enabled, prior to sleep */
if (saved_clksrc == SYSCON_MAINCLKSRC_PLLOUT) {
Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_IRC);
Chip_SYSCON_PowerDown(SYSCON_PDRUNCFG_PD_SYS_PLL);
}
/* Lower system voltages to current lock (likely IRC) */
Chip_POWER_SetVoltage(POWER_LOW_POWER_MODE, Chip_Clock_GetMainClockRate());
/* Go to sleep leaving SRAM powered during sleep. Use lower
voltage during sleep. */
Chip_POWER_EnterPowerMode(PDOWNMODE,
(SYSCON_PDRUNCFG_PD_SRAM0A | SYSCON_PDRUNCFG_PD_SRAM0B));
/* On wakeup, restore PLL power if needed */
if (saved_clksrc == SYSCON_MAINCLKSRC_PLLOUT) {
Chip_SYSCON_PowerUp(SYSCON_PDRUNCFG_PD_SYS_PLL);
/* Wait for PLL lock */
while (!Chip_Clock_IsSystemPLLLocked()) {}
Chip_POWER_SetVoltage(POWER_LOW_POWER_MODE, Chip_Clock_GetSystemPLLOutClockRate(false));
/* Use PLL for system clock */
Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_PLLOUT);
}
}
return 0;
}
