void test_run(void)
{ int i;
for(i=0;i<BUFFER_SIZE;i++)
{
fVal= (float)(BUFFER_SIZE - i)/(float)BUFFER_SIZE;
Cla1ForceTask1andWait();
y[i] = fResult;
}
#if 0
Cla1ForceTask2andWait();
Cla1ForceTask3andWait();
Cla1ForceTask4andWait();
Cla1ForceTask5andWait();
Cla1ForceTask6andWait();
Cla1ForceTask7andWait();
Cla1ForceTask8andWait();
#endif
}
void test_run(void)
{
unsigned int i;
for(i=0;i<BUFFER_SIZE;i++){
x[0][0] = (float)i+1;
x[0][1] = (float)i+2;
x[0][2] = (float)i+3;
x[1][0] = (float)i-1;
x[1][1] = (float)i-2;
x[1][2] = (float)i-3;
x[2][0] = (float)i-7;
x[2][1] = (float)i+3;
x[2][2] = (float)i-9;
Cla1ForceTask1andWait();
z[i] = fDet;
}
#if 0
Cla1ForceTask2andWait();
Cla1ForceTask3andWait();
Cla1ForceTask4andWait();
Cla1ForceTask5andWait();
Cla1ForceTask6andWait();
Cla1ForceTask7andWait();
Cla1ForceTask8andWait();
#endif
}
//
// CLA_runTest - Execute CLA task tests for specified vectors
//
void CLA_runTest(void)
{
int16_t i, error;
//
// Initialize the CPUToCLA1MsgRam variables here
//
PIBYTWO = 1.570796327;
for(i=0; i < BUFFER_SIZE; i++)
{
fVal = (float)((BUFFER_SIZE/2) - i);
Cla1ForceTask1andWait();
y[i] = fResult;
error = fabs(atan_expected[i]-y[i]);
if(error < 0.01)
{
pass++;
}
else
{
fail++;
}
}
#if 0
Cla1ForceTask2andWait();
WAITSTEP;
Cla1ForceTask3andWait();
WAITSTEP;
Cla1ForceTask4andWait();
WAITSTEP;
Cla1ForceTask5andWait();
WAITSTEP;
Cla1ForceTask6andWait();
WAITSTEP;
Cla1ForceTask7andWait();
WAITSTEP;
Cla1ForceTask8andWait();
WAITSTEP;
#endif
}
void test_run(void)
{
Cla1ForceTask1andWait();
Cla1ForceTask2andWait();
Cla1ForceTask3andWait();
#if 0
Cla1ForceTask4andWait();
Cla1ForceTask5andWait();
Cla1ForceTask6andWait();
Cla1ForceTask7andWait();
Cla1ForceTask8andWait();
#endif
}
//
// CLA_runTest - Execute CLA task tests for specified vectors
//
void CLA_runTest(void)
{
//
// x[][] = {{10,3,4}, {3,1,2}, {4,2,6}};
//
x[0][0] = 10;
x[0][1] = 3;
x[0][2] = 4;
x[1][0] = 3;
x[1][1] = 1;
x[1][2] = 2;
x[2][0] = 4;
x[2][1] = 2;
x[2][2] = 6;
//
// y[][] = {{1,2,1}, {2,1,2}, {1,2,6}};
//
y[0][0] = 1;
y[0][1] = 2;
y[0][2] = 1;
y[1][0] = 2;
y[1][1] = 1;
y[1][2] = 2;
y[2][0] = 1;
y[2][1] = 2;
y[2][2] = 6;
Cla1ForceTask1andWait();
unsigned int i,j;
int32_t fError[M][N];
for(i=0; i < M; i++)
{
for(j=0; j < N; j++)
{
fError[i][j] = fabs(z_expected[i][j]-z[i][j]);
if(fError[i][j] == 0)
{
pass++;
}
else
{
fail++;
}
}
}
#if 0
Cla1ForceTask2andWait();
WAITSTEP;
Cla1ForceTask3andWait();
WAITSTEP;
Cla1ForceTask4andWait();
WAITSTEP;
Cla1ForceTask5andWait();
WAITSTEP;
Cla1ForceTask6andWait();
WAITSTEP;
Cla1ForceTask7andWait();
WAITSTEP;
#endif
}
//
// CLA_runTest - Performs vector test sequence
//
void CLA_runTest(void)
{
//
// vector1[5] = {1.0,4.0,8.0,.5,.25};
//
vector1[0] = 1.0;
vector1[1] = 4.0;
vector1[2] = 8.0;
vector1[3] = .5;
vector1[4] = .25;
//
// vector2[10] = {-.25,-.5,-.125,-2.0,-4.0,-8.0,8.0,4.0,.25,.125};
//
vector2[0] = -.25;
vector2[1] = -.5;
vector2[2] = -.125;
vector2[3] = -2.0;
vector2[4] = -4.0;
vector2[5] = -8.0;
vector2[6] = 8.0;
vector2[7] = 4.0;
vector2[8] = .25;
vector2[9] = .125;
Cla1ForceTask1andWait();
Cla1ForceTask2andWait();
Uint16 i;
float vector1_gold[] = {1/1.0, 1/4.0, 1/8.0, 1/.5, 1/.25};
float vector2_gold[] = {-1/.25,-1/.5,-1/.125,-1/2.0,-1/4.0,-1/8.0,
1/8.0,1/4.0,1/.25,1/.125};
for(i=0; i < LENGTH1; i++)
{
if(vector1_inverse[i] != vector1_gold[i])
{
fail++;
}
else
{
pass++;
}
}
//
// Map the data memory back to the CPU so we can check the
// results of task 2
//
EALLOW;
MemCfgRegs.LSxMSEL.bit.MSEL_LS0 = 0;
MemCfgRegs.LSxMSEL.bit.MSEL_LS1 = 0;
EDIS;
__asm(" NOP");
__asm(" NOP");
__asm(" NOP");
__asm(" NOP");
for(i=0; i < LENGTH2; i++)
{
if(vector2[i] != vector2_gold[i])
{
fail++;
}
else
{
pass++;
}
}
#if 0
Cla1ForceTask3andWait();
WAITSTEP;
Cla1ForceTask4andWait();
WAITSTEP;
Cla1ForceTask5andWait();
WAITSTEP;
Cla1ForceTask6andWait();
WAITSTEP;
Cla1ForceTask7andWait();
WAITSTEP;
#endif
}
void main(void)
{
// union F32_I32 temp;
DisableDog(); // Disable the watchdog
//-------------------------------------------------------------
// CLA module initialization
// 1) Enable the CLA clock
// 2) Init the CLA interrupt vectors
// 3) Allow the IACK instruction to flag a CLA interrupt/start a task
// 4) Assign CLA program memory to the CLA
// 5) Enable CLA interrupts (MIER)
//
// Note: As provided, the linker .cmd file links the CLA assembly
// code directly to the CLA program memory.
// This way the debugger will load the CLA assembly code
// into the program memory. (No need to copy the CLA code
// during debug).
//
//-------------------------------------------------------------
EALLOW;
SysCtrlRegs.PCLKCR3.bit.CLA1ENCLK = 1;
Cla1Regs.MVECT1 = (Uint16) (&Cla1Task1 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT2 = (Uint16) (&Cla1Task2 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT3 = (Uint16) (&Cla1Task3 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT4 = (Uint16) (&Cla1Task4 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT5 = (Uint16) (&Cla1Task5 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT6 = (Uint16) (&Cla1Task6 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT7 = (Uint16) (&Cla1Task7 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT8 = (Uint16) (&Cla1Task8 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MCTL.bit.IACKE = 1;
Cla1Regs.MMEMCFG.bit.PROGE = 1;
Cla1Regs.MMEMCFG.bit.RAM1E = 1;
asm(" RPT #3 || NOP");
Cla1Regs.MIER.bit.INT1 = 1;
Cla1Regs.MIER.bit.INT2 = 1;
Cla1Regs.MIER.bit.INT3 = 1;
Cla1Regs.MIER.bit.INT4 = 1;
Cla1Regs.MIER.bit.INT5 = 1;
Cla1Regs.MIER.bit.INT6 = 1;
Cla1Regs.MIER.bit.INT7 = 1;
Cla1Regs.MIER.bit.INT8 = 1;
EDIS;
//-------------------------------------------------------------
// All tests performed with rounding off (RNDF32=0)
//-------------------------------------------------------------
//-------------------------------------------------------------
// Test 1:
//-------------------------------------------------------------
CpuToCla1Msg.Num1 = 1.0;
CpuToCla1Msg.Base1 = 2.0;
// Force Task 2 by the IACK instruction
// Wait for the task to complete
// This macro is defined in the Cla_Defines.h file
Cla1ForceTask2andWait()
y_x1=Cla1ToCpuMsg.y1.f32;
//-------------------------------------------------------------
// Test 2:
//-------------------------------------------------------------
CpuToCla1Msg.Num1 = 10;
CpuToCla1Msg.Base1 = 10.0;
// Force Task 2 by the IACK instruction
// Wait for the task to complete
// This macro is defined in the Cla_Defines.h file
Cla1ForceTask2andWait()
y_x2=Cla1ToCpuMsg.y1.f32;
//-------------------------------------------------------------
// Test 3:
//-------------------------------------------------------------
CpuToCla1Msg.Num1 = 4.6;
CpuToCla1Msg.Base1 = 2.3;
// Force Task 2 by the IACK instruction
// Wait for the task to complete
// This macro is defined in the Cla_Defines.h file
Cla1ForceTask2andWait()
y_x3=Cla1ToCpuMsg.y1.f32;
//-------------------------------------------------------------
// Test 4:
//-------------------------------------------------------------
CpuToCla1Msg.Num1 = 256;
CpuToCla1Msg.Base1 = 2;
// Force Task 2 by the IACK instruction
// Wait for the task to complete
// This macro is defined in the Cla_Defines.h file
Cla1ForceTask2andWait()
y_x4=Cla1ToCpuMsg.y1.f32;
//-------------------------------------------------------------
// Test 5:
//-------------------------------------------------------------
CpuToCla1Msg.Num1 = 50.923;
CpuToCla1Msg.Base1 = 10.0;
// Force Task 2 by the IACK instruction
// Wait for the task to complete
// This macro is defined in the Cla_Defines.h file
Cla1ForceTask2andWait()
y_x5=Cla1ToCpuMsg.y1.f32;
//-------------------------------------------------------------
// start of test
//-------------------------------------------------------------
chk1=0- y_x1;
chk2=1 - y_x2;
chk3=1.83220025 - y_x3;
chk4=8 - y_x4;
chk5=1.70691398 - (y_x5 );
if(chk1>=-10e-6 & chk1<=10e-6)
PASS_COUNT++; // If all tests pass, this should equal golden value
else
FAIL_COUNT++;
if(chk2>=-10e-6 & chk2<=10e-6)
PASS_COUNT++; // If all tests pass, this should equal golden value
else
FAIL_COUNT++;
if(chk3>=-10e-6 & chk3<=10e-6)
PASS_COUNT++; // If all tests pass, this should equal golden value
else
FAIL_COUNT++;
if(chk4>=-10e-6 & chk4<=10e-6)
PASS_COUNT++; // If all tests pass, this should equal golden value
else
FAIL_COUNT++;
if(chk5>=-10e-6 & chk5<=10e-6)
PASS_COUNT++; // If all tests pass, this should equal golden value
else
FAIL_COUNT++;
if(PASS_COUNT == GOLDEN_PASS_COUNT && FAIL_COUNT == 0)
{
// If test stopped here, it passed
ESTOP0;
}
else
{
// If test stopped here, it failed
ESTOP0;
}
}
//
// Main
//
void main(void)
{
Uint16 word;
Uint16 errors;
//
// Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
//
InitSysCtrl();
//
// Initialize EMIF module for use with daughtercard
//
EMIF_DC_setupPinmux(EMIF_NUM, GPIO_MUX_CPU1);
EMIF_DC_initModule(EMIF_NUM);
EMIF_DC_initCS0(EMIF_NUM);
EMIF_DC_initCS2(EMIF_NUM, EMIF_DC_ASRAM);
//
// Initialize CLA module for transfer
//
CLA_configClaMemory();
CLA_initCpu1Cla1();
ClaSrcAddr = (Uint16)srcBuffer;
ClaDstAddr = (Uint16)dstBuffer;
Cla16bWords = BUFFER_WORDS;
//
// Initialize data buffers
//
for(word=0; word<BUFFER_WORDS; word++)
{
srcBuffer[word] = word;
dstBuffer[word] = 0;
}
//
// Verify that data buffers have correct starting values
// If buffers are not initialized correctly, check the following:
// EMIF_NUM (emif_dc_cla.c)
// EMIF_DC_F2837X_LAUNCHPAD_V1 (emif_dc.h)
// _LAUNCHXL_F28377S or _LAUNCHXL_F28379S (Predefined Symbols)
//
errors = 0;
for(word=0; word<BUFFER_WORDS; word++)
{
if(srcBuffer[word] != word)
{
errors++;
ESTOP0;
break;
}
if(dstBuffer[word] != 0)
{
errors++;
ESTOP0;
break;
}
}
//
// Execute and wait for block data transfer by forcing CLA trigger
//
Cla1ForceTask2andWait();
//
// Verify that block data has been transferred
//
for(word=0; word<BUFFER_WORDS; word++)
{
if(srcBuffer[word] != word)
{
errors++;
ESTOP0;
break;
}
if(dstBuffer[word] != word)
{
errors++;
ESTOP0;
break;
}
}
if(errors == 0)
{
ESTOP0; // PASS
}
else
{
ESTOP0; // FAIL
}
}
//! Main Function
void main(void)
{
//! Step 1: Setup the system clock
InitSysCtrl();
//! Step 2: Initialize PIE control
/*! Intialize PIE control, disable all interrupts and
* then copy over the PIE Vector table from BootROM to RAM
*/
DINT;
InitPieCtrl();
IER = 0x00000000;
IFR = 0x00000000;
InitPieVectTable();
/*! Assign user defined ISR to the PIE vector table */
EALLOW;
PieVectTable.CLA1_INT1 = &cla_task1_isr;
PieVectTable.CLA1_INT2 = &cla_task2_isr;
PieVectTable.CLA1_INT3 = &cla_task3_isr;
PieVectTable.CLA1_INT4 = &cla_task4_isr;
PieVectTable.CLA1_INT5 = &cla_task5_isr;
PieVectTable.CLA1_INT6 = &cla_task6_isr;
PieVectTable.CLA1_INT7 = &cla_task7_isr;
PieVectTable.CLA1_INT8 = &cla_task8_isr;
PieVectTable.ILLEGAL = &NEW_ILLEGAL_ISR;
EDIS;
/*! Compute all CLA task vectors */
EALLOW;
Cla1Regs.MVECT1 = (Uint16) (&Cla1Task1 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT2 = (Uint16) (&Cla1Task2 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT3 = (Uint16) (&Cla1Task3 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT4 = (Uint16) (&Cla1Task4 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT5 = (Uint16) (&Cla1Task5 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT6 = (Uint16) (&Cla1Task6 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT7 = (Uint16) (&Cla1Task7 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT8 = (Uint16) (&Cla1Task8 - &Cla1Prog_Start)*sizeof(Uint32);
EDIS;
//! Step 3 : Mapping CLA tasks
/*! All tasks are enabled and will be started by an ePWM trigger
* Map CLA program memory to the CLA and enable software breakpoints
*/
EALLOW;
Cla1Regs.MPISRCSEL1.bit.PERINT1SEL = CLA_INT1_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT2SEL = CLA_INT2_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT3SEL = CLA_INT3_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT4SEL = CLA_INT4_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT5SEL = CLA_INT5_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT6SEL = CLA_INT6_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT7SEL = CLA_INT7_NONE;
Cla1Regs.MPISRCSEL1.bit.PERINT8SEL = CLA_INT8_NONE;
Cla1Regs.MIER.all = 0x00FF;
EDIS;
/*! Enable CLA interrupts at the group and subgroup levels */
PieCtrlRegs.PIEIER11.all = 0xFFFF;
IER = (M_INT11);
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
/*!Switch the CLA program space to the CLA and enable software forcing
* Also switch over CLA data ram 0 and 1
*/
EALLOW;
Cla1Regs.MMEMCFG.bit.PROGE = 1;
Cla1Regs.MMEMCFG.bit.RAM1E = 1;
Cla1Regs.MCTL.bit.IACKE = 1;
EDIS;
/*-----------------------------------------------------------------------------
* CLA Task 1: Does additions and subtractions
* --------------------------------------------------------------------------*/
vInitDataForTask1();
Cla1ForceTask1andWait();
WAITSTEP;
(sCLAtoCPUMsg.y1.i32 == 0x40EED289)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y2.i32 == 0xC0E64DD2)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y3.i32 == 0xC000FDF3)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y4.i32 == 0xC12444D0)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y5.i32 == 0xC09FD07C)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y6.i32 == 0x413738EE)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y7.i32 == 0xC1072A99)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y8.i32 == 0xC07F0068)? PASS_COUNT++ : FAIL_COUNT++;
/*-----------------------------------------------------------------------------
* CLA Task 2: Multiplication and inverse
* --------------------------------------------------------------------------*/
vInitDataForTask2();
Cla1ForceTask2andWait();
WAITSTEP;
(sCLAtoCPUMsg.y1.i32 == 0x40F60EFF)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y2.i32 == 0xC19EACED)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y3.i32 == 0xC1869C0B)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y4.i32 == 0x41B31040)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y5.i32 == 0x3F4F5F13)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y6.i32 == 0x3E246678)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y7.i32 == 0x3EF0B127)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y8.i32 == 0xBDDBA4BD)? PASS_COUNT++ : FAIL_COUNT++;
/*-----------------------------------------------------------------------------
* CLA Task 3: Saturate upto either minimum or maximum values
* --------------------------------------------------------------------------*/
vInitDataForTask3();
Cla1ForceTask3andWait();
WAITSTEP;
(sCLAtoCPUMsg.y1.i32 == 0x3F9E0419)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y2.i32 == 0xC1152FEC)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y3.i32 == 0xC0A76A16)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y4.i32 == 0xC0E404EA)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y5.i32 == 0x40C75183)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y6.i32 == 0x4008240B)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y7.i32 == 0x404DD639)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y8.i32 == 0xC049096C)? PASS_COUNT++ : FAIL_COUNT++;
/*-----------------------------------------------------------------------------
* CLA Task 4: Saturate beyond a lower or upper bound
* --------------------------------------------------------------------------*/
vInitDataForTask4();
Cla1ForceTask4andWait();
WAITSTEP;
(sCLAtoCPUMsg.y1.i32 == 0x3F9E0419)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y2.i32 == 0x00000000)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y3.i32 == 0x40082C3D)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y4.i32 == 0xC1220275)? PASS_COUNT++ : FAIL_COUNT++;
/*-----------------------------------------------------------------------------
* CLA Task 5: Offset subtraction with zero saturation and absolute values
* --------------------------------------------------------------------------*/
vInitDataForTask5();
Cla1ForceTask5andWait();
WAITSTEP;
(sCLAtoCPUMsg.y1.i32 == 0x3F9E075F)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y2.i32 == 0x3DFC84B6)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y3.i32 == 0x4047F62B)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y4.i32 == 0x3CA30553)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y5.i32 == 0x3F8E3F13)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y6.i32 == 0x00000000)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y7.i32 == 0x00000000)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y8.i32 == 0x40900000)? PASS_COUNT++ : FAIL_COUNT++;
/*-----------------------------------------------------------------------------
* CLA Task 6: IQ24 to float with some arithmetic and then back to IQ24
* --------------------------------------------------------------------------*/
vInitDataForTask6();
Cla1ForceTask6andWait();
WAITSTEP;
(sCLAtoCPUMsg.y1.i32 == 0x015B9F54)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y2.i32 == 0xFCDB0F2C)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y3.i32 == 0x0A5821B0)? PASS_COUNT++ : FAIL_COUNT++;
(sCLAtoCPUMsg.y4.i32 == 0x00000000)? PASS_COUNT++ : FAIL_COUNT++;
/*-----------------------------------------------------------------------------
* CLA Task 7: Conditional execution. Setting the GOTOLABELx macros in the
* CLAShared.h file will cause the execution in this task to go
* to label x.
* NOTE: If setting GOTOLABELx to 1 set the other macros (GOTOLABELy)
* to 0
* --------------------------------------------------------------------------*/
vInitDataForTask7();
Cla1ForceTask7andWait();
WAITSTEP;
#if GOTOLABEL7
(sCLAtoCPUMsg.y1.f32 == 7.0)? PASS_COUNT++ : FAIL_COUNT++;
#endif
#if GOTOLABEL8
(sCLAtoCPUMsg.y1.f32 == 6.0)? PASS_COUNT++ : FAIL_COUNT++;
#endif
#if GOTOLABEL9
(sCLAtoCPUMsg.y1.f32 == 5.0)? PASS_COUNT++ : FAIL_COUNT++;
#endif
#if GOTOLABEL10
(sCLAtoCPUMsg.y1.f32 == 4.0)? PASS_COUNT++ : FAIL_COUNT++;
#endif
#if GOTOLABEL11
(sCLAtoCPUMsg.y1.f32 == 3.0)? PASS_COUNT++ : FAIL_COUNT++;
#endif
#if GOTOLABEL12
(sCLAtoCPUMsg.y1.f32 == 2.0)? PASS_COUNT++ : FAIL_COUNT++;
#endif
#if GOTOLABEL13
(sCLAtoCPUMsg.y1.f32 == 1.0)? PASS_COUNT++ : FAIL_COUNT++;
#endif
#if GOTOLABEL14
(sCLAtoCPUMsg.y1.f32 == 0.0)? PASS_COUNT++ : FAIL_COUNT++;
#endif
/*-----------------------------------------------------------------------------
* CLA Task 8:
* --------------------------------------------------------------------------*/
vInitDataForTask8();
Cla1ForceTask8andWait();
WAITSTEP;
asm(" ESTOP0");
}
void main(void)
{
DisableDog(); // Disable the watchdog
//-------------------------------------------------------------
// CLA module initialization
// 1) Enable the CLA clock
// 2) Init the CLA interrupt vectors
// 3) Allow the IACK instruction to flag a CLA interrupt/start a task
// 4) Assign CLA program and data memory to the CLA
// 5) Enable CLA interrupts (MIER)
//
// Note: As provided, the linker .cmd file links the CLA assembly
// code directly to the CLA program memory. Likewise the
// CLA data is copied directly to CLA data memory.
// This way the debugger will load the CLA assembly code
// into the program memory. (No need to copy the CLA code
// or data during debug).
//
//-------------------------------------------------------------
EALLOW;
SysCtrlRegs.PCLKCR3.bit.CLA1ENCLK = 1;
Cla1Regs.MVECT1 = (Uint16) (&Cla1Task1 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT2 = (Uint16) (&Cla1Task2 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT3 = (Uint16) (&Cla1Task3 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT4 = (Uint16) (&Cla1Task4 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT5 = (Uint16) (&Cla1Task5 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT6 = (Uint16) (&Cla1Task6 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT7 = (Uint16) (&Cla1Task7 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MVECT8 = (Uint16) (&Cla1Task8 - &Cla1Prog_Start)*sizeof(Uint32);
Cla1Regs.MCTL.bit.IACKE = 1;
Cla1Regs.MMEMCFG.bit.PROGE = 1;
Cla1Regs.MMEMCFG.bit.RAM1E = 1;
asm(" RPT #3 || NOP");
Cla1Regs.MIER.bit.INT1 = 1;
Cla1Regs.MIER.bit.INT2 = 1;
Cla1Regs.MIER.bit.INT3 = 1;
Cla1Regs.MIER.bit.INT4 = 1;
Cla1Regs.MIER.bit.INT5 = 1;
Cla1Regs.MIER.bit.INT6 = 1;
Cla1Regs.MIER.bit.INT7 = 1;
Cla1Regs.MIER.bit.INT8 = 1;
EDIS;
//-------------------------------------------------------------
// Task 2: Clear all output variables
//
// Force Task 2 by the IACK instruction
// Wait for the task to complete
// This macro is defined in the Cla_Defines.h file
//-------------------------------------------------------------
Cla1ForceTask2andWait();
//-------------------------------------------------------------
// Initialize the input data
//-------------------------------------------------------------
CpuToCla1Msg.rad0 = -6.28318530718; // -2*pi = 1.0
CpuToCla1Msg.rad1 = -5.497787143783; // -7*pi/4 = 0.707106781187
CpuToCla1Msg.rad2 = -4.712388980385; // -6*pi/4 = 0.0
CpuToCla1Msg.rad3 = -3.926990816988; // -5*pi/4 = -0.707106781187
CpuToCla1Msg.rad4 = -3.14159265359; // -pi = -1.0
CpuToCla1Msg.rad5 = -2.356194490193; // -3*pi/4 = -0.707106781187
CpuToCla1Msg.rad6 = -1.570796326795; // -2*pi/4 = 0.0
CpuToCla1Msg.rad7 = -0.7853981633975; // -pi/4 = 0.707106781187
CpuToCla1Msg.rad8 = 0.0; // = 1.0
CpuToCla1Msg.rad9 = 0.7853981633975; // pi/4 = 0.707106781187
CpuToCla1Msg.rad10 = 1.570796326795; // 2*pi/4 = 0.0
CpuToCla1Msg.rad11 = 2.356194490193; // 3*pi/4 = -0.707106781187
CpuToCla1Msg.rad12 = 3.14159265359; // pi = -1.0
CpuToCla1Msg.rad13 = 3.926990816988; // 5*pi/4 = -0.707106781187
CpuToCla1Msg.rad14 = 4.712388980385; // 6*pi/4 = 0.0
CpuToCla1Msg.rad15 = 5.497787143783; // 7*pi/4 = 0.707106781187
CpuToCla1Msg.rad16 = 6.28318530718; // 2*pi = 1.0
CpuToCla1Msg.rad17 = 5.890486225482; // sin(.) = 0.9238795325118
CpuToCla1Msg.rad18 = -0.04; // sin(.) = 0.999200106661
CpuToCla1Msg.rad19 = -0.01; // sin(.) = 0.9999500004167
//-------------------------------------------------------------
// Force Task 1 by the IACK instruction
// Wait for the task to complete
// This macro is defined in the Cla_Defines.h file
//
// Note: Task 1 is setup to run the macro on rad0 - rad19
// The results will be stored in in y0-y19
//
//-------------------------------------------------------------
Cla1ForceTask1andWait();
//-------------------------------------------------------------
// When the task completes, check the results
//-------------------------------------------------------------
if(Cla1ToCpuMsg.y0.i32 == 0x3F800000)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y1.i32 == 0x3F3504EF)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y2.i32 == 0x00000000)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y3.i32 == 0xBF3504F8)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y4.i32 == 0xBF800000)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y5.i32 == 0xBF3504F3)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y6.i32 == 0x00000000)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y7.i32 == 0x3F3504F3)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y8.i32 == 0x3F800000)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y9.i32 == 0x3F3504F3)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y10.i32 == 0x00000000)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y11.i32 == 0xBF3504F3)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y12.i32 == 0xBF800000)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y13.i32 == 0xBF3504F8)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y14.i32 == 0x00000000)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y15.i32 == 0x3F3504EF)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y16.i32 == 0x3F800000)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y17.i32 == 0x3F6C835C)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y18.i32 == 0x3F7FCB94)
PASS_COUNT++;
else
FAIL_COUNT++;
if(Cla1ToCpuMsg.y19.i32 == 0x3F7FFCB9)
PASS_COUNT++;
else
FAIL_COUNT++;
//-------------------------------------------------------------
// End of test
//-------------------------------------------------------------
if(PASS_COUNT == GOLDEN_PASS_COUNT && FAIL_COUNT == 0)
{
// If test stopped here, it passed
ESTOP0;
}
else
{
// If test stopped here, it failed
ESTOP0;
}
}
//
// CLA_runTest - Run task tests with specified vectors
//
void CLA_runTest(void)
{
//
// vector1[5] = {1.0,-11.3,6.2,10.8,2.5};
//
vector1[0] = 1.0;
vector1[1] = -11.3;
vector1[2] = 6.2;
vector1[3] = 10.8;
vector1[4] = 2.5;
//
// vector2[10] = {-10.1,-9.9,-8.8,1.0,2.2,3.3,0.0,4.4,8.8,9.9}
//
vector2[0] = -10.1;
vector2[1] = -9.9;
vector2[2] = -8.8;
vector2[3] = 1.0;
vector2[4] = 2.2;
vector2[5] = 3.3;
vector2[6] = 0.0;
vector2[7] = 4.4;
vector2[8] = 8.8;
vector2[9] = 9.9;
Cla1ForceTask1andWait();
Cla1ForceTask2andWait();
Cla1ForceTask3andWait();
Uint16 i;
float vector1_gold[] = {-11.3, 1.0, 2.5, 6.2, 10.8};
float vector2_gold[] = {9.9, 8.8, 4.4, 3.3, 2.2, 1.0, 0.0,-8.8,-9.9,-10.1};
int32 vector3_gold[] = {9,8,4,3,2,1,0,-8,-9};
for(i=0; i < LENGTH1; i++)
{
if(vector1_sorted[i] != vector1_gold[i])
{
fail++;
}
else
{
pass++;
}
}
for(i=0; i < LENGTH2; i++)
{
if(vector2_sorted[i] != vector2_gold[i])
{
fail++;
}
else
{
pass++;
}
}
//
// Map the data memory back to the CPU so we can check the
// results of task 3
//
EALLOW;
MemCfgRegs.LSxMSEL.bit.MSEL_LS0 = 0;
MemCfgRegs.LSxMSEL.bit.MSEL_LS1 = 0;
EDIS;
__asm(" NOP");
__asm(" NOP");
__asm(" NOP");
__asm(" NOP");
for(i=0; i < LENGTH3; i++)
{
if(vector3[i] != vector3_gold[i])
{
fail++;
}
else
{
pass++;
}
}
#if 0
Cla1ForceTask4andWait();
Cla1ForceTask5andWait();
Cla1ForceTask6andWait();
Cla1ForceTask7andWait();
Cla1ForceTask8andWait();
#endif
}