void DataKeeper::Save(Module* currmod)
{
this->mod = currmod;
const ExtensionManager::ExtMap& allexts = ServerInstance->Extensions.GetExts();
for (ExtensionManager::ExtMap::const_iterator i = allexts.begin(); i != allexts.end(); ++i)
{
ExtensionItem* ext = i->second;
if (ext->creator == mod)
handledexts.push_back(ProviderInfo(ext));
}
CreateModeList(MODETYPE_USER);
DoSaveUsers();
CreateModeList(MODETYPE_CHANNEL);
DoSaveChans();
FOREACH_MOD_CUSTOM(*reloadevprov, ReloadModule::EventListener, OnReloadModuleSave, (mod, this->moddata));
ServerInstance->Logs->Log(MODNAME, LOG_DEBUG, "Saved data about %lu users %lu chans %lu modules", (unsigned long)userdatalist.size(), (unsigned long)chandatalist.size(), (unsigned long)moddata.list.size());
}
void ModeParser::RecreateModeListFor004Numeric()
{
Cached004ModeList = CreateModeList(MODETYPE_USER) + " " + CreateModeList(MODETYPE_CHANNEL) + " " + CreateModeList(MODETYPE_CHANNEL, true);
}
status_t
Rage128_Init(void)
{
TRACE("Rage128_Init()\n");
SharedInfo& si = *gInfo.sharedInfo;
si.videoMemSize = INREG(R128_CONFIG_MEMSIZE);
si.cursorOffset = (si.videoMemSize - CURSOR_BYTES) & ~0xfff; // align to 4k boundary
si.frameBufferOffset = 0;
si.maxFrameBufferSize = si.cursorOffset - si.frameBufferOffset;
TRACE("Video Memory size: %d MB frameBufferOffset: 0x%x cursorOffset: 0x%x\n",
si.videoMemSize / 1024 / 1024, si.frameBufferOffset, si.cursorOffset);
// Get the specifications of the memory used by the chip.
uint32 offset;
switch (INREG(R128_MEM_CNTL) & 0x3) {
case 0: // SDR SGRAM 1:1
switch (si.deviceID) {
case 0x4C45: // RAGE128 LE:
case 0x4C46: // RAGE128 LF:
case 0x4D46: // RAGE128 MF:
case 0x4D4C: // RAGE128 ML:
case 0x5245: // RAGE128 RE:
case 0x5246: // RAGE128 RF:
case 0x5247: // RAGE128 RG:
case 0x5446: // RAGE128 TF:
case 0x544C: // RAGE128 TL:
case 0x5452: // RAGE128 TR:
offset = 0; // 128-bit SDR SGRAM 1:1
break;
default:
offset = 1; // 64-bit SDR SGRAM 1:1
break;
}
break;
case 1:
offset = 2; // 64-bit SDR SGRAM 2:1
break;
case 2:
offset = 3; // 64-bit DDR SGRAM
break;
default:
offset = 1; // 64-bit SDR SGRAM 1:1
break;
}
si.r128MemSpec = sRAMSpecs[offset];
TRACE("RAM type: %s\n", si.r128MemSpec.name);
// Determine the type of display.
si.displayType = MT_VGA;
if (INREG(R128_FP_PANEL_CNTL) & R128_FP_DIGON) // don't know if this is correct
si.displayType = MT_DVI;
if (si.chipType == RAGE128_MOBILITY && si.panelX > 0 && si.panelY > 0) {
if (INREG(R128_LVDS_GEN_CNTL) & R128_LVDS_ON)
si.displayType = MT_LAPTOP; // laptop LCD display is on
}
// Set up the array of color spaces supported by the Rage128 chips.
si.colorSpaces[0] = B_CMAP8;
si.colorSpaces[1] = B_RGB15;
si.colorSpaces[2] = B_RGB16;
si.colorSpaces[3] = B_RGB32;
si.colorSpaceCount = 4;
// Setup the mode list.
return CreateModeList(IsModeUsable);
}
