void mailbox_init(void)
{
// Interrupts configuration for CM0+
// * See ce216795_common.h for occupied interrupts
// -----------------------------------------------
// Configure interrupts ISR / MUX and priority
cy_stc_sysint_t ipc_intr_Config;
ipc_intr_Config.intrSrc = CY_M0_CORE_IRQ_CHANNEL_PSA_MAILBOX;
ipc_intr_Config.cm0pSrc = (cy_en_intr_t)cpuss_interrupts_ipc_0_IRQn + SPM_IPC_NOTIFY_CM0P_INTR; // Must match the interrupt we trigger using NOTIFY on CM4
ipc_intr_Config.intrPriority = 1;
if (cy_m0_nvic_reserve_channel(CY_M0_CORE_IRQ_CHANNEL_PSA_MAILBOX, CY_PSA_MAILBOX_IRQN_ID) == (IRQn_Type)(-1)) {
error("PSA SPM Mailbox NVIC channel reservation conflict.");
}
(void)Cy_SysInt_Init(&ipc_intr_Config, ipc_interrupt_handler);
// Set specific NOTIFY interrupt mask only.
// Only the interrupt sources with their masks enabled can trigger the interrupt.
ipc_interrupt_ptr = Cy_IPC_Drv_GetIntrBaseAddr(SPM_IPC_NOTIFY_CM0P_INTR);
CY_ASSERT(ipc_interrupt_ptr != NULL);
Cy_IPC_Drv_SetInterruptMask(ipc_interrupt_ptr, 0x0, 1 << SPM_IPC_CHANNEL);
// Enable the interrupt
NVIC_EnableIRQ(ipc_intr_Config.intrSrc);
ipc_channel_handle = Cy_IPC_Drv_GetIpcBaseAddress(SPM_IPC_CHANNEL);
CY_ASSERT(ipc_channel_handle != NULL);
}
void lp_ticker_init(void)
{
lp_ticker_disable_interrupt();
lp_ticker_clear_interrupt();
if (lpt_init_done) {
return;
}
#ifdef TARGET_MCU_PSOC6_M0
// Allocate NVIC channel.
lpt_sysint_config.intrSrc = cy_m0_nvic_allocate_channel(CY_LP_TICKER_IRQN_ID);
if (lpt_sysint_config.intrSrc == (IRQn_Type)(-1)) {
// No free NVIC channel.
error("LP_TICKER NVIC channel allocation failed.");
return;
}
#endif
Cy_MCWDT_Init(LPT_MCWDT_UNIT, &config);
Cy_SysInt_Init(&lpt_sysint_config, lp_ticker_irq_handler);
NVIC_EnableIRQ(lpt_sysint_config.intrSrc);
Cy_MCWDT_Enable(LPT_MCWDT_UNIT, CY_MCWDT_CTR0, LPT_MCWDT_DELAY_WAIT);
lpt_init_done = true;
}
static int i2c_irq_setup_channel(i2c_obj_t *obj)
{
cy_stc_sysint_t irq_config;
if (obj->irqn == unconnected_IRQn) {
IRQn_Type irqn = i2c_irq_allocate_channel(obj);
if (irqn < 0) {
return (-1);
}
// Configure NVIC
irq_config.intrPriority = I2C_DEFAULT_IRQ_PRIORITY;
irq_config.intrSrc = irqn;
#if defined (TARGET_MCU_PSOC6_M0)
irq_config.cm0pSrc = obj->cm0p_irq_src;
#endif
if (Cy_SysInt_Init(&irq_config, (cy_israddress)(obj->handler)) != CY_SYSINT_SUCCESS) {
return (-1);
}
obj->irqn = irqn;
NVIC_EnableIRQ(irqn);
}
return 0;
}
