static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type, unsigned int pclock) { int ret = 0; u32 v = DM644X_VPSS_VENCLKEN; switch (type) { case VPBE_ENC_STD: v |= DM644X_VPSS_DACCLKEN; writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); break; case VPBE_ENC_CUSTOM_TIMINGS: if (pclock <= 27000000) { v |= DM644X_VPSS_DACCLKEN; writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); } else { /* * For HD, use external clock source since * HD requires higher clock rate */ v |= DM644X_VPSS_MUXSEL_VPBECLK_MODE; writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); } break; default: ret = -EINVAL; } return ret; }
static int dm355_venc_setup_clock(enum vpbe_enc_timings_type type, unsigned int pclock) { void __iomem *vpss_clk_ctrl_reg; vpss_clk_ctrl_reg = DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL); switch (type) { case VPBE_ENC_STD: writel(VPSS_DACCLKEN_ENABLE | VPSS_VENCCLKEN_ENABLE, vpss_clk_ctrl_reg); break; case VPBE_ENC_DV_TIMINGS: if (pclock > 27000000) /* * For HD, use external clock source since we cannot * support HD mode with internal clocks. */ writel(VPSS_MUXSEL_EXTCLK_ENABLE, vpss_clk_ctrl_reg); break; default: return -EINVAL; } return 0; }
static int dm365_venc_setup_clock(enum vpbe_enc_timings_type type, unsigned int pclock) { void __iomem *vpss_clkctl_reg; u32 val; vpss_clkctl_reg = DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL); switch (type) { case VPBE_ENC_STD: val = VPSS_VENCCLKEN_ENABLE | VPSS_DACCLKEN_ENABLE; break; case VPBE_ENC_DV_TIMINGS: if (pclock <= 27000000) { val = VPSS_VENCCLKEN_ENABLE | VPSS_DACCLKEN_ENABLE; } else { /* set sysclk4 to output 74.25 MHz from pll1 */ val = VPSS_PLLC2SYSCLK5_ENABLE | VPSS_DACCLKEN_ENABLE | VPSS_VENCCLKEN_ENABLE; } break; default: return -EINVAL; } writel(val, vpss_clkctl_reg); return 0; }
static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type, unsigned int mode) { int ret = 0; u32 v = DM644X_VPSS_VENCLKEN; switch (type) { case VPBE_ENC_STD: v |= DM644X_VPSS_DACCLKEN; writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); break; case VPBE_ENC_DV_PRESET: switch (mode) { case V4L2_DV_480P59_94: case V4L2_DV_576P50: v |= DM644X_VPSS_MUXSEL_PLL2_MODE | DM644X_VPSS_DACCLKEN; writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); break; case V4L2_DV_720P60: case V4L2_DV_1080I60: case V4L2_DV_1080P30: /* */ v |= DM644X_VPSS_MUXSEL_VPBECLK_MODE; writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); break; default: ret = -EINVAL; break; } break; default: ret = -EINVAL; } return ret; }
void dm646x_setup_vpif(struct vpif_display_config *display_config, struct vpif_capture_config *capture_config) { unsigned int value; value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); value &= ~VSCLKDIS_MASK; __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); value &= ~VDD3P3V_VID_MASK; __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); davinci_cfg_reg(DM646X_STSOMUX_DISABLE); davinci_cfg_reg(DM646X_STSIMUX_DISABLE); davinci_cfg_reg(DM646X_PTSOMUX_DISABLE); davinci_cfg_reg(DM646X_PTSIMUX_DISABLE); vpif_display_dev.dev.platform_data = display_config; vpif_capture_dev.dev.platform_data = capture_config; platform_device_register(&vpif_dev); platform_device_register(&vpif_display_dev); platform_device_register(&vpif_capture_dev); }
void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) { struct platform_device *pdev = NULL; if (WARN_ON(cpu_is_davinci_dm646x())) return; /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too; * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused. * * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are * not handled right here ... */ switch (module) { case 1: if (cpu_is_davinci_dm355()) { /* REVISIT we may not need all these pins if e.g. this * is a hard-wired SDIO device... */ davinci_cfg_reg(DM355_SD1_CMD); davinci_cfg_reg(DM355_SD1_CLK); davinci_cfg_reg(DM355_SD1_DATA0); davinci_cfg_reg(DM355_SD1_DATA1); davinci_cfg_reg(DM355_SD1_DATA2); davinci_cfg_reg(DM355_SD1_DATA3); } else if (cpu_is_davinci_dm365()) { /* Configure pull down control */ unsigned v; v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1)); __raw_writel(v & ~0xfc0, DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1)); mmcsd1_resources[0].start = DM365_MMCSD1_BASE; mmcsd1_resources[0].end = DM365_MMCSD1_BASE + SZ_4K - 1; mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1; davinci_mmcsd1_device.name = "da830-mmc"; } else break; pdev = &davinci_mmcsd1_device; break; case 0: if (cpu_is_davinci_dm355()) { mmcsd0_resources[0].start = DM355_MMCSD0_BASE; mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1; mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0; /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */ davinci_cfg_reg(DM355_MMCSD0); /* enable RX EDMA */ davinci_cfg_reg(DM355_EVT26_MMC0_RX); } else if (cpu_is_davinci_dm365()) { mmcsd0_resources[0].start = DM365_MMCSD0_BASE; mmcsd0_resources[0].end = DM365_MMCSD0_BASE + SZ_4K - 1; mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0; davinci_mmcsd0_device.name = "da830-mmc"; } else if (cpu_is_davinci_dm644x()) { /* REVISIT: should this be in board-init code? */ /* Power-on 3.3V IO cells */ __raw_writel(0, DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); /*Set up the pull regiter for MMC */ davinci_cfg_reg(DM644X_MSTK); } pdev = &davinci_mmcsd0_device; break; } if (WARN_ON(!pdev)) return; pdev->dev.platform_data = config; platform_device_register(pdev); }