/*
========================================================================
Routine Description: Read RT30xx RF register through MAC
Arguments:
Return Value:
IRQL =
Note:
========================================================================
*/
NDIS_STATUS RT30xxReadRFRegister(
IN PRTMP_ADAPTER pAd,
IN UCHAR regID,
IN PUCHAR pValue)
{
RF_CSR_CFG_STRUC rfcsr = { { 0 } };
UINT i=0, k=0;
#ifdef RTMP_MAC_PCI
if ((pAd->bPCIclkOff == TRUE) || (pAd->LastMCUCmd == SLEEP_MCU_CMD))
{
DBGPRINT_ERR(("RT30xxReadRFRegister. Not allow to read RF 0x%x : fail\n", regID));
return STATUS_UNSUCCESSFUL;
}
#endif /* RTMP_MAC_PCI */
{
ASSERT((regID <= pAd->chipCap.MaxNumOfRfId)); /* R0~R63*/
for (i=0; i<MAX_BUSY_COUNT; i++)
{
RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
if (rfcsr.field.RF_CSR_KICK == BUSY)
continue;
rfcsr.word = 0;
rfcsr.field.RF_CSR_WR = 0;
rfcsr.field.RF_CSR_KICK = 1;
rfcsr.field.TESTCSR_RFACC_REGNUM = regID;
RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
for (k=0; k<MAX_BUSY_COUNT; k++)
{
RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
if (rfcsr.field.RF_CSR_KICK == IDLE)
break;
}
if ((rfcsr.field.RF_CSR_KICK == IDLE) &&
(rfcsr.field.TESTCSR_RFACC_REGNUM == regID))
{
*pValue = (UCHAR)(rfcsr.field.RF_CSR_DATA);
break;
}
}
if (rfcsr.field.RF_CSR_KICK == BUSY)
{
DBGPRINT_ERR(("RF read R%d=0x%X fail, i[%d], k[%d]\n", regID, rfcsr.word,i,k));
return STATUS_UNSUCCESSFUL;
}
}
return STATUS_SUCCESS;
}
NDIS_STATUS rlt_rf_write(
IN PRTMP_ADAPTER pAd,
IN UCHAR bank,
IN UCHAR regID,
IN UCHAR value)
{
RF_CSR_CFG_STRUC rfcsr = { { 0 } };
NDIS_STATUS ret;
#ifdef RTMP_MAC_PCI
if ((pAd->bPCIclkOff == TRUE) || (pAd->LastMCUCmd == SLEEP_MCU_CMD))
{
DBGPRINT_ERR(("rlt_rf_write. Not allow to write RF 0x%x : fail\n", regID));
return STATUS_UNSUCCESSFUL;
}
#endif /* RTMP_MAC_PCI */
#ifdef RLT_MAC
// TODO: shiang-usw, why we need to check this for MT7601?? Get these code from MT7601!
if (pAd->chipCap.hif_type == HIF_RLT) {
if (pAd->WlanFunCtrl.field.WLAN_EN == 0)
{
DBGPRINT_ERR(("rlt_rf_write. Not allow to write RF 0x%x : fail\n", regID));
return STATUS_UNSUCCESSFUL;
}
}
#endif /* RLT_MAC */
ASSERT((regID <= pAd->chipCap.MaxNumOfRfId));
ret = STATUS_UNSUCCESSFUL;
if (rf_csr_poll_idle(pAd, &rfcsr.word) != IDLE)
goto done;
#ifdef RT65xx
if (IS_RT65XX(pAd)) {
rfcsr.bank_65xx.RF_CSR_WR = 1;
rfcsr.bank_65xx.RF_CSR_KICK = 1;
rfcsr.bank_65xx.RF_CSR_REG_BANK = bank;
rfcsr.bank_65xx.RF_CSR_REG_ID = regID;
rfcsr.bank_65xx.RF_CSR_DATA = value;
}
else
#endif /* RT65xx */
{
DBGPRINT_ERR(("%s():RF write with wrong handler!\n", __FUNCTION__));
goto done;
}
RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
ret = NDIS_STATUS_SUCCESS;
done:
return ret;
}
/*
========================================================================
Routine Description:
Arguments:
Return Value:
Note:
========================================================================
*/
INT ATEResetBulkOut(
IN PRTMP_ADAPTER pAd)
{
PATE_INFO pATEInfo = &(pAd->ate);
PTX_CONTEXT pNullContext = &(pAd->NullContext);
INT ret=0;
pNullContext->IRPPending = TRUE;
/*
If driver is still in ATE TXFRAME mode,
keep on transmitting ATE frames.
*/
DBGPRINT(RT_DEBUG_TRACE, ("pATEInfo->Mode == %d\npAd->ContinBulkOut == %d\npAd->BulkOutRemained == %d\n",
pATEInfo->Mode, pAd->ContinBulkOut, atomic_read(&pAd->BulkOutRemained)));
if ((pATEInfo->Mode == ATE_TXFRAME) && ((pAd->ContinBulkOut == TRUE) || (atomic_read(&pAd->BulkOutRemained) > 0)))
{
DBGPRINT(RT_DEBUG_TRACE, ("After CMDTHREAD_RESET_BULK_OUT, continue to bulk out frames !\n"));
/* Init Tx context descriptor. */
RTUSBInitTxDesc(pAd, pNullContext, 0/* pAd->bulkResetPipeid */, (usb_complete_t)RTUSBBulkOutDataPacketComplete);
if ((ret = RTUSB_SUBMIT_URB(pNullContext->pUrb))!=0)
{
DBGPRINT_ERR(("ATE_RTUSBBulkOutDataPacket: Submit Tx URB failed %d\n", ret));
}
pAd->BulkOutReq++;
}
return ret;
}
NTSTATUS RTUSBWriteBBPRegister(
IN PRTMP_ADAPTER pAd,
IN UCHAR Id,
IN UCHAR Value)
{
BBP_CSR_CFG_STRUC BbpCsr;
int BusyCnt;
for (BusyCnt=0; BusyCnt<MAX_BUSY_COUNT; BusyCnt++)
{
RTMP_IO_READ32(pAd, H2M_BBP_AGENT, &BbpCsr.word);
if (BbpCsr.field.Busy == BUSY)
continue;
BbpCsr.word = 0;
BbpCsr.field.fRead = 0;
BbpCsr.field.BBP_RW_MODE = 1;
BbpCsr.field.Busy = 1;
BbpCsr.field.Value = Value;
BbpCsr.field.RegNum = Id;
RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, BbpCsr.word);
AsicSendCommandToMcu(pAd, 0x80, 0xff, 0x0, 0x0);
pAd->BbpWriteLatch[Id] = Value;
break;
}
if (BusyCnt == MAX_BUSY_COUNT)
{
DBGPRINT_ERR(("BBP write R%d=0x%x fail\n", Id, BbpCsr.word));
return STATUS_UNSUCCESSFUL;
}
return STATUS_SUCCESS;
}
INT RT28xx_Set_ATE_TX_FREQ_OFFSET_Proc(
IN PRTMP_ADAPTER pAd,
IN PSTRING arg)
{
PATE_INFO pATEInfo = &(pAd->ate);
ULONG R4 = 0;
UCHAR RFFreqOffset = 0;
RFFreqOffset = simple_strtol(arg, 0, 10);
if (RFFreqOffset >= 64)
{
DBGPRINT_ERR(("Set_ATE_TX_FREQ_OFFSET_Proc::Out of range(0 ~ 63).\n"));
return FALSE;
}
pATEInfo->RFFreqOffset = RFFreqOffset;
/* shift TX power control to correct RF register bit position */
R4 = pATEInfo->RFFreqOffset << 15;
R4 |= (pAd->LatchRfRegs.R4 & ((~0x001f8000)));
pAd->LatchRfRegs.R4 = R4;
RtmpRfIoWrite(pAd);
return TRUE;
}
NDIS_STATUS rtmp_rf_write(
IN PRTMP_ADAPTER pAd,
IN UCHAR bank,
IN UCHAR regID,
IN UCHAR value)
{
RF_CSR_CFG_STRUC rfcsr = { { 0 } };
NDIS_STATUS ret;
#ifdef RTMP_MAC_PCI
if ((pAd->bPCIclkOff == TRUE) || (pAd->LastMCUCmd == SLEEP_MCU_CMD))
{
DBGPRINT_ERR(("rtmp_rf_write. Not allow to write RF 0x%x : fail\n", regID));
return STATUS_UNSUCCESSFUL;
}
#endif /* RTMP_MAC_PCI */
ASSERT((regID <= pAd->chipCap.MaxNumOfRfId));
ret = STATUS_UNSUCCESSFUL;
if (rtmp_rf_csr_poll_idle(pAd, &rfcsr.word) != IDLE)
goto done;
#ifdef RT6352
if (IS_RT6352(pAd))
{
rfcsr.bank_6352.RF_CSR_WR = 1;
rfcsr.bank_6352.RF_CSR_KICK = 1;
rfcsr.bank_6352.TESTCSR_RFACC_REGNUM = (regID | (bank << 6));
rfcsr.bank_6352.RF_CSR_DATA = value;
}
else
#endif /* RT6352 */
{
DBGPRINT_ERR(("%s():RF write with wrong handler!\n", __FUNCTION__));
goto done;
}
RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
ret = NDIS_STATUS_SUCCESS;
done:
return ret;
}
/*
========================================================================
Routine Description: Read RT30xx RF register through MAC
Arguments:
Return Value:
IRQL =
Note:
========================================================================
*/
NDIS_STATUS RT30xxReadRFRegister(
IN PRTMP_ADAPTER pAd,
IN UCHAR regID,
IN PUCHAR pValue)
{
RF_CSR_CFG_STRUC rfcsr = { { 0 } };
UINT i = 0, k = 0;
{
if (IS_RT3883(pAd))
{
ASSERT((regID <= 63)); // R0~R63
}
else
{
ASSERT((regID <= 31)); // R0~R31
}
for (i = 0; i < MAX_BUSY_COUNT; i++)
{
RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
if (rfcsr.field.RF_CSR_KICK == BUSY)
{
continue;
}
rfcsr.word = 0;
rfcsr.field.RF_CSR_WR = 0;
rfcsr.field.RF_CSR_KICK = 1;
rfcsr.field.TESTCSR_RFACC_REGNUM = regID;
RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
for (k = 0; k < MAX_BUSY_COUNT; k++)
{
RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
if (rfcsr.field.RF_CSR_KICK == IDLE)
break;
}
if ((rfcsr.field.RF_CSR_KICK == IDLE) &&
(rfcsr.field.TESTCSR_RFACC_REGNUM == regID))
{
*pValue = (UCHAR)(rfcsr.field.RF_CSR_DATA);
break;
}
}
if (rfcsr.field.RF_CSR_KICK == BUSY)
{
DBGPRINT_ERR(("RF read R%d=0x%X fail, i[%d], k[%d]\n", regID, rfcsr.word, i, k));
return STATUS_UNSUCCESSFUL;
}
}
return STATUS_SUCCESS;
}
NDIS_STATUS RT635xWriteRFRegister(
IN PRTMP_ADAPTER pAd,
IN UCHAR bank,
IN UCHAR regID,
IN UCHAR value)
{
RF_CSR_CFG_STRUC rfcsr = { { 0 } };
UINT i = 0;
NDIS_STATUS ret;
#ifdef RTMP_MAC_PCI
if ((pAd->bPCIclkOff == TRUE) || (pAd->LastMCUCmd == SLEEP_MCU_CMD))
{
DBGPRINT_ERR(("RT635xWriteRFRegister. Not allow to write RF 0x%x : fail\n", regID));
return STATUS_UNSUCCESSFUL;
}
#endif /* RTMP_MAC_PCI */
ASSERT((regID <= pAd->chipCap.MaxNumOfRfId));
if (regID > pAd->chipCap.MaxNumOfRfId)
{
DBGPRINT(RT_DEBUG_ERROR, ("RegID=%d, pAd->chipCap.MaxNumOfRfId=%d\n", regID, pAd->chipCap.MaxNumOfRfId));
}
ret = STATUS_UNSUCCESSFUL;
do
{
RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
if (!rfcsr.bank_6352.RF_CSR_KICK)
break;
i++;
}
while ((i < MAX_BUSY_COUNT) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)));
if ((i == MAX_BUSY_COUNT) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
{
DBGPRINT_RAW(RT_DEBUG_ERROR, ("Retry count exhausted or device removed!!!\n"));
goto done;
}
rfcsr.bank_6352.RF_CSR_WR = 1;
rfcsr.bank_6352.RF_CSR_KICK = 1;
rfcsr.bank_6352.TESTCSR_RFACC_REGNUM = (regID | (bank << 6));
rfcsr.bank_6352.RF_CSR_DATA = value;
RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
ret = NDIS_STATUS_SUCCESS;
done:
return ret;
}
/*
========================================================================
Routine Description: Read RT30xx RF register through MAC
Arguments:
Return Value:
IRQL =
Note:
========================================================================
*/
NDIS_STATUS RT30xxReadRFRegister(
IN PRTMP_ADAPTER pAd,
IN UCHAR regID,
IN PUCHAR pValue)
{
RF_CSR_CFG_STRUC rfcsr = { { 0 } };
UINT i=0, k=0;
ASSERT((regID <= pAd->chipCap.MaxNumOfRfId));
for (i=0; i<MAX_BUSY_COUNT; i++)
{
if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
return STATUS_UNSUCCESSFUL;
RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
if (rfcsr.field.RF_CSR_KICK == BUSY)
continue;
rfcsr.word = 0;
rfcsr.field.RF_CSR_WR = 0;
rfcsr.field.RF_CSR_KICK = 1;
rfcsr.field.TESTCSR_RFACC_REGNUM = regID;
RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
for (k=0; k<MAX_BUSY_COUNT; k++)
{
if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
return STATUS_UNSUCCESSFUL;
RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
if (rfcsr.field.RF_CSR_KICK == IDLE)
break;
}
if ((rfcsr.field.RF_CSR_KICK == IDLE) &&
(rfcsr.field.TESTCSR_RFACC_REGNUM == regID))
{
*pValue = (UCHAR)(rfcsr.field.RF_CSR_DATA);
break;
}
}
if (rfcsr.field.RF_CSR_KICK == BUSY)
{
DBGPRINT_ERR(("RF read R%d=0x%X fail, i[%d], k[%d]\n", regID, rfcsr.word,i,k));
return STATUS_UNSUCCESSFUL;
}
return STATUS_SUCCESS;
}
/*
========================================================================
Routine Description: Write RT30xx RF register through MAC
Arguments:
Return Value:
IRQL =
Note:
========================================================================
*/
NDIS_STATUS RT30xxWriteRFRegister(
IN PRTMP_ADAPTER pAd,
IN UCHAR regID,
IN UCHAR value)
{
RF_CSR_CFG_STRUC rfcsr = { { 0 } };
UINT i = 0;
#ifdef RTMP_MAC_PCI
if ((pAd->bPCIclkOff == TRUE) || (pAd->LastMCUCmd == SLEEP_MCU_CMD))
{
DBGPRINT_ERR(("RT30xxWriteRFRegister. Not allow to write RF 0x%x : fail\n", regID));
return STATUS_UNSUCCESSFUL;
}
#endif // RTMP_MAC_PCI //
{
if (IS_RT3883(pAd))
{
ASSERT((regID <= 63)); // R0~R63
}
else
{
ASSERT((regID <= 31)); // R0~R31
}
do
{
RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
if (!rfcsr.field.RF_CSR_KICK)
break;
i++;
}
while ((i < RETRY_LIMIT) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)));
if ((i == RETRY_LIMIT) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
{
DBGPRINT_RAW(RT_DEBUG_ERROR, ("Retry count exhausted or device removed!!!\n"));
return STATUS_UNSUCCESSFUL;
}
rfcsr.field.RF_CSR_WR = 1;
rfcsr.field.RF_CSR_KICK = 1;
rfcsr.field.TESTCSR_RFACC_REGNUM = regID; // R0~R31
rfcsr.field.RF_CSR_DATA = value;
RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
}
return NDIS_STATUS_SUCCESS;
}
/*
========================================================================
Routine Description: Read 8-bit BBP register via firmware
Arguments:
Return Value:
IRQL =
Note:
========================================================================
*/
NTSTATUS RTUSBReadBBPRegister(
IN PRTMP_ADAPTER pAd,
IN UCHAR Id,
IN PUCHAR pValue)
{
BBP_CSR_CFG_STRUC BbpCsr;
int i, k, ret;
RTMP_SEM_EVENT_WAIT(&pAd->reg_atomic, ret);
if (ret != 0)
{
DBGPRINT(RT_DEBUG_ERROR, ("reg_atomic get failed(ret=%d)\n", ret));
return STATUS_UNSUCCESSFUL;
}
for (i=0; i<MAX_BUSY_COUNT; i++)
{
RTUSBReadMACRegister(pAd, H2M_BBP_AGENT, &BbpCsr.word);
if (BbpCsr.field.Busy == BUSY)
continue;
BbpCsr.word = 0;
BbpCsr.field.fRead = 1;
BbpCsr.field.BBP_RW_MODE = 1;
BbpCsr.field.Busy = 1;
BbpCsr.field.RegNum = Id;
RTUSBWriteMACRegister(pAd, H2M_BBP_AGENT, BbpCsr.word, FALSE);
AsicSendCommandToMcu(pAd, 0x80, 0xff, 0x0, 0x0, TRUE);
for (k=0; k<MAX_BUSY_COUNT; k++)
{
RTUSBReadMACRegister(pAd, H2M_BBP_AGENT, &BbpCsr.word);
if (BbpCsr.field.Busy == IDLE)
break;
}
if ((BbpCsr.field.Busy == IDLE) &&
(BbpCsr.field.RegNum == Id))
{
*pValue = (UCHAR)BbpCsr.field.Value;
break;
}
}
RTMP_SEM_EVENT_UP(&pAd->reg_atomic);
if (BbpCsr.field.Busy == BUSY)
{
DBGPRINT_ERR(("BBP read R%d=0x%x fail\n", Id, BbpCsr.word));
*pValue = pAd->BbpWriteLatch[Id];
return STATUS_UNSUCCESSFUL;
}
return STATUS_SUCCESS;
}
/*
========================================================================
Routine Description:
Arguments:
Return Value:
None
Note:
========================================================================
*/
VOID ATEResetBulkIn(
IN PRTMP_ADAPTER pAd)
{
if ((pAd->PendingRx > 0) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
{
DBGPRINT_ERR(("ATE : BulkIn IRP Pending!!!\n"));
ATE_RTUSBCancelPendingBulkInIRP(pAd);
RtmpOsMsDelay(100);
pAd->PendingRx = 0;
}
return;
}
/*
========================================================================
Routine Description:
MLME kernel thread.
Arguments:
*Context the pAd, driver control block pointer
Return Value:
0 close the thread
Note:
========================================================================
*/
INT MlmeThread(
IN ULONG Context)
{
RTMP_ADAPTER *pAd;
RTMP_OS_TASK *pTask;
int status;
status = 0;
pTask = (RTMP_OS_TASK *)Context;
pAd = (PRTMP_ADAPTER)RTMP_OS_TASK_DATA_GET(pTask);
if (pAd == NULL)
goto LabelExit; /* avoid compile warning */
RtmpOSTaskCustomize(pTask);
while(!RTMP_OS_TASK_IS_KILLED(pTask))
{
if (RtmpOSTaskWait(pAd, pTask, &status) == FALSE)
{
DBGPRINT_ERR(("RtmpOSTaskWait returned false in MlmeThread, setting halt in progress flag!\n"));
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS);
break;
}
/* lock the device pointers , need to check if required*/
/*down(&(pAd->usbdev_semaphore)); */
if (!pAd->PM_FlgSuspend)
MlmeHandler(pAd);
}
/* notify the exit routine that we're actually exiting now
*
* complete()/wait_for_completion() is similar to up()/down(),
* except that complete() is safe in the case where the structure
* is getting deleted in a parallel mode of execution (i.e. just
* after the down() -- that's necessary for the thread-shutdown
* case.
*
* complete_and_exit() goes even further than this -- it is safe in
* the case that the thread of the caller is going away (not just
* the structure) -- this is necessary for the module-remove case.
* This is important in preemption kernels, which transfer the flow
* of execution immediately upon a complete().
*/
LabelExit:
DBGPRINT(RT_DEBUG_TRACE,( "<---%s\n",__FUNCTION__));
RtmpOSTaskNotifyToExit(pTask);
return 0;
}
/*! \brief Enqueue a message for other threads, if they want to send messages to MLME thread
* \param *Queue The MLME Queue
* \param Machine The State Machine Id
* \param MsgType The Message Type
* \param MsgLen The Message length
* \param *Msg The message pointer
* \return TRUE if enqueue is successful, FALSE if the queue is full
* \pre
* \post
* \note The message has to be initialized
*/
BOOLEAN MlmeEnqueueEx(
IN PRTMP_ADAPTER pAd,
IN ULONG Machine,
IN ULONG MsgType,
IN ULONG MsgLen,
IN VOID *Msg,
IN USHORT Idx)
{
INT Tail;
MLME_QUEUE *Queue = (MLME_QUEUE *)&pAd->Mlme.Queue;
// Do nothing if the driver is starting halt state.
// This might happen when timer already been fired before cancel timer with mlmehalt
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS))
return FALSE;
// First check the size, it MUST not exceed the mlme queue size
if (MsgLen > MAX_LEN_OF_MLME_BUFFER)
{
DBGPRINT_ERR(("MlmeEnqueueEx: msg too large, size = %ld \n", MsgLen));
return FALSE;
}
if (MlmeQueueFull(Queue))
{
return FALSE;
}
RTMP_SEM_LOCK(&Queue->Lock);
Tail = Queue->Tail;
Queue->Tail++;
Queue->Num++;
if (Queue->Tail == MAX_LEN_OF_MLME_QUEUE)
{
Queue->Tail = 0;
}
Queue->Entry[Tail].Occupied = TRUE;
Queue->Entry[Tail].Machine = Machine;
Queue->Entry[Tail].MsgType = MsgType;
Queue->Entry[Tail].MsgLen = MsgLen;
Queue->Entry[Tail].Idx = Idx;
if (Msg != NULL)
NdisMoveMemory(Queue->Entry[Tail].Msg, Msg, MsgLen);
RTMP_SEM_UNLOCK(&Queue->Lock);
return TRUE;
}
INT mcu_sys_init(RTMP_ADAPTER *pAd)
{
NDIS_STATUS Status;
/* Load MCU firmware*/
MCU_CTRL_INIT(pAd);
Status = load_patch(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("load patch failed, Status[=0x%08x]\n", Status));
return FALSE;
}
Status = NICLoadFirmware(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status));
return FALSE;
}
return TRUE;
}
/*
========================================================================
Routine Description:
Arguments:
Return Value:
None
Note:
========================================================================
*/
VOID ATE_RTUSBBulkOutDataPacket(
IN PRTMP_ADAPTER pAd,
IN UCHAR BulkOutPipeId)
{
PTX_CONTEXT pNullContext = &(pAd->NullContext);
PURB pUrb;
INT ret = 0;
ULONG IrqFlags;
ASSERT(BulkOutPipeId == 0);
/* Build up the frame first. */
BULK_OUT_LOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
if (pAd->BulkOutPending[BulkOutPipeId] == TRUE)
{
BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
return;
}
pAd->BulkOutPending[BulkOutPipeId] = TRUE;
BULK_OUT_UNLOCK(&pAd->BulkOutLock[BulkOutPipeId], IrqFlags);
/* Increase total transmit byte counter. */
pAd->RalinkCounters.OneSecTransmittedByteCount += pNullContext->BulkOutSize;
pAd->RalinkCounters.TransmittedByteCount += pNullContext->BulkOutSize;
/* Clear ATE frame bulk out flag. */
RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_ATE);
/* Init Tx context descriptor. */
pNullContext->IRPPending = TRUE;
RTUSBInitTxDesc(pAd, pNullContext, BulkOutPipeId,
(usb_complete_t)RTUSBBulkOutDataPacketComplete);
pUrb = pNullContext->pUrb;
if ((ret = RTUSB_SUBMIT_URB(pUrb))!=0)
{
DBGPRINT_ERR(("ATE_RTUSBBulkOutDataPacket: Submit Tx URB failed %d\n", ret));
return;
}
pAd->BulkOutReq++;
return;
}
NTSTATUS RTUSBWriteBBPRegister(
IN PRTMP_ADAPTER pAd,
IN UCHAR Id,
IN UCHAR Value)
{
BBP_CSR_CFG_STRUC BbpCsr;
int BusyCnt;
int ret;
RTMP_SEM_EVENT_WAIT(&pAd->reg_atomic, ret);
if (ret != 0)
{
DBGPRINT(RT_DEBUG_ERROR, ("reg_atomic get failed(ret=%d)\n", ret));
return STATUS_UNSUCCESSFUL;
}
for (BusyCnt=0; BusyCnt<MAX_BUSY_COUNT; BusyCnt++)
{
RTMP_IO_READ32(pAd, H2M_BBP_AGENT, &BbpCsr.word);
if (BbpCsr.field.Busy == BUSY)
continue;
BbpCsr.word = 0;
BbpCsr.field.fRead = 0;
BbpCsr.field.BBP_RW_MODE = 1;
BbpCsr.field.Busy = 1;
BbpCsr.field.Value = Value;
BbpCsr.field.RegNum = Id;
RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, BbpCsr.word);
AsicSendCommandToMcu(pAd, 0x80, 0xff, 0x0, 0x0, TRUE);
pAd->BbpWriteLatch[Id] = Value;
break;
}
RTMP_SEM_EVENT_UP(&pAd->reg_atomic);
if (BusyCnt == MAX_BUSY_COUNT)
{
DBGPRINT_ERR(("BBP write R%d=0x%x fail\n", Id, BbpCsr.word));
return STATUS_UNSUCCESSFUL;
}
return STATUS_SUCCESS;
}
/*
========================================================================
Routine Description: Read RT3070 RF register through MAC
Arguments:
Return Value:
IRQL =
Note:
========================================================================
*/
NTSTATUS RT30xxReadRFRegister(
IN PRTMP_ADAPTER pAd,
IN UCHAR RegID,
IN PUCHAR pValue)
{
RF_CSR_CFG_STRUC rfcsr;
UINT i=0, k;
for (i=0; i<MAX_BUSY_COUNT; i++)
{
RTUSBReadMACRegister(pAd, RF_CSR_CFG, &rfcsr.word);
if (rfcsr.field.RF_CSR_KICK == BUSY)
{
continue;
}
rfcsr.word = 0;
rfcsr.field.RF_CSR_WR = 0;
rfcsr.field.RF_CSR_KICK = 1;
rfcsr.field.TESTCSR_RFACC_REGNUM = RegID;
RTUSBWriteMACRegister(pAd, RF_CSR_CFG, rfcsr.word);
for (k=0; k<MAX_BUSY_COUNT; k++)
{
RTUSBReadMACRegister(pAd, RF_CSR_CFG, &rfcsr.word);
if (rfcsr.field.RF_CSR_KICK == IDLE)
break;
}
if ((rfcsr.field.RF_CSR_KICK == IDLE) &&
(rfcsr.field.TESTCSR_RFACC_REGNUM == RegID))
{
*pValue = (UCHAR)rfcsr.field.RF_CSR_DATA;
break;
}
}
if (rfcsr.field.RF_CSR_KICK == BUSY)
{
DBGPRINT_ERR(("RF read R%d=0x%x fail\n", RegID, rfcsr.word));
return STATUS_UNSUCCESSFUL;
}
return STATUS_SUCCESS;
}
/*
========================================================================
Routine Description: Read 8-bit BBP register via firmware
Arguments:
Return Value:
IRQL =
Note:
========================================================================
*/
NTSTATUS RTUSBReadBBPRegister(
IN PRTMP_ADAPTER pAd,
IN UCHAR Id,
IN PUCHAR pValue)
{
BBP_CSR_CFG_STRUC BbpCsr;
int i, k;
for (i=0; i<MAX_BUSY_COUNT; i++)
{
RTUSBReadMACRegister(pAd, H2M_BBP_AGENT, &BbpCsr.word);
if (BbpCsr.field.Busy == BUSY)
{
continue;
}
BbpCsr.word = 0;
BbpCsr.field.fRead = 1;
BbpCsr.field.BBP_RW_MODE = 1;
BbpCsr.field.Busy = 1;
BbpCsr.field.RegNum = Id;
RTUSBWriteMACRegister(pAd, H2M_BBP_AGENT, BbpCsr.word);
AsicSendCommandToMcu(pAd, 0x80, 0xff, 0x0, 0x0);
for (k=0; k<MAX_BUSY_COUNT; k++)
{
RTUSBReadMACRegister(pAd, H2M_BBP_AGENT, &BbpCsr.word);
if (BbpCsr.field.Busy == IDLE)
break;
}
if ((BbpCsr.field.Busy == IDLE) &&
(BbpCsr.field.RegNum == Id))
{
*pValue = (UCHAR)BbpCsr.field.Value;
break;
}
}
if (BbpCsr.field.Busy == BUSY)
{
DBGPRINT_ERR(("BBP read R%d=0x%x fail\n", Id, BbpCsr.word));
*pValue = pAd->BbpWriteLatch[Id];
return STATUS_UNSUCCESSFUL;
}
return STATUS_SUCCESS;
}
INT32 MCUSysInit(RTMP_ADAPTER *pAd)
{
INT32 Ret = 0;
DBGPRINT(RT_DEBUG_TRACE, ("%s\n", __FUNCTION__));
MCU_CTRL_INIT(pAd);
#ifdef MT_MAC
if (pAd->chipOps.FwInit && (pAd->chipCap.hif_type == HIF_MT))
pAd->chipOps.FwInit(pAd);
#ifndef RTMP_SDIO_SUPPORT
#endif /*leonardo temporari skip rom patch download for FPGA*/
#endif /* MT_MAC */
Ret = NICLoadFirmware(pAd);
if (Ret != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("%s: NICLoadFirmware failed, Status[=0x%08x]\n", __FUNCTION__, Ret));
return -1;
}
#ifdef MT_MAC
if (pAd->chipCap.hif_type == HIF_MT) {
#if defined(RTMP_PCI_SUPPORT) || defined(RTMP_USB_SUPPORT)
AsicDMASchedulerInit(pAd, DMA_SCH_LMAC);
#endif
#ifdef CONFIG_AP_SUPPORT
CmdPsRetrieveReq(pAd , pAd->bPS_Retrieve);
#endif
}
#endif /* MT_MAC */
return Ret;
}
/*
========================================================================
Routine Description: Read RT30xx RF register through MAC
Arguments:
Return Value:
IRQL =
Note:
========================================================================
*/
int RT30xxReadRFRegister(struct rt_rtmp_adapter *pAd,
u8 regID, u8 *pValue)
{
RF_CSR_CFG_STRUC rfcsr;
u32 i = 0, k = 0;
for (i = 0; i < MAX_BUSY_COUNT; i++) {
RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
if (rfcsr.field.RF_CSR_KICK == BUSY) {
continue;
}
rfcsr.word = 0;
rfcsr.field.RF_CSR_WR = 0;
rfcsr.field.RF_CSR_KICK = 1;
rfcsr.field.TESTCSR_RFACC_REGNUM = regID;
RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
for (k = 0; k < MAX_BUSY_COUNT; k++) {
RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
if (rfcsr.field.RF_CSR_KICK == IDLE)
break;
}
if ((rfcsr.field.RF_CSR_KICK == IDLE) &&
(rfcsr.field.TESTCSR_RFACC_REGNUM == regID)) {
*pValue = (u8)rfcsr.field.RF_CSR_DATA;
break;
}
}
if (rfcsr.field.RF_CSR_KICK == BUSY) {
DBGPRINT_ERR(("RF read R%d=0x%x fail, i[%d], k[%d]\n", regID,
rfcsr.word, i, k));
return STATUS_UNSUCCESSFUL;
}
return STATUS_SUCCESS;
}
BOOLEAN CntlEnqueueForRecv(
IN PRTMP_ADAPTER pAd,
IN ULONG Wcid,
IN ULONG MsgLen,
IN PFRAME_BA_REQ pMsg)
{
PFRAME_BA_REQ pFrame = pMsg;
//PRTMP_REORDERBUF pBuffer;
//PRTMP_REORDERBUF pDmaBuf;
PBA_REC_ENTRY pBAEntry;
//BOOLEAN Result;
ULONG Idx;
//UCHAR NumRxPkt;
UCHAR TID;//, i;
TID = (UCHAR)pFrame->BARControl.TID;
DBGPRINT(RT_DEBUG_TRACE, ("%s(): BAR-Wcid(%ld), Tid (%d)\n", __FUNCTION__, Wcid, TID));
//hex_dump("BAR", (PCHAR) pFrame, MsgLen);
// Do nothing if the driver is starting halt state.
// This might happen when timer already been fired before cancel timer with mlmehalt
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS | fRTMP_ADAPTER_NIC_NOT_EXIST))
return FALSE;
// First check the size, it MUST not exceed the mlme queue size
if (MsgLen > MGMT_DMA_BUFFER_SIZE)
{
DBGPRINT_ERR(("CntlEnqueueForRecv: frame too large, size = %ld \n", MsgLen));
return FALSE;
}
else if (MsgLen != sizeof(FRAME_BA_REQ))
{
DBGPRINT_ERR(("CntlEnqueueForRecv: BlockAck Request frame length size = %ld incorrect\n", MsgLen));
return FALSE;
}
else if (MsgLen != sizeof(FRAME_BA_REQ))
{
DBGPRINT_ERR(("CntlEnqueueForRecv: BlockAck Request frame length size = %ld incorrect\n", MsgLen));
return FALSE;
}
if ((Wcid < MAX_LEN_OF_MAC_TABLE) && (TID < 8))
{
// if this receiving packet is from SA that is in our OriEntry. Since WCID <9 has direct mapping. no need search.
Idx = pAd->MacTab.Content[Wcid].BARecWcidArray[TID];
pBAEntry = &pAd->BATable.BARecEntry[Idx];
}
else
{
return FALSE;
}
DBGPRINT(RT_DEBUG_TRACE, ("BAR(%ld) : Tid (%d) - %04x:%04x\n", Wcid, TID, pFrame->BAStartingSeq.field.StartSeq, pBAEntry->LastIndSeq ));
if (SEQ_SMALLER(pBAEntry->LastIndSeq, pFrame->BAStartingSeq.field.StartSeq, MAXSEQ))
{
//DBGPRINT(RT_DEBUG_TRACE, ("BAR Seq = %x, LastIndSeq = %x\n", pFrame->BAStartingSeq.field.StartSeq, pBAEntry->LastIndSeq));
ba_indicate_reordering_mpdus_le_seq(pAd, pBAEntry, pFrame->BAStartingSeq.field.StartSeq);
pBAEntry->LastIndSeq = (pFrame->BAStartingSeq.field.StartSeq == 0) ? MAXSEQ :(pFrame->BAStartingSeq.field.StartSeq -1);
}
//ba_refresh_reordering_mpdus(pAd, pBAEntry);
return TRUE;
}
/*
==========================================================================
Description:
Set RT28xx/RT2880 ATE RF BW
Return:
TRUE if all parameters are OK, FALSE otherwise
==========================================================================
*/
INT RT28xx_Set_ATE_TX_BW_Proc(
IN PRTMP_ADAPTER pAd,
IN PSTRING arg)
{
PATE_INFO pATEInfo = &(pAd->ate);
INT powerIndex;
UCHAR value = 0;
UCHAR BBPCurrentBW;
BBPCurrentBW = simple_strtol(arg, 0, 10);
if (BBPCurrentBW == 0)
{
pATEInfo->TxWI.BW = BW_20;
}
else
{
pATEInfo->TxWI.BW = BW_40;
}
#ifdef RELEASE_EXCLUDE
/* Fix the error spectrum of CCK-40MHZ. */
/* Turn on BBP 20MHz mode by request here. */
#endif /* RELEASE_EXCLUDE */
if ((pATEInfo->TxWI.TXWI_O.PHYMODE == MODE_CCK) && (pATEInfo->TxWI.TXWI_O.BW == BW_40))
{
DBGPRINT_ERR(("Set_ATE_TX_BW_Proc!! Warning!! CCK only supports 20MHZ!!\n"));
DBGPRINT_ERR(("Bandwidth switch to 20!!\n"));
pATEInfo->TxWI.BW = BW_20;
}
if (pATEInfo->TxWI.BW == BW_20)
{
if (pATEInfo->Channel <= 14)
{
/* BW=20;G band */
for (powerIndex=0; powerIndex<MAX_TXPOWER_ARRAY_SIZE; powerIndex++)
{
if (pAd->Tx20MPwrCfgGBand[powerIndex] == 0xffffffff)
continue;
/* TX_PWR_CFG_0 ~ TX_PWR_CFG_4 */
RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + powerIndex*4, pAd->Tx20MPwrCfgGBand[powerIndex]);
RtmpOsMsDelay(5);
}
}
else
{
/* BW=20;A band */
for (powerIndex=0; powerIndex<MAX_TXPOWER_ARRAY_SIZE; powerIndex++)
{
if (pAd->Tx20MPwrCfgABand[powerIndex] == 0xffffffff)
continue;
/* TX_PWR_CFG_0 ~ TX_PWR_CFG_4 */
RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + powerIndex*4, pAd->Tx20MPwrCfgABand[powerIndex]);
RtmpOsMsDelay(5);
}
}
/* set BW = 20 MHz */
/* Set BBP R4 bit[4:3]=0:0 */
ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &value);
value &= (~0x18);
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);
/* Set BBP R66=0x3C */
value = 0x3C;
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, value);
/* set BW = 20 MHz */
pAd->LatchRfRegs.R4 &= ~0x00200000;
RtmpRfIoWrite(pAd);
/* BW = 20 MHz */
/* Set BBP R68=0x0B to improve Rx sensitivity. */
value = 0x0B;
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, value);
/* Set BBP R69=0x16 */
value = 0x16;
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, value);
/* Set BBP R70=0x08 */
value = 0x08;
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, value);
/* Set BBP R73=0x11 */
value = 0x11;
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, value);
#ifdef RELEASE_EXCLUDE
/*
If Channel=14, Bandwidth=20M and Mode=CCK, Set BBP R4 bit5=1
(to set Japan filter coefficients).
This segment of code will only works when ATETXMODE and ATECHANNEL
were set to MODE_CCK and 14 respectively before ATETXBW is set to 0.
*/
/*
Please don't move this block backward.
BBP_R4 should be overwritten for every chip if the condition matched.
*/
#endif /* RELEASE_EXCLUDE */
if (pATEInfo->Channel == 14)
{
INT TxMode = pATEInfo->TxWI.TXWI_O.PHYMODE;
if (TxMode == MODE_CCK)
{
/* when Channel==14 && Mode==CCK && BandWidth==20M, BBP R4 bit5=1 */
ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &value);
value |= 0x20; /* set bit5=1 */
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);
}
}
}
/* If bandwidth = 40M, set RF Reg4 bit 21 = 0. */
else if (pATEInfo->TxWI.TXWI_O.BW == BW_40)
{
if (pATEInfo->Channel <= 14)
{
/* BW=40;G band */
for (powerIndex=0; powerIndex<MAX_TXPOWER_ARRAY_SIZE; powerIndex++)
{
if (pAd->Tx40MPwrCfgGBand[powerIndex] == 0xffffffff)
continue;
/* TX_PWR_CFG_0 ~ TX_PWR_CFG_4 */
RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + powerIndex*4, pAd->Tx40MPwrCfgGBand[powerIndex]);
RtmpOsMsDelay(5);
}
}
else
{
/* BW=40;A band */
for (powerIndex=0; powerIndex<MAX_TXPOWER_ARRAY_SIZE; powerIndex++)
{
if (pAd->Tx40MPwrCfgABand[powerIndex] == 0xffffffff)
continue;
/* TX_PWR_CFG_0 ~ TX_PWR_CFG_4 */
RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + powerIndex*4, pAd->Tx40MPwrCfgABand[powerIndex]);
RtmpOsMsDelay(5);
}
if ((pATEInfo->TxWI.TXWI_O.PHYMODE >= 2) && (pATEInfo->TxWI.TXWI_O.MCS == 7))
{
value = 0x28;
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R67, value);
}
}
/* Set BBP R4 bit[4:3]=1:0 */
ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &value);
value &= (~0x18);
value |= 0x10;
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);
/* Set BBP R66=0x3C */
value = 0x3C;
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, value);
/* set BW = 40 MHz */
pAd->LatchRfRegs.R4 |= 0x00200000;
RtmpRfIoWrite(pAd);
/* BW = 40 MHz */
/* Set BBP R68=0x0C to improve Rx sensitivity. */
value = 0x0C;
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, value);
/* Set BBP R69=0x1A */
value = 0x1A;
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, value);
/* Set BBP R70=0x0A */
value = 0x0A;
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, value);
/* Set BBP R73=0x16 */
value = 0x16;
ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, value);
}
return TRUE;
}
INT RT28xxATETxPwrHandler(
IN PRTMP_ADAPTER pAd,
IN char index)
{
PATE_INFO pATEInfo = &(pAd->ate);
ULONG R;
CHAR TxPower = 0;
UCHAR Bbp94 = 0;
BOOLEAN bPowerReduce = FALSE;
#ifdef RALINK_QA
if ((pATEInfo->bQATxStart == TRUE) || (pATEInfo->bQARxStart == TRUE))
{
#ifdef RELEASE_EXCLUDE
/*
When QA is used for Tx, pATEInfo->TxPower0/1 and real tx power
are not synchronized.
*/
#endif /* RELEASE_EXCLUDE */
return 0;
}
else
#endif /* RALINK_QA */
if (index == 0)
{
TxPower = pATEInfo->TxPower0;
}
else if (index == 1)
{
TxPower = pATEInfo->TxPower1;
}
else
{
DBGPRINT_ERR(("%s : Only TxPower0 and TxPower1 are adjustable !\n", __FUNCTION__));
DBGPRINT_ERR(("%s : TxPower%d is out of range !\n", __FUNCTION__, index));
return -1;
}
if (pATEInfo->Channel <= 14)
{
if (TxPower > 31)
{
/* R3, R4 can't large than 31 (0x24), 31 ~ 36 used by BBP 94 */
R = 31;
if (TxPower <= 36)
Bbp94 = BBPR94_DEFAULT + (UCHAR)(TxPower - 31);
}
else if (TxPower < 0)
{
/* R3, R4 can't less than 0, -1 ~ -6 used by BBP 94 */
R = 0;
if (TxPower >= -6)
Bbp94 = BBPR94_DEFAULT + TxPower;
}
else
{
/* 0 ~ 31 */
R = (ULONG) TxPower;
Bbp94 = BBPR94_DEFAULT;
}
DBGPRINT(RT_DEBUG_TRACE, ("%s : (TxPower=%d, R=%ld, BBP_R94=%d)\n", __FUNCTION__, TxPower, R, Bbp94));
}
else /* 5.5 GHz */
{
if (TxPower > 15)
{
/* R3, R4 can't large than 15 (0x0F) */
R = 15;
}
else if (TxPower < 0)
{
/* R3, R4 can't less than 0 */
/* -1 ~ -7 */
ASSERT((TxPower >= -7));
R = (ULONG)(TxPower + 7);
bPowerReduce = TRUE;
}
else
{
/* 0 ~ 15 */
R = (ULONG) TxPower;
}
DBGPRINT(RT_DEBUG_TRACE, ("%s : (TxPower=%d, R=%lu)\n", __FUNCTION__, TxPower, R));
}
if (pATEInfo->Channel <= 14)
{
if (index == 0)
{
/* shift TX power control to correct RF(R3) register bit position */
R = R << 9;
R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
pAd->LatchRfRegs.R3 = R;
}
else
{
/* shift TX power control to correct RF(R4) register bit position */
R = R << 6;
R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
pAd->LatchRfRegs.R4 = R;
}
}
else /* 5.5GHz */
{
if (bPowerReduce == FALSE)
{
if (index == 0)
{
/* shift TX power control to correct RF(R3) register bit position */
R = (R << 10) | (1 << 9);
R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
pAd->LatchRfRegs.R3 = R;
}
else
{
/* shift TX power control to correct RF(R4) register bit position */
R = (R << 7) | (1 << 6);
R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
pAd->LatchRfRegs.R4 = R;
}
}
else
{
if (index == 0)
{
/* shift TX power control to correct RF(R3) register bit position */
R = (R << 10);
R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
/* Clear bit 9 of R3 to reduce 7dB. */
pAd->LatchRfRegs.R3 = (R & (~(1 << 9)));
}
else
{
/* shift TX power control to correct RF(R4) register bit position */
R = (R << 7);
R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
/* Clear bit 6 of R4 to reduce 7dB. */
pAd->LatchRfRegs.R4 = (R & (~(1 << 6)));
}
}
}
RtmpRfIoWrite(pAd);
return 0;
}
/*
========================================================================
Routine Description: Write RT30xx RF register through MAC
Arguments:
Return Value:
IRQL =
Note:
========================================================================
*/
NDIS_STATUS RT30xxWriteRFRegister(
IN PRTMP_ADAPTER pAd,
IN UCHAR regID,
IN UCHAR value)
{
RF_CSR_CFG_STRUC rfcsr = { { 0 } };
UINT i = 0;
#ifdef RTMP_MAC_PCI
if ((pAd->bPCIclkOff == TRUE) || (pAd->LastMCUCmd == SLEEP_MCU_CMD))
{
DBGPRINT_ERR(("RT30xxWriteRFRegister. Not allow to write RF 0x%x : fail\n", regID));
return STATUS_UNSUCCESSFUL;
}
#endif /* RTMP_MAC_PCI */
ASSERT((regID <= pAd->chipCap.MaxNumOfRfId));
do
{
RTMP_IO_READ32(pAd, RF_CSR_CFG, &rfcsr.word);
if (!rfcsr.field.RF_CSR_KICK)
break;
i++;
}
while ((i < MAX_BUSY_COUNT) && (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)));
if ((i == MAX_BUSY_COUNT) || (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST)))
{
DBGPRINT_RAW(RT_DEBUG_ERROR, ("Retry count exhausted or device removed!!!\n"));
return STATUS_UNSUCCESSFUL;
}
rfcsr.field.RF_CSR_WR = 1;
rfcsr.field.RF_CSR_KICK = 1;
rfcsr.field.TESTCSR_RFACC_REGNUM = regID;
if ((pAd->chipCap.RfReg17WtMethod == RF_REG_WT_METHOD_STEP_ON) && (regID == RF_R17))
{
UCHAR IdRf;
UCHAR RfValue;
BOOLEAN beAdd;
RT30xxReadRFRegister(pAd, RF_R17, &RfValue);
beAdd = (RfValue < value) ? TRUE : FALSE;
IdRf = RfValue;
while(IdRf != value)
{
if (beAdd)
IdRf++;
else
IdRf--;
rfcsr.field.RF_CSR_DATA = IdRf;
RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
RtmpOsMsDelay(1);
}
}
rfcsr.field.RF_CSR_DATA = value;
RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
return NDIS_STATUS_SUCCESS;
}
/*
========================================================================
Routine Description: Read RF register through MAC
Arguments:
Return Value:
IRQL =
Note:
========================================================================
*/
NDIS_STATUS rlt_rf_read(
IN RTMP_ADAPTER *pAd,
IN UCHAR bank,
IN UCHAR regID,
IN UCHAR *pValue)
{
RF_CSR_CFG_STRUC rfcsr = { { 0 } };
UINT i=0, k=0;
BOOLEAN rf_status;
NDIS_STATUS ret = STATUS_UNSUCCESSFUL;
#ifdef MT76x0
if (IS_MT7610U(pAd)) {
BANK_RF_REG_PAIR reg;
reg.Bank = bank;
reg.Register = regID;
RF_RANDOM_READ(pAd, ®, 1);
*pValue = reg.Value;
return NDIS_STATUS_SUCCESS;
}
#endif /* MT76x0 */
#ifdef RTMP_MAC_PCI
if ((pAd->bPCIclkOff == TRUE) || (pAd->LastMCUCmd == SLEEP_MCU_CMD))
{
DBGPRINT_ERR(("RT30xxReadRFRegister. Not allow to read RF 0x%x : fail\n", regID));
return STATUS_UNSUCCESSFUL;
}
#endif /* RTMP_MAC_PCI */
#ifdef RTMP_MAC_USB
if (IS_USB_INF(pAd)) {
RTMP_SEM_EVENT_WAIT(&pAd->reg_atomic, i);
if (i != 0) {
DBGPRINT(RT_DEBUG_ERROR, ("reg_atomic get failed(ret=%d)\n", i));
return STATUS_UNSUCCESSFUL;
}
}
#endif /* RTMP_MAC_USB */
ASSERT((regID <= pAd->chipCap.MaxNumOfRfId));
rfcsr.word = 0;
for (i=0; i<MAX_BUSY_COUNT; i++)
{
if(RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
goto done;
rf_status = rf_csr_poll_idle(pAd, &rfcsr.word);
if ( rf_status == BUSY)
break;
rfcsr.word = 0;
#ifdef RT6352
if (IS_RT6352(pAd))
{
rfcsr.bank_6352.RF_CSR_WR = 0;
rfcsr.bank_6352.RF_CSR_KICK = 1;
rfcsr.bank_6352.TESTCSR_RFACC_REGNUM = (regID | (bank << 6));
}
else
#endif /* RT6352 */
#ifdef RT65xx
if (IS_RT65XX(pAd)) {
rfcsr.bank_65xx.RF_CSR_WR = 0;
rfcsr.bank_65xx.RF_CSR_KICK = 1;
rfcsr.bank_65xx.RF_CSR_REG_ID = regID;
rfcsr.bank_65xx.RF_CSR_REG_BANK = bank;
}
else
#endif /* RT65xx */
{
DBGPRINT_ERR(("RF[%d] read function for non-supported chip[0x%x]\n", regID, pAd->MACVersion));
break;
}
RTMP_IO_WRITE32(pAd, RF_CSR_CFG, rfcsr.word);
rf_status = rf_csr_poll_idle(pAd, &rfcsr.word);
if (rf_status == IDLE)
{
#ifdef RT6352
if (IS_RT6352(pAd) && ((rfcsr.bank_6352.TESTCSR_RFACC_REGNUM & 0x3F) == regID))
{
*pValue = (UCHAR)(rfcsr.bank_6352.RF_CSR_DATA);
break;
}
#endif /* RT6352 */
#ifdef RT65xx
if (IS_RT65XX(pAd) && (rfcsr.bank_65xx.RF_CSR_REG_ID == regID) &&
(rfcsr.bank_65xx.RF_CSR_REG_BANK == bank))
{
*pValue = (UCHAR)(rfcsr.bank_65xx.RF_CSR_DATA);
break;
}
#endif /* RT65xx */
}
}
if (rf_status == BUSY)
{
DBGPRINT_ERR(("RF read R%d=0x%X fail, i[%d], k[%d]\n", regID, rfcsr.word,i,k));
goto done;
}
ret = STATUS_SUCCESS;
#if 0
if (bank >= RF_BANK4)
{
printk("TESTCSR_RFACC_REGNUM = %x, RF_CSR_DATA = %x !!!\n", rfcsr.field.TESTCSR_RFACC_REGNUM, rfcsr.field.RF_CSR_DATA);
}
#endif
done:
#ifdef RTMP_MAC_USB
if (IS_USB_INF(pAd)) {
RTMP_SEM_EVENT_UP(&pAd->reg_atomic);
}
#endif /* RTMP_MAC_USB */
return ret;
}
BOOLEAN AUTH_ReqSend(
IN PRTMP_ADAPTER pAd,
IN PMLME_QUEUE_ELEM pElem,
IN PRALINK_TIMER_STRUCT pAuthTimer,
IN PSTRING pSMName,
IN USHORT SeqNo,
IN PUCHAR pNewElement,
IN ULONG ElementLen)
{
USHORT Alg, Seq, Status;
UCHAR Addr[6];
ULONG Timeout;
HEADER_802_11 AuthHdr;
BOOLEAN TimerCancelled;
NDIS_STATUS NStatus;
PUCHAR pOutBuffer = NULL;
ULONG FrameLen = 0, tmp = 0;
/* Block all authentication request durning WPA block period */
if (pAd->StaCfg.bBlockAssoc == TRUE) {
DBGPRINT(RT_DEBUG_TRACE,
("%s - Block Auth request durning WPA block period!\n",
pSMName));
pAd->Mlme.AuthMachine.CurrState = AUTH_REQ_IDLE;
Status = MLME_STATE_MACHINE_REJECT;
MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_AUTH_CONF, 2,
&Status, 0);
} else
if (MlmeAuthReqSanity
(pAd, pElem->Msg, pElem->MsgLen, Addr, &Timeout, &Alg)) {
/* reset timer */
RTMPCancelTimer(pAuthTimer, &TimerCancelled);
COPY_MAC_ADDR(pAd->MlmeAux.Bssid, Addr);
pAd->MlmeAux.Alg = Alg;
Seq = SeqNo;
Status = MLME_SUCCESS;
NStatus = MlmeAllocateMemory(pAd, &pOutBuffer); /*Get an unused nonpaged memory */
if (NStatus != NDIS_STATUS_SUCCESS) {
DBGPRINT(RT_DEBUG_TRACE,
("%s - MlmeAuthReqAction(Alg:%d) allocate memory failed\n",
pSMName, Alg));
pAd->Mlme.AuthMachine.CurrState = AUTH_REQ_IDLE;
Status = MLME_FAIL_NO_RESOURCE;
MlmeEnqueue(pAd, MLME_CNTL_STATE_MACHINE, MT2_AUTH_CONF,
2, &Status, 0);
return FALSE;
}
DBGPRINT(RT_DEBUG_TRACE,
("%s - Send AUTH request seq#1 (Alg=%d)...\n", pSMName,
Alg));
MgtMacHeaderInit(pAd, &AuthHdr, SUBTYPE_AUTH, 0, Addr,
#ifdef P2P_SUPPORT
pAd->CurrentAddress,
#endif /* P2P_SUPPORT */
pAd->MlmeAux.Bssid);
MakeOutgoingFrame(pOutBuffer, &FrameLen, sizeof (HEADER_802_11),
&AuthHdr, 2, &Alg, 2, &Seq, 2, &Status,
END_OF_ARGS);
if (pNewElement && ElementLen) {
MakeOutgoingFrame(pOutBuffer + FrameLen, &tmp,
ElementLen, pNewElement, END_OF_ARGS);
FrameLen += tmp;
}
MiniportMMRequest(pAd, 0, pOutBuffer, FrameLen);
MlmeFreeMemory(pAd, pOutBuffer);
RTMPSetTimer(pAuthTimer, Timeout);
return TRUE;
} else {
DBGPRINT_ERR(("%s - MlmeAuthReqAction() sanity check failed\n",
pSMName));
return FALSE;
}
return TRUE;
}
RTMP_BUILD_DRV_OPS_FUNCTION_BODY
#endif /* OS_ABL_FUNC_SUPPORT */
#endif /* LINUX */
int rt28xx_init(
IN VOID *pAdSrc,
IN PSTRING pDefaultMac,
IN PSTRING pHostName)
{
PRTMP_ADAPTER pAd = (PRTMP_ADAPTER)pAdSrc;
UINT index;
UCHAR TmpPhy;
NDIS_STATUS Status;
if (pAd == NULL)
return FALSE;
#ifdef CONFIG_STA_SUPPORT
#ifdef PCIE_PS_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
/* If dirver doesn't wake up firmware here,*/
/* NICLoadFirmware will hang forever when interface is up again.*/
if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) &&
OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_ADVANCE_POWER_SAVE_PCIE_DEVICE))
{
AUTO_WAKEUP_STRUC AutoWakeupCfg;
AsicForceWakeup(pAd, TRUE);
AutoWakeupCfg.word = 0;
RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG, AutoWakeupCfg.word);
OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
}
}
#endif /* PCIE_PS_SUPPORT */
#endif /* CONFIG_STA_SUPPORT */
/* reset Adapter flags*/
RTMP_CLEAR_FLAGS(pAd);
/* Init BssTab & ChannelInfo tabbles for auto channel select.*/
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
/*#ifdef AUTO_CH_SELECT_ENHANCE*/
AutoChBssTableInit(pAd);
ChannelInfoInit(pAd);
/*#endif AUTO_CH_SELECT_ENHANCE */
}
#endif /* CONFIG_AP_SUPPORT */
#ifdef DOT11_N_SUPPORT
/* Allocate BA Reordering memory*/
if (ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM) != TRUE)
goto err1;
#endif /* DOT11_N_SUPPORT */
/* Make sure MAC gets ready.*/
index = 0;
if (WaitForAsicReady(pAd) != TRUE)
goto err1;
DBGPRINT(RT_DEBUG_TRACE, ("MAC[Ver:Rev=0x%08x]\n", pAd->MACVersion));
if (MAX_LEN_OF_MAC_TABLE > MAX_AVAILABLE_CLIENT_WCID(pAd))
{
DBGPRINT(RT_DEBUG_ERROR, ("MAX_LEN_OF_MAC_TABLE can not be larger than MAX_AVAILABLE_CLIENT_WCID!!!!\n"));
goto err1;
}
#ifdef RTMP_MAC_PCI
/* To fix driver disable/enable hang issue when radio off*/
RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x2);
#endif /* RTMP_MAC_PCI */
/* Disable DMA*/
RT28XXDMADisable(pAd);
/* Load 8051 firmware*/
Status = NICLoadFirmware(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status));
goto err1;
}
NICLoadRateSwitchingParams(pAd);
/* Disable interrupts here which is as soon as possible*/
/* This statement should never be true. We might consider to remove it later*/
#ifdef RTMP_MAC_PCI
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE))
{
RTMP_ASIC_INTERRUPT_DISABLE(pAd);
}
#endif /* RTMP_MAC_PCI */
#ifdef RESOURCE_PRE_ALLOC
Status = RTMPInitTxRxRingMemory(pAd);
#else
Status = RTMPAllocTxRxRingMemory(pAd);
#endif /* RESOURCE_PRE_ALLOC */
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("RTMPAllocTxRxMemory failed, Status[=0x%08x]\n", Status));
goto err2;
}
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
/* initialize MLME*/
#ifdef RT6352
pAd->bCalibrationDone = FALSE;
#endif /* RT6352 */
Status = RtmpMgmtTaskInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
goto err3;
Status = MlmeInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status));
goto err4;
}
#ifdef RMTP_RBUS_SUPPORT
#ifdef VIDEO_TURBINE_SUPPORT
VideoConfigInit(pAd);
#endif /* VIDEO_TURBINE_SUPPORT */
#endif /* RMTP_RBUS_SUPPORT */
/* Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default*/
UserCfgInit(pAd);
Status = RtmpNetTaskInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
goto err5;
/* COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr);*/
/* pAd->bForcePrintTX = TRUE;*/
CfgInitHook(pAd);
#ifdef CONFIG_AP_SUPPORT
if ((pAd->OpMode == OPMODE_AP)
#ifdef P2P_SUPPORT
|| TRUE
#endif /* P2P_SUPPORT */
)
APInitialize(pAd);
#endif /* CONFIG_AP_SUPPORT */
#ifdef BLOCK_NET_IF
initblockQueueTab(pAd);
#endif /* BLOCK_NET_IF */
Status = MeasureReqTabInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("MeasureReqTabInit failed, Status[=0x%08x]\n",Status));
goto err6;
}
Status = TpcReqTabInit(pAd);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("TpcReqTabInit failed, Status[=0x%08x]\n",Status));
goto err6;
}
/* Init the hardware, we need to init asic before read registry, otherwise mac register will be reset*/
Status = NICInitializeAdapter(pAd, TRUE);
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status));
if (Status != NDIS_STATUS_SUCCESS)
goto err6;
}
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
}
#endif /* CONFIG_AP_SUPPORT */
/* Read parameters from Config File */
/* unknown, it will be updated in NICReadEEPROMParameters */
pAd->RfIcType = RFIC_UNKNOWN;
Status = RTMPReadParametersHook(pAd);
if(pAd->CommonCfg.Channel==0)
{
RTMPSetDefaultChannel(pAd);
}
#ifdef CONFIG_STA_SUPPORT
#ifdef CREDENTIAL_STORE
RecoverConnectInfo(pAd);
#endif /* CREDENTIAL_STORE */
#endif /* CONFIG_STA_SUPPORT */
DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
if (Status != NDIS_STATUS_SUCCESS)
{
DBGPRINT_ERR(("RTMPReadParametersHook failed, Status[=0x%08x]\n",Status));
goto err6;
}
#ifdef DOT11_N_SUPPORT
/*Init Ba Capability parameters.*/
/* RT28XX_BA_INIT(pAd);*/
pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable;
pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
/* UPdata to HT IE*/
pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
#endif /* DOT11_N_SUPPORT */
/* after reading Registry, we now know if in AP mode or STA mode*/
/* Load 8051 firmware; crash when FW image not existent*/
/* Status = NICLoadFirmware(pAd);*/
/* if (Status != NDIS_STATUS_SUCCESS)*/
/* break;*/
DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
/* We should read EEPROM for all cases. rt2860b*/
NICReadEEPROMParameters(pAd, (PSTRING)pDefaultMac);
#ifdef CONFIG_STA_SUPPORT
#endif /* CONFIG_STA_SUPPORT */
DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
#ifdef LED_CONTROL_SUPPORT
/* Send LED Setting to MCU */
RTMPInitLEDMode(pAd);
#endif /* LED_CONTROL_SUPPORT */
NICInitAsicFromEEPROM(pAd); /* rt2860b */
#ifdef RT6352
if (IS_RT6352(pAd))
{
RtmpKickOutHwNullFrame(pAd, TRUE, FALSE);
#if defined(RT6352_EP_SUPPORT) || defined(RT6352_EL_SUPPORT)
{
ULONG SysRegValue;
RTMP_SYS_IO_READ32(0xb0000060, &SysRegValue);
if ((SysRegValue & 0x100000) == 0x0)
{
SysRegValue |= 0x100000;
RTMP_SYS_IO_WRITE32(0xb0000060, SysRegValue);
DBGPRINT(RT_DEBUG_ERROR,("Change as GPIO Mode(0x%x)\n", SysRegValue));
}
}
#endif /* defined(RT6352_EP_SUPPORT) || defined(RT6352_EL_SUPPORT) */
/* Do R-Calibration */
R_Calibration(pAd);
#ifdef RTMP_TEMPERATURE_CALIBRATION
/* Temperature Init */
RT6352_Temperature_Init(pAd);
RT6352_TemperatureCalibration(pAd);
#endif /* RTMP_TEMPERATURE_CALIBRATION */
#ifdef RTMP_TEMPERATURE_COMPENSATION
/*
read out tempature reference value (0x80 ~ 0x7F)
TssiPlusBoundaryG [7] [6] [5] [4] [3] [2] [1] [0] (smaller) +
TssiMinusBoundaryG[0] [1] [2] [3] [4] [5] [6] [7] (larger)
*/
RT6352_EEPROM_TSSI_24G_READ(pAd);
/*
pAd->TssiCalibratedOffset:
reference temperature(e2p[D1h])
*/
/* adjust the boundary table by pAd->TssiCalibratedOffset */
RT6352_TssiTableAdjust(pAd);
/* ATE temperature(e2p[77h]) */
RT6352_TssiMpAdjust(pAd);
DBGPRINT(RT_DEBUG_OFF,("E2PROM: G Tssi[-7 .. +7] = %d %d %d %d %d %d %d - %d - %d %d %d %d %d %d %d, offset=%d, tuning=%d\n",
pAd->TssiMinusBoundaryG[7], pAd->TssiMinusBoundaryG[6], pAd->TssiMinusBoundaryG[5],
pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
pAd->TssiRefG,
pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
pAd->TssiPlusBoundaryG[5], pAd->TssiPlusBoundaryG[6], pAd->TssiPlusBoundaryG[7],
pAd->TssiCalibratedOffset, pAd->bAutoTxAgcG));
#endif /* RTMP_TEMPERATURE_COMPENSATION */
AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, TRUE);
AsicLockChannel(pAd, pAd->CommonCfg.Channel);
/* RF Self TX DC Calibration */
RF_SELF_TXDC_CAL(pAd);
/* Rx DCOC Calibration */
RxDCOC_Calibration(pAd);
/* BandWidth Filter Calibration */
BW_Filter_Calibration(pAd,TRUE);
BW_Filter_Calibration(pAd,FALSE);
/* Do LOFT and IQ Calibration */
LOFT_IQ_Calibration(pAd);
/* DPD_Calibration */
#ifdef RT6352_EP_SUPPORT
if (pAd->bExtPA == FALSE)
#endif /* RT6352_EP_SUPPORT */
{
DoDPDCalibration(pAd);
pAd->DoDPDCurrTemperature = 0x7FFFFFFF;
}
/* Rx DCOC Calibration */
RxDCOC_Calibration(pAd);
/* Do RXIQ Calibration */
RXIQ_Calibration(pAd);
#if defined(RT6352_EP_SUPPORT) || defined(RT6352_EL_SUPPORT)
RT6352_Init_ExtPA_ExtLNA(pAd, FALSE);
#endif /* defined(RT6352_EP_SUPPORT) || defined(RT6352_EL_SUPPORT) */
}
#endif /* RT6352 */
#ifdef RALINK_ATE
if (ATEInit(pAd) != NDIS_STATUS_SUCCESS)
{
DBGPRINT(RT_DEBUG_ERROR, ("%s(): ATE initialization failed !\n", __FUNCTION__));
goto err6;
}
#endif /* RALINK_ATE */
#ifdef RTMP_INTERNAL_TX_ALC
/* Initialize the desired TSSI table*/
RTMP_CHIP_ASIC_TSSI_TABLE_INIT(pAd);
#endif /* RTMP_INTERNAL_TX_ALC */
InitRfPaModeTable(pAd);
#ifdef RTMP_TEMPERATURE_COMPENSATION
/* Temperature compensation, initialize the lookup table */
DBGPRINT(RT_DEBUG_OFF, ("bAutoTxAgcG = %d\n", pAd->bAutoTxAgcG));
if (pAd->chipCap.bTempCompTxALC && pAd->bAutoTxAgcG)
InitLookupTable(pAd);
#endif /* RTMP_TEMPERATURE_COMPENSATION */
/* Set PHY to appropriate mode*/
TmpPhy = pAd->CommonCfg.PhyMode;
pAd->CommonCfg.PhyMode = 0xff;
RTMPSetPhyMode(pAd, TmpPhy);
#ifdef DOT11_N_SUPPORT
SetCommonHT(pAd);
#endif /* DOT11_N_SUPPORT */
/* No valid channels.*/
if (pAd->ChannelListNum == 0)
{
DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n"));
goto err6;
}
#ifdef DOT11_N_SUPPORT
DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0],
pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2],
pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4]));
#endif /* DOT11_N_SUPPORT */
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
#ifdef AP_QLOAD_SUPPORT
/* init QBSS Element */
QBSS_LoadInit(pAd);
#endif /* AP_QLOAD_SUPPORT */
}
#endif /* CONFIG_AP_SUPPORT */
/* APInitialize(pAd);*/
#ifdef IKANOS_VX_1X0
VR_IKANOS_FP_Init(pAd->ApCfg.BssidNum, pAd->PermanentAddress);
#endif /* IKANOS_VX_1X0 */
#ifdef RALINK_ATE
#endif /* RALINK_ATE */
#ifdef CONFIG_AP_SUPPORT
/* Initialize RF register to default value*/
if (pAd->OpMode == OPMODE_AP)
{
AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
AsicLockChannel(pAd, pAd->CommonCfg.Channel);
}
#endif /* CONFIG_AP_SUPPORT */
#ifdef RTMP_INTERNAL_TX_ALC
#ifdef RT6352
if (IS_RT6352(pAd) && (pAd->TxPowerCtrl.bInternalTxALC == TRUE))
{
RT635xTssiDcCalibration(pAd);
}
#endif /* RT6352 */
#endif /* RTMP_INTERNAL_TX_ALC */
/*
Some modules init must be called before APStartUp().
Or APStartUp() will make up beacon content and call
other modules API to get some information to fill.
*/
if (pAd && (Status != NDIS_STATUS_SUCCESS))
{
/* Undo everything if it failed*/
if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
{
/* NdisMDeregisterInterrupt(&pAd->Interrupt);*/
RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
}
/* RTMPFreeAdapter(pAd); we will free it in disconnect()*/
}
else if (pAd)
{
/* Microsoft HCT require driver send a disconnect event after driver initialization.*/
OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
OPSTATUS_CLEAR_FLAG(pAd, fOP_AP_STATUS_MEDIA_STATE_CONNECTED);
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE);
DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n"));
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
if (pAd->ApCfg.bAutoChannelAtBootup || (pAd->CommonCfg.Channel == 0))
{
UINT8 BBPValue = 0;
/* Enable Interrupt first due to we need to scan channel to receive beacons.*/
RTMP_IRQ_ENABLE(pAd);
/* Now Enable RxTx*/
RTMPEnableRxTx(pAd);
RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_START_UP);
/* Let BBP register at 20MHz to do scan */
RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
BBPValue &= (~0x18);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
DBGPRINT(RT_DEBUG_ERROR, ("SYNC - BBP R4 to 20MHz.l\n"));
/* Now we can receive the beacon and do the listen beacon*/
/* use default BW to select channel*/
pAd->CommonCfg.Channel = AP_AUTO_CH_SEL(pAd, pAd->ApCfg.AutoChannelAlg);
pAd->ApCfg.bAutoChannelAtBootup = FALSE;
}
#ifdef DOT11_N_SUPPORT
/* If phymode > PHY_11ABGN_MIXED and BW=40 check extension channel, after select channel */
N_ChannelCheck(pAd);
#ifdef DOT11N_DRAFT3
/*
We only do this Overlapping BSS Scan when system up, for the
other situation of channel changing, we depends on station's
report to adjust ourself.
*/
if (pAd->CommonCfg.bForty_Mhz_Intolerant == TRUE)
{
DBGPRINT(RT_DEBUG_TRACE, ("Disable 20/40 BSSCoex Channel Scan(BssCoex=%d, 40MHzIntolerant=%d)\n",
pAd->CommonCfg.bBssCoexEnable,
pAd->CommonCfg.bForty_Mhz_Intolerant));
}
else if(pAd->CommonCfg.bBssCoexEnable == TRUE)
{
DBGPRINT(RT_DEBUG_TRACE, ("Enable 20/40 BSSCoex Channel Scan(BssCoex=%d)\n",
pAd->CommonCfg.bBssCoexEnable));
APOverlappingBSSScan(pAd);
}
RTMP_11N_D3_TimerInit(pAd);
/* RTMPInitTimer(pAd, &pAd->CommonCfg.Bss2040CoexistTimer, GET_TIMER_FUNCTION(Bss2040CoexistTimeOut), pAd, FALSE);*/
#endif /* DOT11N_DRAFT3 */
#endif /* DOT11_N_SUPPORT */
APStartUp(pAd);
DBGPRINT(RT_DEBUG_OFF, ("Main bssid = %02x:%02x:%02x:%02x:%02x:%02x\n",
PRINT_MAC(pAd->ApCfg.MBSSID[BSS0].Bssid)));
}
#endif /* CONFIG_AP_SUPPORT */
#ifdef RT6352
pAd->bCalibrationDone = TRUE;
if (IS_RT6352(pAd))
{
#ifdef DYNAMIC_VGA_SUPPORT
if (pAd->CommonCfg.MO_Cfg.bDyncVGAEnable)
{
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R195, 0x83);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R196, 0x70);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R195, 0x86);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R196, 0x70);
}
#endif /* DYNAMIC_VGA_SUPPORT */
}
#endif /* RT6352 */
}/* end of else*/
/* Set up the Mac address*/
#ifdef CONFIG_AP_SUPPORT
#ifndef P2P_APCLI_SUPPORT
RtmpOSNetDevAddrSet(pAd->OpMode, pAd->net_dev, &pAd->CurrentAddress[0], NULL);
#endif /* P2P_APCLI_SUPPORT */
#endif /* CONFIG_AP_SUPPORT */
#ifdef CONFIG_STA_SUPPORT
RtmpOSNetDevAddrSet(pAd->OpMode, pAd->net_dev, &pAd->CurrentAddress[0], (PUCHAR)(pAd->StaCfg.dev_name));
#endif /* CONFIG_STA_SUPPORT */
/* Various AP function init*/
#ifdef CONFIG_AP_SUPPORT
#ifdef P2P_SUPPORT
#else
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
#endif /* P2P_SUPPORT */
{
#ifdef MBSS_SUPPORT
/* the function can not be moved to RT2860_probe() even register_netdev()
is changed as register_netdevice().
Or in some PC, kernel will panic (Fedora 4) */
/* RT28xx_MBSS_Init(pAd, pAd->net_dev); os abl move to rt_main_dev.c*/
#endif /* MBSS_SUPPORT */
#ifdef WDS_SUPPORT
/* RT28xx_WDS_Init(pAd, pAd->net_dev);*/
#endif /* WDS_SUPPORT */
#ifdef APCLI_SUPPORT
/* RT28xx_ApCli_Init(pAd, pAd->net_dev);*/
#endif /* APCLI_SUPPORT */
}
#endif /* CONFIG_AP_SUPPORT */
#ifdef UAPSD_SUPPORT
UAPSD_Init(pAd);
#endif /* UAPSD_SUPPORT */
/* assign function pointers*/
#ifdef MAT_SUPPORT
/* init function pointers, used in OS_ABL */
RTMP_MATOpsInit(pAd);
#endif /* MAT_SUPPORT */
#ifdef RTMP_RBUS_SUPPORT
if (pAd->infType == RTMP_DEV_INF_RBUS)
{
#ifdef VIDEO_TURBINE_SUPPORT
VideoTurbineDynamicTune(pAd);
#endif /* VIDEO_TURBINE_SUPPORT */
#ifdef RT3XXX_ANTENNA_DIVERSITY_SUPPORT
RT3XXX_AntDiversity_Init(pAd);
#endif /* RT3XXX_ANTENNA_DIVERSITY_SUPPORT */
}
#endif /* RTMP_RBUS_SUPPORT */
#ifdef P2P_SUPPORT
/* RTMP_P2P_Init(pAd, pAd->net_dev); */
#endif /* P2P_SUPPORT */
#ifdef CONFIG_AP_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_AP(pAd)
{
#ifdef MAT_SUPPORT
MATEngineInit(pAd);
#endif /* MAT_SUPPORT */
#ifdef CLIENT_WDS
CliWds_ProxyTabInit(pAd);
#endif /* CLIENT_WDS */
}
#endif /* CONFIG_AP_SUPPORT */
#ifdef CONFIG_STA_SUPPORT
IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
{
#ifdef DOT11Z_TDLS_SUPPORT
TDLS_Table_Init(pAd);
#endif /* DOT11Z_TDLS_SUPPORT */
#ifdef WPA_SUPPLICANT_SUPPORT
#ifndef NATIVE_WPA_SUPPLICANT_SUPPORT
/* send wireless event to wpa_supplicant for infroming interface up.*/
RtmpOSWrielessEventSend(pAd->net_dev, RT_WLAN_EVENT_CUSTOM, RT_INTERFACE_UP, NULL, NULL, 0);
#endif /* NATIVE_WPA_SUPPLICANT_SUPPORT */
#endif /* WPA_SUPPLICANT_SUPPORT */
}
#endif /* CONFIG_STA_SUPPORT */
/* auto-fall back settings */
RTMP_IO_WRITE32(pAd, HT_FBK_CFG1, 0xedcba980); /* Fallback MCS8->MCS0 */
#ifdef DOT11N_SS3_SUPPORT
if (pAd->CommonCfg.TxStream >= 3)
{
RTMP_IO_WRITE32(pAd, TX_FBK_CFG_3S_0, 0x12111008);
RTMP_IO_WRITE32(pAd, TX_FBK_CFG_3S_1, 0x16151413);
}
#endif /* DOT11N_SS3_SUPPORT */
#ifdef STREAM_MODE_SUPPORT
RtmpStreamModeInit(pAd);
#endif /* STREAM_MODE_SUPPORT */
#if defined(RT2883) || defined(RT3883)
if (IS_RT2883(pAd) || IS_RT3883(pAd))
{
UINT8 BBPValue = 0;
BBP_IO_READ8_BY_REG_ID(pAd, BBP_R65, &BBPValue);
if (pAd->CommonCfg.FineAGC)
BBPValue |= 0x40; /* turn on fine AGC*/
else
BBPValue &= ~0x40; /* turn off fine AGC*/
BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R65, BBPValue);
}
#endif /* defined(RT2883) || defined(RT3883) */
#ifdef DOT11_N_SUPPORT
#ifdef TXBF_SUPPORT
if (pAd->CommonCfg.ITxBfTimeout)
{
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R179, 0x02);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R180, 0);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R182, pAd->CommonCfg.ITxBfTimeout & 0xFF);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R180, 1);
RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R182, (pAd->CommonCfg.ITxBfTimeout>>8) & 0xFF);
}
VOID RTMP_BBP_IO_WRITE8(
RTMP_ADAPTER *pAd,
UCHAR bbp_id,
UINT8 Value,
BOOLEAN bViaMCU)
{
BBP_CSR_CFG_STRUC BbpCsr;
int _busyCnt=0, _regID;
BOOLEAN brc;
ULONG __IrqFlags = 0;
#ifdef RT65xx
if (IS_RT65XX(pAd))
return;
#endif /* RT65xx */
if (bViaMCU == TRUE)
RTMP_MAC_SHR_MSEL_PROTECT_LOCK(pAd, __IrqFlags);
_regID = (bViaMCU == TRUE ? H2M_BBP_AGENT : BBP_CSR_CFG);
for (_busyCnt=1; _busyCnt<MAX_BUSY_COUNT; _busyCnt++)
{
RTMP_IO_READ32((pAd), _regID, &BbpCsr.word);
if (BbpCsr.field.Busy == BUSY)
{
if ( (bViaMCU == TRUE) && ((_busyCnt % 20) == 0))
{
BbpCsr.field.Busy = IDLE;
RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, BbpCsr.word);
}
continue;
}
BbpCsr.word = 0;
BbpCsr.field.fRead = 0;
BbpCsr.field.BBP_RW_MODE = 1;
BbpCsr.field.Busy = 1;
BbpCsr.field.Value = Value;
BbpCsr.field.RegNum = bbp_id;
RTMP_IO_WRITE32((pAd), _regID, BbpCsr.word);
if (bViaMCU == TRUE)
{
brc = AsicSendCommandToMcuBBP(pAd, 0x80, 0xff, 0x0, 0x0, FALSE);
if (pAd->OpMode == OPMODE_AP)
RtmpusecDelay(1000);
if (brc == FALSE)
{
BbpCsr.field.Busy = IDLE;
RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, BbpCsr.word);
}
}
pAd->BbpWriteLatch[bbp_id] = Value;
break;
}
if (_busyCnt == MAX_BUSY_COUNT)
{
DBGPRINT_ERR(("BBP write R%d fail\n", bbp_id));
if(bViaMCU == TRUE)
{
RTMP_IO_READ32(pAd, H2M_BBP_AGENT, &BbpCsr.word);
BbpCsr.field.Busy = 0;
RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, BbpCsr.word);
}
}
if (bViaMCU == TRUE)
RTMP_MAC_SHR_MSEL_PROTECT_UNLOCK(pAd, __IrqFlags);
}
VOID RTMP_BBP_IO_READ8(
PRTMP_ADAPTER pAd,
UCHAR bbp_id,
UINT8 *pValue,
BOOLEAN bViaMCU)
{
BBP_CSR_CFG_STRUC BbpCsr;
int _busyCnt, _secCnt, _regID;
ULONG __IrqFlags = 0;
#ifdef RT65xx
if (IS_RT65XX(pAd))
return;
#endif /* RT65xx */
if ((bViaMCU) == TRUE)
RTMP_MAC_SHR_MSEL_PROTECT_LOCK(pAd, __IrqFlags);
_regID = ((bViaMCU) == TRUE ? H2M_BBP_AGENT : BBP_CSR_CFG);
for (_busyCnt=0; _busyCnt<MAX_BUSY_COUNT; _busyCnt++)
{
RTMP_IO_READ32(pAd, _regID, &BbpCsr.word);
if (BbpCsr.field.Busy == BUSY)
continue;
BbpCsr.word = 0;
BbpCsr.field.fRead = 1;
BbpCsr.field.BBP_RW_MODE = 1;
BbpCsr.field.Busy = 1;
BbpCsr.field.RegNum = bbp_id;
RTMP_IO_WRITE32(pAd, _regID, BbpCsr.word);
if ((bViaMCU) == TRUE)
{
AsicSendCommandToMcuBBP(pAd, 0x80, 0xff, 0x0, 0x0, FALSE);
/*RtmpusecDelay(1000);*/
}
for (_secCnt=0; _secCnt<MAX_BUSY_COUNT; _secCnt++)
{
RTMP_IO_READ32(pAd, _regID, &BbpCsr.word);
if (BbpCsr.field.Busy == IDLE)
break;
}
if ((BbpCsr.field.Busy == IDLE) && (BbpCsr.field.RegNum == bbp_id))
{
*pValue = (UCHAR)BbpCsr.field.Value;
break;
}
}
if (BbpCsr.field.Busy == BUSY)
{
DBGPRINT_ERR(("BBP(viaMCU=%d) read R%d fail\n", bViaMCU, bbp_id));
*pValue = pAd->BbpWriteLatch[bbp_id];
if (bViaMCU == TRUE)
{
RTMP_IO_READ32(pAd, _regID, &BbpCsr.word);
BbpCsr.field.Busy = 0;
RTMP_IO_WRITE32(pAd, _regID, BbpCsr.word);
}
}
if (bViaMCU == TRUE)
RTMP_MAC_SHR_MSEL_PROTECT_UNLOCK(pAd, __IrqFlags);
}
