HAL_Status
RtkI2SInit(
IN VOID *Data
)
{
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) Data;
PHAL_I2S_OP pHalI2SOP = &HalI2SOpSAL;
PHAL_I2S_INIT_DAT pI2SCfg;
if (pI2SAdapter == 0) {
DBG_I2S_ERR("RtkI2SInit: Null Pointer\r\n");
return HAL_ERR_PARA;
}
if (pI2SAdapter->DevNum > I2S_MAX_ID) {
DBG_I2S_ERR("RtkI2SInit: Invalid I2S Index(&d)\r\n", pI2SAdapter->DevNum);
return HAL_ERR_PARA;
}
pI2SCfg = pI2SAdapter->pInitDat;
/*I2S Initialize HAL Operations*/
HalI2SOpInit(pHalI2SOP);
/*I2S Interrupt Initialization*/
RtkI2SIrqInit(pI2SAdapter);
/*I2S Pin Mux Initialization*/
RtkI2SPinMuxInit(pI2SAdapter);
/*I2S Load User Setting*/
pI2SCfg->I2SIdx = pI2SAdapter->DevNum;
/*I2S HAL Initialization*/
pHalI2SOP->HalI2SInit(pI2SCfg);
/*I2S Device Status Update*/
pI2SAdapter->DevSts = I2S_STS_INITIALIZED;
/*I2S Enable Module*/
pI2SCfg->I2SEn = I2S_ENABLE;
pHalI2SOP->HalI2SEnable(pI2SCfg);
/*I2S Device Status Update*/
pI2SAdapter->DevSts = I2S_STS_IDLE;
return HAL_OK;
}
static HAL_Status
RtkI2SIrqInit(
IN PHAL_I2S_ADAPTER pI2SAdapter
)
{
PIRQ_HANDLE pIrqHandle;
if (pI2SAdapter->DevNum > I2S_MAX_ID) {
DBG_I2S_ERR("RtkI2SIrqInit: Invalid I2S Index(&d)\r\n", pI2SAdapter->DevNum);
return HAL_ERR_PARA;
}
pIrqHandle = &pI2SAdapter->IrqHandle;
switch (pI2SAdapter->DevNum){
case I2S0_SEL:
pIrqHandle->IrqNum = I2S0_PCM0_IRQ;
break;
case I2S1_SEL:
pIrqHandle->IrqNum = I2S1_PCM1_IRQ;
break;
default:
return HAL_ERR_PARA;
}
pIrqHandle->Data = (u32) (pI2SAdapter);
pIrqHandle->IrqFun = (IRQ_FUN) I2SISRHandle;
pIrqHandle->Priority = 3;
InterruptRegister(pIrqHandle);
InterruptEn(pIrqHandle);
return HAL_OK;
}
static HAL_Status
RtkI2SPinMuxDeInit(
IN PHAL_I2S_ADAPTER pI2SAdapter
)
{
if (pI2SAdapter->DevNum > I2S_MAX_ID) {
DBG_I2S_ERR("RtkI2SPinMuxDeInit: Invalid I2S Index(&d)\r\n", pI2SAdapter->DevNum);
return HAL_ERR_PARA;
}
switch (pI2SAdapter->DevNum){
case I2S0_SEL:
/*I2S0 Pin Mux Setting*/
//ACTCK_I2C0_CCTRL(OFF);
PinCtrl(I2S0, pI2SAdapter->PinMux, OFF);
I2S0_MCK_CTRL(OFF);
I2S0_PIN_CTRL(OFF);
//I2S0_FCTRL(OFF);
break;
case I2S1_SEL:
/*I2S1 Pin Mux Setting*/
//ACTCK_I2C1_CCTRL(OFF);
PinCtrl(I2S1, pI2SAdapter->PinMux, OFF);
I2S1_MCK_CTRL(OFF);
I2S1_PIN_CTRL(OFF);
//I2S1_FCTRL(OFF);
break;
default:
return HAL_ERR_PARA;
}
return HAL_OK;
}
RTK_STATUS
HalI2SPageRecvRtl8195a(
IN VOID *Data
)
{
PHAL_I2S_INIT_DAT pHalI2SInitData = (PHAL_I2S_INIT_DAT)Data;
u16 I2SRxIdx = pHalI2SInitData->I2SRxIdx;
u8 I2SPageNum = pHalI2SInitData->I2SPageNum;
u32 reg;
u8 I2SIdx;
I2SIdx = pHalI2SInitData->I2SIdx;
reg = HAL_I2S_READ32(I2SIdx, REG_I2S_RX_PAGE0_OWN+(I2SRxIdx << 2));
if ((reg & (1<<31)) != 0) {
DBG_I2S_ERR("HalI2SPageRecvRtl8195a: No Idle Rx Page\r\n");
return _EXIT_FAILURE;
}
HAL_I2S_WRITE32(I2SIdx, REG_I2S_RX_PAGE0_OWN+(I2SRxIdx<<2), 1<<31);
I2SRxIdx += 1;
if (I2SRxIdx > I2SPageNum) {
I2SRxIdx = 0;
}
pHalI2SInitData->I2SRxIdx = I2SRxIdx;
return _EXIT_SUCCESS;
}
RTK_STATUS
HalI2SPageSendRtl8195a(
IN VOID *Data,
IN u8 PageIdx
)
{
PHAL_I2S_INIT_DAT pHalI2SInitData = (PHAL_I2S_INIT_DAT)Data;
u16 I2STxIdx = pHalI2SInitData->I2STxIdx;
u8 I2SPageNum = pHalI2SInitData->I2SPageNum;
u8 I2SIdx;
if (I2STxIdx != PageIdx) {
DBG_I2S_ERR("HalI2SPageSendRtl8195a: UnExpected Page Index. TxPage=%d, Expected:%d\r\n",
PageIdx, I2STxIdx);
}
I2SIdx = pHalI2SInitData->I2SIdx;
HAL_I2S_WRITE32(I2SIdx, REG_I2S_TX_PAGE0_OWN+4*PageIdx, 1<<31);
I2STxIdx = PageIdx+1;
if (I2STxIdx > I2SPageNum) {
I2STxIdx = 0;
}
pHalI2SInitData->I2STxIdx = I2STxIdx;
return _EXIT_SUCCESS;
}
static HAL_Status
RtkI2SPinMuxInit(
IN PHAL_I2S_ADAPTER pI2SAdapter
)
{
u32 I2Stemp;
if (pI2SAdapter->DevNum > I2S_MAX_ID) {
DBG_I2S_ERR("RtkI2SPinMuxInit: Invalid I2S Index(&d)\r\n", pI2SAdapter->DevNum);
return HAL_ERR_PARA;
}
// enable system pll
I2Stemp = HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_SYSPLL_CTRL1) | (1<<9) | (1<<10);
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_SYSPLL_CTRL1, I2Stemp);
switch (pI2SAdapter->DevNum){
case I2S0_SEL:
ACTCK_I2S_CCTRL(ON);
SLPCK_I2S_CCTRL(ON);
LXBUS_FCTRL(ON); // enable lx bus for i2s
/*I2S0 Pin Mux Setting*/
PinCtrl(I2S0, pI2SAdapter->PinMux, ON);
if (pI2SAdapter->PinMux == I2S_S0) {
DBG_I2S_WARN(ANSI_COLOR_MAGENTA"I2S0 Pin may conflict with JTAG\r\n"ANSI_COLOR_RESET);
}
I2S0_MCK_CTRL(ON);
I2S0_PIN_CTRL(ON);
I2S0_FCTRL(ON);
break;
case I2S1_SEL:
ACTCK_I2S_CCTRL(ON);
SLPCK_I2S_CCTRL(ON);
LXBUS_FCTRL(ON); // enable lx bus for i2s
/*I2S1 Pin Mux Setting*/
PinCtrl(I2S1, pI2SAdapter->PinMux, ON);
if (pI2SAdapter->PinMux == I2S_S2) {
DBG_I2S_WARN(ANSI_COLOR_MAGENTA"I2S1 Pin may conflict with JTAG\r\n"ANSI_COLOR_RESET);
}
I2S1_MCK_CTRL(ON);
I2S1_PIN_CTRL(ON);
I2S0_FCTRL(ON); //i2s 1 is control by bit 24 BIT_PERI_I2S0_EN
I2S1_FCTRL(ON);
break;
default:
return HAL_ERR_PARA;
}
return HAL_OK;
}
HAL_Status
RtkI2SLoadDefault(
IN VOID *Adapter,
IN VOID *Setting
)
{
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) Adapter;
PHAL_I2S_INIT_DAT pI2SCfg = pI2SAdapter->pInitDat;
PHAL_I2S_DEF_SETTING pLoadSetting = (PHAL_I2S_DEF_SETTING)Setting;
if (pI2SAdapter == 0) {
DBG_I2S_ERR("RtkI2SLoadDefault: Null Pointer\r\n");
return HAL_ERR_PARA;
}
if (pI2SAdapter->pInitDat == NULL) {
DBG_I2S_ERR("RtkI2SLoadDefault: pInitDat is NULL!\r\n", pI2SAdapter->DevNum);
return HAL_ERR_PARA;
}
pI2SAdapter->DevSts = pLoadSetting->DevSts;
pI2SAdapter->ErrType = 0;
pI2SAdapter->TimeOut = 0;
pI2SCfg->I2SIdx = pI2SAdapter->DevNum;
pI2SCfg->I2SEn = I2S_DISABLE;
pI2SCfg->I2SMaster = pLoadSetting->I2SMaster;
pI2SCfg->I2SWordLen = pLoadSetting->I2SWordLen;
pI2SCfg->I2SChNum = pLoadSetting->I2SChNum;
pI2SCfg->I2SPageNum = pLoadSetting->I2SPageNum;
pI2SCfg->I2SPageSize = pLoadSetting->I2SPageSize;
pI2SCfg->I2SRate = pLoadSetting->I2SRate;
pI2SCfg->I2STRxAct = pLoadSetting->I2STRxAct;
pI2SCfg->I2STxIntrMSK = pLoadSetting->I2STxIntrMSK;
pI2SCfg->I2SRxIntrMSK = pLoadSetting->I2SRxIntrMSK;
return HAL_OK;
}
static HAL_Status
RtkI2SIrqDeInit(
IN PHAL_I2S_ADAPTER pI2SAdapter
)
{
if (pI2SAdapter->DevNum > I2S_MAX_ID) {
DBG_I2S_ERR("RtkI2SIrqDeInit: Invalid I2S Index(&d)\r\n", pI2SAdapter->DevNum);
return HAL_ERR_PARA;
}
InterruptDis(&pI2SAdapter->IrqHandle);
InterruptUnRegister(&pI2SAdapter->IrqHandle);
return HAL_OK;
}
HAL_Status
RtkI2SDeInit(
IN VOID *Data
)
{
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) Data;
PHAL_I2S_OP pHalI2SOP = &HalI2SOpSAL;
PHAL_I2S_INIT_DAT pI2SCfg;
u32 I2Stemp;
if (pI2SAdapter == 0) {
DBG_I2S_ERR("RtkI2SDeInit: Null Pointer\r\n");
return HAL_ERR_PARA;
}
pI2SCfg = pI2SAdapter->pInitDat;
/*I2S Disable Module*/
pI2SCfg->I2SEn = I2S_DISABLE;
pHalI2SOP->HalI2SEnable(pI2SCfg);
HalI2SClearAllOwnBit((VOID*)pI2SCfg);
/*I2C HAL DeInitialization*/
//pHalI2SOP->HalI2SDeInit(pI2SCfg);
/*I2S Interrupt DeInitialization*/
RtkI2SIrqDeInit(pI2SAdapter);
/*I2S Pin Mux DeInitialization*/
RtkI2SPinMuxDeInit(pI2SAdapter);
/*I2S HAL DeInitialization*/
pHalI2SOP->HalI2SDeInit(pI2SCfg);
/*I2S CLK Source Close*/
I2Stemp = HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_SYSPLL_CTRL1) & (~((1<<9) | (1<<10)));
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_SYSPLL_CTRL1, I2Stemp);
/*I2S Device Status Update*/
pI2SAdapter->DevSts = I2S_STS_UNINITIAL;
return HAL_OK;
}
HAL_Status
RtkI2SDeInit(
IN VOID *Data
)
{
PHAL_I2S_ADAPTER pI2SAdapter = (PHAL_I2S_ADAPTER) Data;
PHAL_I2S_OP pHalI2SOP = &HalI2SOpSAL;
PHAL_I2S_INIT_DAT pI2SCfg;
if (pI2SAdapter == 0) {
DBG_I2S_ERR("RtkI2SDeInit: Null Pointer\r\n");
return HAL_ERR_PARA;
}
pI2SCfg = pI2SAdapter->pInitDat;
/*I2S Disable Module*/
pI2SCfg->I2SEn = I2S_DISABLE;
pHalI2SOP->HalI2SEnable(pI2SCfg);
/*I2C HAL DeInitialization*/
//pHalI2SOP->HalI2SDeInit(pI2SCfg);
/*I2S Interrupt DeInitialization*/
RtkI2SIrqDeInit(pI2SAdapter);
/*I2S Pin Mux DeInitialization*/
RtkI2SPinMuxDeInit(pI2SAdapter);
/*I2S HAL DeInitialization*/
pHalI2SOP->HalI2SDeInit(pI2SCfg);
/*I2S Device Status Update*/
pI2SAdapter->DevSts = I2S_STS_UNINITIAL;
return HAL_OK;
}
