void
ps2_send_byte(uint8_t byte)
{
uint8_t sreg = SREG; cli();
uint8_t i = 11;
DDR_CONFIG_OUT(PS2_DATA);
DDR_CONFIG_OUT(PS2_CLOCK);
/* > 100 us clock low */
PIN_CLEAR(PS2_CLOCK);
while (i--)
_delay_us(10);
/* data low */
PIN_CLEAR(PS2_DATA);
/* clock high */
PIN_SET(PS2_CLOCK);
/* Wait until clock is low again */
DDR_CONFIG_IN(PS2_CLOCK);
while (PIN_HIGH(PS2_CLOCK));
uint8_t parity = 1;
bitcount = 0;
while(bitcount < 9) {
/* Parity */
if (bitcount == 8) {
PIN_CLEAR(PS2_DATA);
if (parity)
PIN_SET(PS2_DATA);
}
/* data */
else {
PIN_CLEAR(PS2_DATA);
if (byte & 0x01) {
PIN_SET(PS2_DATA);
parity ^= 1;
}
byte >>= 1;
}
/* The keyboard generates the clock */
while (!PIN_HIGH(PS2_CLOCK));
while (PIN_HIGH(PS2_CLOCK));
bitcount++;
}
DDR_CONFIG_IN(PS2_DATA);
PIN_CLEAR(PS2_DATA);
PIN_CLEAR(PS2_CLOCK);
/* Wait for the ack from the keyboard */
while (PIN_HIGH(PS2_DATA));
while (PIN_HIGH(PS2_CLOCK));
SREG = sreg;
}
void buttons_init(void)
{
DDR_CONFIG_IN(BUTTON_0);
PIN_SET(BUTTON_0);
DDR_CONFIG_IN(BUTTON_1);
PIN_SET(BUTTON_1);
DDR_CONFIG_IN(BUTTON_2);
PIN_SET(BUTTON_2);
buttons_0_counter = 0;
buttons_1_counter = 0;
buttons_2_counter = 0;
buttons_latched_state = 0;
}
void freqcount_init_measure(void)
{
for (uint8_t i=0; i<FREQCOUNT_CHANNELS; i++)
{
#ifdef FREQCOUNT_BOOT_ON
freqcount_set_state(1,i);
#else
freqcount_set_state(0,i);
#endif
}
// make sure FREQCOUNT_PIN is defined and an input
DDR_CONFIG_IN(FREQCOUNT_PIN);
#if FREQCOUNT_CHANNELS > 1
freqcount_current_channel_store=0;
DDR_CONFIG_OUT(FREQCOUNT_CHANNEL_MULTIPLEX_BIT1);
#endif
#if FREQCOUNT_CHANNELS > 2
DDR_CONFIG_OUT(FREQCOUNT_CHANNEL_MULTIPLEX_BIT2);
#endif
#if FREQCOUNT_CHANNELS > 4
DDR_CONFIG_OUT(FREQCOUNT_CHANNEL_MULTIPLEX_BIT3);
#endif
#if FREQCOUNT_CHANNELS > 8
DDR_CONFIG_OUT(FREQCOUNT_CHANNEL_MULTIPLEX_CS_A);
PIN_SET(FREQCOUNT_CHANNEL_MULTIPLEX_CS_A);
DDR_CONFIG_OUT(FREQCOUNT_CHANNEL_MULTIPLEX_CS_B);
PIN_SET(FREQCOUNT_CHANNEL_MULTIPLEX_CS_B);
#endif
}
void
dht_init(void)
{
DDR_CONFIG_IN(DHT);
dht_global.polling_delay = DHT_POLLING_INTERVAL * HZ;
}
uint8_t
spi_send(uint8_t outdata)
{
DDR_CONFIG_IN(SOFT_SPI_MISO);
uint8_t j, indata = indata;
for(j = 0; j < 8; j++)
{
if(outdata & 0x80)
PIN_SET(SOFT_SPI_MOSI);
else
PIN_CLEAR(SOFT_SPI_MOSI);
PIN_SET(SOFT_SPI_SCK);
indata <<= 1;
if(PIN_HIGH(SOFT_SPI_MISO))
indata |= 1;
PIN_CLEAR(SOFT_SPI_SCK);
outdata <<= 1;
}
DDR_CONFIG_OUT(SOFT_SPI_MISO);
return indata;
}
void
ps2_init(void)
{
bitcount = 11;
parity = 1;
key.num = 0;
/* Enable the interrupt for the clock pin, because the keyboard is clocking
* us, not vice versa
*/
PCICR |= _BV(PS2_PCIE);
PS2_PCMSK |= PIN_BV(PS2_CLOCK);
DDR_CONFIG_IN(PS2_DATA);
DDR_CONFIG_IN(PS2_CLOCK);
PIN_CLEAR(PS2_DATA);
PIN_CLEAR(PS2_CLOCK);
}
void bell_init(void)
{
DDR_CONFIG_IN(BUTTON_BELL);
PIN_SET(BUTTON_BELL);
step = 0;
debounce = 0;
pressed = false;
press_timer = -1;
break_timer = -1;
accepted = false;
c = 0;
}
void
inout_triso_init(void)
{
/* macro defined in pinning/internals/header.m4,
* invoked by pinning/hardware/tdbase.m4
* configures Pin Change Interrupt by STROBE line
* */
rfid_configure_pcint();
//should not be needed
DDR_CONFIG_IN(INOUT_TRISO_STROBE); /*pcint18*/
DDR_CONFIG_IN(INOUT_TRISO_DATA);
DDR_CONFIG_IN(INOUT_TRISO_PRES); /*pcint20*/
bitcount = 8;
data = 0;
digit = 0;
parity = 1;
}
void door_init(void)
{
door_doorstate = 0;
DDR_CONFIG_IN(DOOR_REED_CONTACT);
PIN_SET(DOOR_REED_CONTACT);
DDR_CONFIG_IN(DOOR_LOCK_BRIDGE);
PIN_SET(DOOR_LOCK_BRIDGE);
DDR_CONFIG_IN(DOOR_LOCK_UNLOCKED_CONTACT);
PIN_SET(DOOR_LOCK_UNLOCKED_CONTACT);
DDR_CONFIG_IN(DOOR_LOCK_LOCKED_CONTACT);
PIN_SET(DOOR_LOCK_LOCKED_CONTACT);
DDR_CONFIG_IN(DOOR_HANDLE_CONTACT);
PIN_SET(DOOR_HANDLE_CONTACT);
DDR_CONFIG_IN(DOOR_DOOR_OPEN_CONTACT);
PIN_SET(DOOR_DOOR_OPEN_CONTACT);
PIN_CLEAR(DOOR_LOCK);
DDR_CONFIG_OUT(DOOR_LOCK);
}
void
kde_kdr1000_init(void)
{
kdr1000_configure_pcint();
//should not be needed
DDR_CONFIG_IN(KDE_KDR1000_DATA);
DDR_CONFIG_IN(KDE_KDR1000_STROBE);
DDR_CONFIG_IN(KDE_KDR1000_PRES);
//pull-up in the case the module is phisically disconnected
PIN_SET(KDE_KDR1000_DATA);
PIN_SET(KDE_KDR1000_STROBE);
PIN_SET(KDE_KDR1000_PRES);
kdr1000_bitcount = 5;
kdr1000_data = 0;
kdr1000_digit = 0;
kdr1000_parity = 0x10;
kdr1000_lrc=0;
kdr1000_badflag = 0;
kdr1000_end=0;
}
void fs20_init(void)
{
/* default: enabled */
fs20_global.enable = 1;
#ifdef FS20_SEND_SUPPORT
/* configure port pin for sending */
DDR_CONFIG_OUT(FS20_SEND);
PIN_CLEAR(FS20_SEND);
#endif
#ifdef FS20_RECEIVE_SUPPORT
/* reset global data structures */
//fs20_global.fs20.raw = 0;
memset((void *)&fs20_global.fs20.datagram, 0, sizeof(fs20_global.fs20.datagram));
/* configure port pin for use as input to the analoge comparator */
DDR_CONFIG_IN(FS20_RECV);
PIN_CLEAR(FS20_RECV);
/* enable analog comparator,
* use fixed voltage reference (1V, connected to AIN0)
* reset interrupt flag (ACI)
* enable interrupt
*/
ACSR = _BV(ACBG) | _BV(ACI) | _BV(ACIE);
/* configure timer2 for receiving fs20,
* prescaler 128
* overflow interrupt enabled */
TC2_COUNTER_CURRENT = 0;
TC2_PRESCALER_128;
TC2_MODE_OFF;
TC2_OUTPUT_COMPARE_NONE;
TC2_INT_OVERFLOW_ON;
#ifdef FS20_RECEIVE_WS300_SUPPORT
/* reset everything to zero */
memset((void *)&fs20_global.ws300, 0, sizeof(fs20_global.ws300));
#endif
#endif
#ifdef FS20_RECV_PROFILE
fs20_global.int_counter = 0;
fs20_global.ovf_counter = 0;
#endif
}
void
irmp_init(void)
{
#ifdef IRMP_RX_SUPPORT
/* configure TSOP input, disable pullup */
DDR_CONFIG_IN(IRMP_RX);
PIN_CLEAR(IRMP_RX);
#endif
#ifdef STATUSLED_IRMP_RX_SUPPORT
DDR_CONFIG_OUT(STATUSLED_IRMP_RX);
IRMP_RX_LED_OFF;
#endif
#ifdef STATUSLED_IRMP_TX_SUPPORT
DDR_CONFIG_OUT(STATUSLED_IRMP_TX);
IRMP_TX_LED_OFF;
#endif
/* init timer0/2 to expire after 1000/IRMP_HZ ms */
#ifdef IRMP_USE_TIMER2
SET_HW_PRESCALER;
TC2_COUNTER_COMPARE = SW_PRESCALER - 1;
TC2_COUNTER_CURRENT = 0;
TC2_INT_COMPARE_ON; /* enable interrupt */
#else
SET_HW_PRESCALER;
TC0_COUNTER_COMPARE = SW_PRESCALER - 1;
TC0_COUNTER_CURRENT = 0;
TC0_INT_COMPARE_ON; /* enable interrupt */
#endif
#ifdef IRMP_TX_SUPPORT
PIN_CLEAR(IRMP_TX);
DDR_CONFIG_OUT(IRMP_TX);
#ifndef IRMP_EXTERNAL_MODULATOR
#ifdef IRMP_USE_TIMER2
TC0_MODE_CTC;
TC0_PRESCALER_1;
#else
TC2_MODE_CTC;
TC2_PRESCALER_1;
#endif
#endif
irmp_tx_set_freq(IRSND_FREQ_36_KHZ); /* default frequency */
#endif
}
void fs20_init(void)
{
/* default: enabled */
fs20_global.enable = 1;
#ifdef FS20_SEND_SUPPORT
/* configure port pin for sending */
DDR_CONFIG_OUT(FS20_SEND);
PIN_CLEAR(FS20_SEND);
#endif
#ifdef FS20_RECEIVE_SUPPORT
/* reset global data structures */
memset((void *)&fs20_global.fs20.datagram, 0, sizeof(fs20_global.fs20));
/* configure port pin for use as input to the analoge comparator */
DDR_CONFIG_IN(FS20_RECV);
PIN_CLEAR(FS20_RECV);
/* enable analog comparator,
* use fixed voltage reference (1V, connected to AIN0)
* reset interrupt flag (ACI)
* enable interrupt
*/
ACSR = _BV(ACBG) | _BV(ACI) | _BV(ACIE);
/* configure timer2 for receiving fs20,
* prescaler 128
* overflow interrupt enabled */
TCNT2 = 0;
TCCR2A = 0;
TCCR2B = _BV(CS20) | _BV(CS22);
_TIMSK_TIMER2 = _BV(TOIE2);
#ifdef FS20_RECEIVE_WS300_SUPPORT
/* reset everything to zero */
memset((void *)&fs20_global.ws300, 0, sizeof(fs20_global.ws300));
#endif
#endif
#ifdef FS20_RECV_PROFILE
fs20_global.int_counter = 0;
fs20_global.ovf_counter = 0;
#endif
}
void door_init(void)
{
door_doorstate = 0;
DDR_CONFIG_IN(DOOR_REED_CONTACT);
PIN_SET(DOOR_REED_CONTACT);
DDR_CONFIG_IN(DOOR_LOCK_BRIDGE);
PIN_SET(DOOR_LOCK_BRIDGE);
DDR_CONFIG_IN(DOOR_LOCK_UNLOCKED_CONTACT);
PIN_SET(DOOR_LOCK_UNLOCKED_CONTACT);
DDR_CONFIG_IN(DOOR_LOCK_LOCKED_CONTACT);
PIN_SET(DOOR_LOCK_LOCKED_CONTACT);
DDR_CONFIG_IN(DOOR_HANDLE_CONTACT);
PIN_SET(DOOR_HANDLE_CONTACT);
DDR_CONFIG_IN(DOOR_DOOR_OPEN_CONTACT);
PIN_SET(DOOR_DOOR_OPEN_CONTACT);
PIN_SET(DOOR_HBRIDGE_ENABLE);
PIN_CLEAR(DOOR_HBRIDGE_IN1);
PIN_CLEAR(DOOR_HBRIDGE_IN2);
DDR_CONFIG_OUT(DOOR_HBRIDGE_ENABLE);
DDR_CONFIG_OUT(DOOR_HBRIDGE_IN1);
DDR_CONFIG_OUT(DOOR_HBRIDGE_IN2);
DDR_CONFIG_IN(DOOR_LOCK_CONTACT);
PIN_SET(DOOR_LOCK_CONTACT);
//PIN_CLEAR(R1);
//DDR_CONFIG_OUT(R1);
door_desiredState = DOOR_LOCK_LOCKED;
door_barState = BAR_UNKNOWN;
door_state = DOOR_LOCK;
}
void
irmp_init (void)
{
/* configure TSOP input, disable pullup */
DDR_CONFIG_IN (IRMP_RX);
PIN_CLEAR (IRMP_RX);
#ifdef IRMP_RX_LED
DDR_CONFIG_OUT (STATUSLED_RX);
IRMP_RX_LED_OFF;
#endif
/* init timer0/2 to expire after 1000/IRMP_HZ ms */
#ifdef IRMP_USE_TIMER2
_TCCR2_PRESCALE = HW_PRESCALER_MASK;
_OUTPUT_COMPARE_REG2 = SW_PRESCALER - 1;
_TCNT2 = 0;
_TIMSK_TIMER2 |= _BV (_OUTPUT_COMPARE_IE2); /* enable interrupt */
#else
_TCCR0_PRESCALE = HW_PRESCALER_MASK;
_OUTPUT_COMPARE_REG0 = SW_PRESCALER - 1;
_TCNT0 = 0;
_TIMSK_TIMER0 |= _BV (_OUTPUT_COMPARE_IE0); /* enable interrupt */
#endif
#ifdef IRSND_SUPPORT
PIN_CLEAR (IRMP_TX);
DDR_CONFIG_OUT (IRMP_TX);
#ifdef IRMP_USE_TIMER2
_TCCR0_PRESCALE = _BV (_WGM01) | _BV (_CS00); /* CTC mode, 0x01, start Timer 0, no prescaling */
#else
_TCCR2_PRESCALE = _BV (_WGM21) | _BV (_CS20); /* CTC mode, 0x01, start Timer 2, no prescaling */
#endif
irmp_tx_set_freq (IRSND_FREQ_36_KHZ); /* default frequency */
#endif
}
void spi_init(void)
/* {{{ */ {
/* configure MOSI, SCK, lines as outputs */
DDR_CONFIG_OUT(SPI_MOSI);
DDR_CONFIG_OUT(SPI_SCK);
DDR_CONFIG_IN(SPI_MISO);
#ifdef DATAFLASH_SUPPORT
DDR_CONFIG_OUT(SPI_CS_DF);
PIN_SET(SPI_CS_DF);
#endif
#ifdef ENC28J60_SUPPORT
/* set all CS high (output) */
DDR_CONFIG_OUT(SPI_CS_NET);
PIN_SET(SPI_CS_NET);
#endif
#ifdef RFM12_SUPPORT
/* initialize spi link to rfm12 module */
DDR_CONFIG_OUT(SPI_CS_RFM12);
/* Enable the pullup */
PIN_SET(SPI_CS_RFM12);
#endif
#ifdef DATAFLASH_SUPPORT
DDR_CONFIG_OUT(SPI_CS_DF);
PIN_SET(SPI_CS_DF);
#endif
/* enable spi, set master and clock modes (f/2) */
_SPCR0 = _BV(_SPE0) | _BV(_MSTR0);
_SPSR0 = _BV(_SPI2X0);
} /* }}} */
/** main function
*/
int main(void) {
// SPCR &= ~(1<<SPE);
// TIMSK0 &= ~(1<<TOIE1);
wdt_disable();
/* Clear WDRF in MCUSR */
MCUSR &= ~(1<<WDRF);
/* Write logical one to WDCE and WDE */
/* Keep old prescaler setting to prevent unintentional time-out */
WDTCSR |= (1<<WDCE) | (1<<WDE);
/* Turn off WDT */
WDTCSR = 0x00;
//volatile long l;
// for(l=0;l<1000000;l++);
DDR_CONFIG_IN(CONFIG1);
PIN_SET(CONFIG1);
wdt_enable(WDTO_2S);
wdt_reset();
volatile unsigned long l;
for(l=0;l<10;l++);
if( !PIN_HIGH(CONFIG1) ){
global.config = 30;
}else{
global.config = 21;
}
leds_init();
wdt_reset();
if( global.config == 21 ){
DDR_CONFIG_IN(JUMPER1C1);
PIN_SET(JUMPER1C1);
}else if( global.config == 30 ){
DDR_CONFIG_IN(JUMPER1C2);
PIN_SET(JUMPER1C2);
adc_init();
uint16_t bat = adc_getChannel(6);
if( bat < ADC_MINBATIDLE ){
//global.flags.lowbat = 1;
}
}
wdt_reset();
init_pwm();
#if SERIAL_UART
uart1_init( UART_BAUD_SELECT(UART_BAUDRATE,F_CPU));
stdout = &mystdout;
#endif
#if RC5_DECODER
rc5_init();
#endif
wdt_reset();
#if STATIC_SCRIPTS
init_script_threads();
#endif
settings_read();
//if((global.config == 21 && !PIN_HIGH(JUMPER1C1)) || (global.config== 30 && !PIN_HIGH(JUMPER1C2)))
// interfaces_setEnabled(IFACE_RF,0);
control_init();
wdt_reset();
#if RS485_CTRL
rs485_init();
zbus_core_init();
#endif
//rf_init();
packet_init(idbuf[0],0);
wdt_reset();
srandom(random_seed);
random_seed = random();
/* enable interrupts globally */
sei();
// global.state = STATE_RUNNING;
// global.state = STATE_PAUSE;
// global.flags.running = 0;
while (1) {
wdt_reset();
//leds_main();
#if 1
packet_tick();
#else
if(packetbase ){//> 32){
packetbase = 0;
packet_tick();
//if(main_reset++ > 16000)
// jump_to_bootloader();
//uint16_t bat = adc_getChannel(6);
/*if( bat < ADC_MINBATIDLE ){
global.flags.lowbat = 1;
}*/
}
#endif
//if( global.flags.lowbat ){
// control_lowbat();
//}
if( global.flags.timebase ){
//control_tick();
global.flags.timebase=0;
}
/* after the last pwm timeslot, rebuild the timeslot table */
//if (global.flags.last_pulse) {
// global.flags.last_pulse = 0;
//if(global.flags.running)
//update_pwm_timeslots();
//}
/* at the beginning of each pwm cycle, call the fading engine and
* execute all script threads */
if (global.flags.new_cycle) {
global.flags.new_cycle = 0;
if(control_faderunning)
update_brightness();
if(global.flags.running){
#if STATIC_SCRIPTS
// execute_script_threads();
#endif
}
//continue;
}
#if RC5_DECODER
#endif
#if RS485_CTRL
rs485_process();
#endif
#if SERIAL_UART
//serial_process();
#endif
}
}
static void
dht_read(void)
{
PIN_SET(DHT);
_delay_us(30);
DDR_CONFIG_IN(DHT);
/* Read in timingss, which takes approx. 4,5 milliseconds.
* We do not disable interrupts, because a failed read is outweighed
* by a non-serviced interrupt. Please never enclose the for-loop
* with an ATOMIC_BLOCK! */
uint8_t last_state = PIN_BV(DHT);
uint8_t j = 0;
uint8_t data[5];
for (uint8_t i = 0; i < MAXTIMINGS; i++)
{
uint8_t counter = 0;
uint8_t current_state;
while (last_state == (current_state = PIN_HIGH(DHT)))
{
_delay_us(5);
if (++counter == 20)
{
DHT_DEBUG("read timeout, edge=%u", i);
return; /* timeout in conversation */
}
}
last_state = current_state;
/* ignore first three transitions */
if ((i >= 4) && (i % 2 == 0))
{
/* shift each bit into the storage bytes */
data[j / 8] <<= 1;
if (counter > 7) /* 7*5=35us */
data[j / 8] |= 1;
j++;
}
}
/* check we read 40 bits and that the checksum matches */
if ((j < 40) ||
(data[4] != ((data[0] + data[1] + data[2] + data[3]) & 0xFF)))
{
DHT_DEBUG("read failed, bits=%u, %02X %02X %02X %02X %02X",
j, data[0], data[1], data[2], data[3], data[4]);
return;
}
int16_t t;
#if DHT_TYPE == DHT_TYPE_11
t = data[2];
t *= 10;
dht_global.temp = t;
t = data[0];
t *= 10;
dht_global.humid = t;
#elif DHT_TYPE == DHT_TYPE_22
t = data[2] << 8 | data[3];
if (t & 0x8000)
{
t &= ~0x8000;
t = -t;
}
dht_global.temp = t;
t = data[0] << 8 | data[1];
dht_global.humid = t;
#endif
DHT_DEBUG("t=%d, h=%d%%", dht_global.temp, dht_global.humid);
}