PROCESS_THREAD(blink_process, ev , data)
{
static struct etimer timer;
PROCESS_BEGIN();
etimer_set(&timer, CLOCK_SECOND/2);
while(1) {
PROCESS_WAIT_EVENT_UNTIL(ev == PROCESS_EVENT_EXIT ||
ev== PROCESS_EVENT_TIMER);
if (ev == PROCESS_EVENT_EXIT) break;
leds_invert(LEDS_RED);
#if 0
{
DISABLE_FIFOP_INT();
printf("FSMSTATE: %04x",cc2420_getreg(CC2420_FSMSTATE));
ENABLE_FIFOP_INT();
if (SFD_IS_1) printf(" SFD");
if (FIFO_IS_1) printf(" FIFO");
if (FIFOP_IS_1) printf(" FIFOP");
putchar('\n');
}
#endif
etimer_reset(&timer);
}
printf("Ended process\n");
PROCESS_END();
}
/*---------------------------------------------------------------------------*/
int
cc2420_init(void)
{
uint16_t reg;
{
int s = splhigh();
cc2420_arch_init(); /* Initalize ports and SPI. */
DISABLE_FIFOP_INT();
FIFOP_INT_INIT();
splx(s);
}
/* Turn on voltage regulator and reset. */
SET_VREG_ACTIVE();
//clock_delay(250); OK
SET_RESET_ACTIVE();
clock_delay(127);
SET_RESET_INACTIVE();
//clock_delay(125); OK
/* Turn on the crystal oscillator. */
strobe(CC2420_SXOSCON);
/* Turn on/off automatic packet acknowledgment and address decoding. */
reg = getreg(CC2420_MDMCTRL0);
reg |= 0x40; /* XXX CCA mode 1 */
#if CC2420_CONF_AUTOACK
reg |= AUTOACK | ADR_DECODE;
#else
reg &= ~(AUTOACK | ADR_DECODE);
#endif /* CC2420_CONF_AUTOACK */
setreg(CC2420_MDMCTRL0, reg);
/* Change default values as recomended in the data sheet, */
/* correlation threshold = 20, RX bandpass filter = 1.3uA. */
setreg(CC2420_MDMCTRL1, CORR_THR(20));
reg = getreg(CC2420_RXCTRL1);
reg |= RXBPF_LOCUR;
setreg(CC2420_RXCTRL1, reg);
/* Set the FIFOP threshold to maximum. */
setreg(CC2420_IOCFG0, FIFOP_THR(127));
/* Turn off "Security enable" (page 32). */
reg = getreg(CC2420_SECCTRL0);
reg &= ~RXFIFO_PROTECTION;
setreg(CC2420_SECCTRL0, reg);
cc2420_set_pan_addr(0xffff, 0x0000, NULL);
cc2420_set_channel(26);
process_start(&cc2420_process, NULL);
return 1;
}
static void
off(void)
{
PRINTF("off\n");
receive_on = 0;
/* Wait for transmission to end before turning radio off. */
while(status() & BV(CC2420_TX_ACTIVE));
strobe(CC2420_SRFOFF);
DISABLE_FIFOP_INT();
ENERGEST_OFF(ENERGEST_TYPE_LISTEN);
}
void
cc2420_off(void)
{
u8_t spiStatusByte;
if (receive_on == 0)
return;
receive_on = 0;
/* Wait for transmission to end before turning radio off. */
do {
spiStatusByte = cc2420_status();
} while (spiStatusByte & BV(CC2420_TX_ACTIVE));
cc2420_strobe(CC2420_SRFOFF);
DISABLE_FIFOP_INT();
}
//-------------------------------------------------------------------------------------------------------
// void rf_rx_off(void)
//
// DESCRIPTION:
// Disables the CC2420 receiver and the FIFOP interrupt.
//-------------------------------------------------------------------------------------------------------
void rf_rx_off(void) {
#ifdef RADIO_PRIORITY_CEILING
nrk_sem_pend (radio_sem);
#endif
// XXX
//SET_VREG_INACTIVE();
rfSettings.receiveOn = FALSE;
FASTSPI_STROBE(CC2420_SRFOFF);
#ifdef CC2420_OSC_OPT
FASTSPI_STROBE(CC2420_SXOSCOFF);
#endif
rx_ready=0;
#ifdef RADIO_PRIORITY_CEILING
nrk_sem_post(radio_sem);
#endif
DISABLE_FIFOP_INT();
} // rf_rx_off()
void
cc2420_init(void)
{
u16_t reg;
{
int s = splhigh();
__cc2420_arch_init(); /* Initalize ports and SPI. */
DISABLE_FIFOP_INT();
FIFOP_INT_INIT();
splx(s);
}
/* Turn on voltage regulator and reset. */
SET_VREG_ACTIVE();
//clock_delay(250); OK
SET_RESET_ACTIVE();
clock_delay(127);
SET_RESET_INACTIVE();
//clock_delay(125); OK
/* Turn on the crystal oscillator. */
cc2420_strobe(CC2420_SXOSCON);
/* Turn on automatic packet acknowledgment. */
reg = cc2420_getreg(CC2420_MDMCTRL0);
reg |= AUTOACK;
cc2420_setreg(CC2420_MDMCTRL0, reg);
/* Change default values as recomended in the data sheet, */
/* correlation threshold = 20, RX bandpass filter = 1.3uA. */
cc2420_setreg(CC2420_MDMCTRL1, CORR_THR(20));
reg = cc2420_getreg(CC2420_RXCTRL1);
reg |= RXBPF_LOCUR;
cc2420_setreg(CC2420_RXCTRL1, reg);
/* Set the FIFOP threshold to maximum. */
cc2420_setreg(CC2420_IOCFG0, FIFOP_THR(127));
/* Turn off "Security enable" (page 32). */
reg = cc2420_getreg(CC2420_SECCTRL0);
reg &= ~RXFIFO_PROTECTION;
cc2420_setreg(CC2420_SECCTRL0, reg);
cc2420_set_chan_pan_addr(11, 0xffff, 0x0000, NULL);
}
