void SPI_RxDma_Config(FunctionalState mode)
{
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
SPI_DMACmd(SPI3,SPI_DMAReq_Rx,DISABLE);
DMA_Cmd(DMA1_Stream0,DISABLE);
DMA_DeInit(DMA1_Stream0);
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream0_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = mode;
NVIC_Init(&NVIC_InitStructure);
DMA_InitStructure.DMA_Channel = DMA_Channel_0;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(SPI3->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) &spi_dma_buffer[1][0];
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = SPI_RX_DMA;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream0,&DMA_InitStructure);
DMA_DoubleBufferModeConfig(DMA1_Stream0, (uint32_t)&spi_dma_buffer[0][0], DMA_Memory_0);
DMA_DoubleBufferModeCmd(DMA1_Stream0, mode);
DMA_ITConfig(DMA1_Stream0,DMA_IT_TC,mode);
DMA_Cmd(DMA1_Stream0,mode);
SPI_DMACmd(SPI3,SPI_DMAReq_Rx,mode);
}
void DAC_DMA_init(void){
NVIC_InitTypeDef NVIC_InitStructure;
GPIO_InitTypeDef GPIO_InitStruct;
DAC_InitTypeDef DAC_INIT;
DMA_InitTypeDef DMA_INIT;
__HAL_RCC_DMA1_CLK_ENABLE();
__HAL_RCC_DAC_CLK_ENABLE();
/* DAC output pin */
GPIO_InitStruct.Pin = GPIO_PIN_4;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
//GPIO_InitStruct.Speed = GPIO_SPEED_FAST; /* 50MHz */
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
DAC_INIT.DAC_Trigger = DAC_Trigger_T6_TRGO;
DAC_INIT.DAC_WaveGeneration = DAC_WaveGeneration_None;
DAC_INIT.DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
DAC_INIT.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
DAC_Init(DAC_Channel_1, &DAC_INIT);
DMA_DeInit(DMA1_Stream5);
DMA_INIT.DMA_Channel = DMA_Channel_7;
DMA_INIT.DMA_PeripheralBaseAddr = (uint32_t)DAC_DHR12R1_ADDR;
DMA_INIT.DMA_Memory0BaseAddr = (uint32_t) &PINGBUF;
//DMA_INIT.DMA_Memory0BaseAddr = (uint32_t) &function;
DMA_INIT.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_INIT.DMA_BufferSize = SINE_RES;
DMA_INIT.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_INIT.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_INIT.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_INIT.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_INIT.DMA_Mode = DMA_Mode_Circular;
DMA_INIT.DMA_Priority = DMA_Priority_High;
DMA_INIT.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_INIT.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_INIT.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_INIT.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream5, &DMA_INIT);
DMA_DoubleBufferModeConfig(DMA1_Stream5, &PONGBUF,DMA_Memory_0);
DMA_DoubleBufferModeCmd(DMA1_Stream5, ENABLE);
DMA_ITConfig(DMA1_Stream5, DMA_IT_HT | DMA_IT_TC | DMA_IT_TE, ENABLE);
DMA_Cmd(DMA1_Stream5, ENABLE);
DAC_Cmd(DAC_Channel_1, ENABLE);
DAC_DMACmd(DAC_Channel_1,ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream5_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
/**
* @brief Configures DCMI/DMA to capture image from the mt9v034 camera.
*
* @param buffer_size Buffer size in bytes
*/
void dcmi_dma_init(uint16_t buffer_size)
{
reset_frame_counter();
DCMI_InitTypeDef DCMI_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
/*** Configures the DCMI to interface with the mt9v034 camera module ***/
/* Enable DCMI clock */
RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_DCMI, ENABLE);
/* DCMI configuration */
DCMI_InitStructure.DCMI_CaptureMode = DCMI_CaptureMode_Continuous;
DCMI_InitStructure.DCMI_SynchroMode = DCMI_SynchroMode_Hardware;
DCMI_InitStructure.DCMI_PCKPolarity = DCMI_PCKPolarity_Falling;
DCMI_InitStructure.DCMI_VSPolarity = DCMI_VSPolarity_Low;
DCMI_InitStructure.DCMI_HSPolarity = DCMI_HSPolarity_Low;
DCMI_InitStructure.DCMI_CaptureRate = DCMI_CaptureRate_All_Frame;
DCMI_InitStructure.DCMI_ExtendedDataMode = DCMI_ExtendedDataMode_8b;
/* Configures the DMA2 to transfer Data from DCMI */
/* Enable DMA2 clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
/* DMA2 Stream1 Configuration */
DMA_DeInit(DMA2_Stream1);
DMA_InitStructure.DMA_Channel = DMA_Channel_1;
DMA_InitStructure.DMA_PeripheralBaseAddr = DCMI_DR_ADDRESS;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) dcmi_image_buffer_8bit_1;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = buffer_size / 4; // buffer size in date unit (word)
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_DoubleBufferModeConfig(DMA2_Stream1,(uint32_t) dcmi_image_buffer_8bit_2, DMA_Memory_0);
DMA_DoubleBufferModeCmd(DMA2_Stream1,ENABLE);
/* DCMI configuration */
DCMI_Init(&DCMI_InitStructure);
/* DMA2 IRQ channel Configuration */
DMA_Init(DMA2_Stream1, &DMA_InitStructure);
}
//I2S2 TX DMA配置
//设置为双缓冲模式,并开启DMA传输完成中断
//buf0:M0AR地址.
//buf1:M1AR地址.
//num:每次传输数据量
void I2S2_TX_DMA_Init(u8* buf0,u8 *buf1,u16 num)
{
NVIC_InitTypeDef NVIC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1,ENABLE);//DMA1时钟使能
DMA_DeInit(DMA1_Stream4);
while (DMA_GetCmdStatus(DMA1_Stream4) != DISABLE){}//等待DMA1_Stream1可配置
/* 配置 DMA Stream */
DMA_InitStructure.DMA_Channel = DMA_Channel_0; //通道0 SPI2_TX通道
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&SPI2->DR;//外设地址为:(u32)&SPI2->DR
DMA_InitStructure.DMA_Memory0BaseAddr = (u32)buf0;//DMA 存储器0地址
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;//存储器到外设模式
DMA_InitStructure.DMA_BufferSize = num;//数据传输量
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;//外设非增量模式
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;//存储器增量模式
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;//外设数据长度:16位
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;//存储器数据长度：16位
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;// 使用循环模式
DMA_InitStructure.DMA_Priority = DMA_Priority_High;//高优先级
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; //不使用FIFO模式
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;//外设突发单次传输
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;//存储器突发单次传输
DMA_Init(DMA1_Stream4, &DMA_InitStructure);//初始化DMA Stream
DMA_DoubleBufferModeConfig(DMA1_Stream4,(u32)buf1,DMA_Memory_0);//双缓冲模式配置
DMA_DoubleBufferModeCmd(DMA1_Stream4,ENABLE);//双缓冲模式开启
DMA_ITConfig(DMA1_Stream4,DMA_IT_TC,ENABLE);//开启传输完成中断
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream4_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x00;//抢占优先级0
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x00;//子优先级0
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;//使能外部中断通道
NVIC_Init(&NVIC_InitStructure);//配置
}
/**
* Initialise a single Overo device
*/
int32_t PIOS_OVERO_Init(uint32_t *overo_id, const struct pios_overo_cfg *cfg)
{
PIOS_DEBUG_Assert(overo_id);
PIOS_DEBUG_Assert(cfg);
struct pios_overo_dev *overo_dev;
overo_dev = (struct pios_overo_dev *)PIOS_OVERO_alloc();
if (!overo_dev) {
goto out_fail;
}
/* Bind the configuration to the device instance */
overo_dev->cfg = cfg;
overo_dev->writing_buffer = 1; // First writes to second buffer
/* Put buffers to a known state */
memset(&overo_dev->tx_buffer[0][0], 0xFF, PACKET_SIZE);
memset(&overo_dev->tx_buffer[1][0], 0xFF, PACKET_SIZE);
memset(&overo_dev->rx_buffer[0][0], 0xFF, PACKET_SIZE);
memset(&overo_dev->rx_buffer[1][0], 0xFF, PACKET_SIZE);
/*
* Enable the SPI device
*
* 1. Enable the SPI port
* 2. Enable DMA with circular buffered DMA (validate config)
* 3. Enable the DMA Tx IRQ
*/
// PIOS_Assert(overo_dev->cfg->dma.tx-> == CIRCULAR);
// PIOS_Assert(overo_dev->cfg->dma.rx-> == CIRCULAR);
/* only legal for single-slave config */
PIOS_Assert(overo_dev->cfg->slave_count == 1);
SPI_SSOutputCmd(overo_dev->cfg->regs, DISABLE);
/* Initialize the GPIO pins */
/* note __builtin_ctz() due to the difference between GPIO_PinX and GPIO_PinSourceX */
GPIO_PinAFConfig(overo_dev->cfg->sclk.gpio,
__builtin_ctz(overo_dev->cfg->sclk.init.GPIO_Pin),
overo_dev->cfg->remap);
GPIO_PinAFConfig(overo_dev->cfg->mosi.gpio,
__builtin_ctz(overo_dev->cfg->mosi.init.GPIO_Pin),
overo_dev->cfg->remap);
GPIO_PinAFConfig(overo_dev->cfg->miso.gpio,
__builtin_ctz(overo_dev->cfg->miso.init.GPIO_Pin),
overo_dev->cfg->remap);
GPIO_PinAFConfig(overo_dev->cfg->ssel[0].gpio,
__builtin_ctz(overo_dev->cfg->ssel[0].init.GPIO_Pin),
overo_dev->cfg->remap);
GPIO_Init(overo_dev->cfg->sclk.gpio, (GPIO_InitTypeDef *)&(overo_dev->cfg->sclk.init));
GPIO_Init(overo_dev->cfg->mosi.gpio, (GPIO_InitTypeDef *)&(overo_dev->cfg->mosi.init));
GPIO_Init(overo_dev->cfg->miso.gpio, (GPIO_InitTypeDef *)&(overo_dev->cfg->miso.init));
/* Configure circular buffer targets. Configure 0 to be initially active */
DMA_InitTypeDef dma_init;
DMA_DeInit(overo_dev->cfg->dma.rx.channel);
dma_init = overo_dev->cfg->dma.rx.init;
dma_init.DMA_Memory0BaseAddr = (uint32_t)overo_dev->rx_buffer[0];
dma_init.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init.DMA_BufferSize = PACKET_SIZE;
DMA_Init(overo_dev->cfg->dma.rx.channel, &dma_init);
DMA_DoubleBufferModeConfig(overo_dev->cfg->dma.rx.channel, (uint32_t)overo_dev->rx_buffer[1], DMA_Memory_0);
DMA_DoubleBufferModeCmd(overo_dev->cfg->dma.rx.channel, ENABLE);
DMA_DeInit(overo_dev->cfg->dma.tx.channel);
dma_init = overo_dev->cfg->dma.tx.init;
dma_init.DMA_Memory0BaseAddr = (uint32_t)overo_dev->tx_buffer[0];
dma_init.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init.DMA_BufferSize = PACKET_SIZE;
DMA_Init(overo_dev->cfg->dma.tx.channel, &dma_init);
DMA_DoubleBufferModeConfig(overo_dev->cfg->dma.tx.channel, (uint32_t)overo_dev->tx_buffer[1], DMA_Memory_0);
DMA_DoubleBufferModeCmd(overo_dev->cfg->dma.tx.channel, ENABLE);
/* Set the packet size */
DMA_SetCurrDataCounter(overo_dev->cfg->dma.rx.channel, PACKET_SIZE);
DMA_SetCurrDataCounter(overo_dev->cfg->dma.tx.channel, PACKET_SIZE);
/* Initialize the SPI block */
SPI_DeInit(overo_dev->cfg->regs);
SPI_Init(overo_dev->cfg->regs, (SPI_InitTypeDef *)&(overo_dev->cfg->init));
SPI_CalculateCRC(overo_dev->cfg->regs, DISABLE);
/* Enable SPI */
SPI_Cmd(overo_dev->cfg->regs, ENABLE);
/* Enable SPI interrupts to DMA */
SPI_I2S_DMACmd(overo_dev->cfg->regs, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, ENABLE);
/* Configure DMA interrupt */
NVIC_Init((NVIC_InitTypeDef *)&(overo_dev->cfg->dma.irq.init));
DMA_ITConfig(overo_dev->cfg->dma.tx.channel, DMA_IT_TC, ENABLE);
/* Enable the DMA channels */
DMA_Cmd(overo_dev->cfg->dma.tx.channel, ENABLE);
DMA_Cmd(overo_dev->cfg->dma.rx.channel, ENABLE);
*overo_id = (uint32_t)overo_dev;
return 0;
out_fail:
return -1;
}
void Audio_DMA_Init(void)
{
DMA_InitTypeDef DMA_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
//Setup Input Audio DMA Stream
DMA_DeInit(DMA1_Stream0 );
DMA_InitStructure.DMA_Channel = DMA_Channel_3;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) (I2S3ext_BASE + 0x0C);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) Rx0BufferDMA;
DMA_InitStructure.DMA_BufferSize = BUFFERSIZE;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_Init(DMA1_Stream0, &DMA_InitStructure);
DMA_DoubleBufferModeConfig(DMA1_Stream0, (uint32_t) Rx1BufferDMA,
DMA_Memory_0 );
DMA_DoubleBufferModeCmd(DMA1_Stream0, ENABLE);
//Turn On Receive I2S to DMA Connection
SPI_I2S_DMACmd(I2S3ext, SPI_I2S_DMAReq_Rx, ENABLE);
//Setup Output Audio DMA Stream
DMA_DeInit(DMA1_Stream5 );
DMA_InitStructure.DMA_Channel = DMA_Channel_0;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) (SPI3_BASE + 0x0C);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) Tx0BufferDMA;
DMA_InitStructure.DMA_BufferSize = BUFFERSIZE;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_Init(DMA1_Stream5, &DMA_InitStructure);
DMA_DoubleBufferModeConfig(DMA1_Stream5, (uint32_t) Tx1BufferDMA,
DMA_Memory_0 );
DMA_DoubleBufferModeCmd(DMA1_Stream5, ENABLE);
//Turn On I2S to DMA Transmit Connection
SPI_I2S_DMACmd(SPI3, SPI_I2S_DMAReq_Tx, ENABLE);
Delay(10000);
//Startup DMA Processing
DMA_Cmd(DMA1_Stream0, ENABLE);
DMA_Cmd(DMA1_Stream5, ENABLE);
Delay(10000);
//Setup & Turn On DMA General Interrupt
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream0_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
Delay(10000);
//Turn On Stream0 Transaction Complete Interrupt )
//DMA_ITConfig(DMA1_Stream0, DMA_IT_TC, ENABLE);
}
void fdi_adc_convert_continuous(
uint8_t *channels,
uint32_t channel_count,
volatile uint16_t *buffer_0,
volatile uint16_t *buffer_1,
uint32_t buffer_length,
fdi_adc_callback_t callback
) {
fdi_adc_dma_buffer_0 = buffer_0;
fdi_adc_dma_buffer_1 = buffer_1;
fdi_adc_dma_buffer_length = buffer_length;
fdi_adc_callback = callback;
/* Enable DMA2, thats where ADC is hooked on -> see Table 20 (RM00090) */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
DMA_InitTypeDef dma_init;
DMA_StructInit(&dma_init);
dma_init.DMA_Channel = DMA_Channel_0;
dma_init.DMA_BufferSize = buffer_length;
dma_init.DMA_DIR = DMA_DIR_PeripheralToMemory;
dma_init.DMA_FIFOMode = DMA_FIFOMode_Disable;
dma_init.DMA_FIFOThreshold = 0;
dma_init.DMA_MemoryBurst = DMA_MemoryBurst_Single;
dma_init.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
dma_init.DMA_Mode = DMA_Mode_Circular;
dma_init.DMA_Priority = DMA_Priority_High;
dma_init.DMA_Memory0BaseAddr = (uint32_t)fdi_adc_dma_buffer_0;
dma_init.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
dma_init.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->DR;
dma_init.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
dma_init.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_Init(DMA2_Stream0, &dma_init);
DMA_DoubleBufferModeConfig(DMA2_Stream0, (uint32_t)fdi_adc_dma_buffer_1, DMA_Memory_0);
DMA_DoubleBufferModeCmd(DMA2_Stream0, ENABLE);
DMA_ClearITPendingBit(DMA2_Stream0, DMA_IT_TCIF0);
DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE);
DMA_Cmd(DMA2_Stream0, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
ADC_CommonInitTypeDef adc_common_init;
ADC_CommonStructInit(&adc_common_init);
ADC_CommonInit(&adc_common_init);
ADC_InitTypeDef adc_init;
ADC_StructInit(&adc_init);
adc_init.ADC_Resolution = ADC_Resolution_12b;
adc_init.ADC_ScanConvMode = ENABLE;
adc_init.ADC_ContinuousConvMode = ENABLE;
adc_init.ADC_ExternalTrigConvEdge = 0;
adc_init.ADC_ExternalTrigConv = 0;
adc_init.ADC_DataAlign = ADC_DataAlign_Right;
adc_init.ADC_NbrOfConversion = channel_count;
ADC_Init(ADC1, &adc_init);
/* Configure channels */
for (uint32_t i = 0; i < channel_count; ++i) {
uint32_t channel = channels[i];
ADC_RegularChannelConfig(ADC1, channel, i + 1, ADC_SampleTime_28Cycles);
}
// ADC Rate:
// Conversion Clocks = 28 sample cycles + 12 bit conversion cycles = 40 cycles
// Conversion Count = 1 high current range + 1 low current range
// ADC Clock Rate = 84 MHz
// 84 MHz / (40 cycles * 2) = 1.05 M samples per second
/* Enable ADC interrupts */
// ADC_ITConfig(ADC1, ADC_IT_EOC, ENABLE);
ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
ADC_DMACmd(ADC1, ENABLE);
NVIC_InitTypeDef nvic_init;
nvic_init.NVIC_IRQChannel = DMA2_Stream0_IRQn;
nvic_init.NVIC_IRQChannelCmd = ENABLE;
nvic_init.NVIC_IRQChannelPreemptionPriority = 0x0F;
nvic_init.NVIC_IRQChannelSubPriority = 0x0F;
NVIC_Init(&nvic_init);
ADC_Cmd(ADC1, ENABLE);
ADC_SoftwareStartConv(ADC1);
}
/**
* @brief Initializes and prepares the Media to perform audio data transfer
* from Media to the I2S peripheral.
* @param None
* @retval None
*/
void Audio_MAL_Init(uint32_t baseAddr0, uint32_t baseAddr1, uint32_t bufferSize, osThreadId toSignal)
{
main_ID = toSignal;
Codec_Init(OUTPUT_DEVICE_HEADPHONE, 200, 48000);
RCC_AHB1PeriphClockCmd(AUDIO_MAL_DMA_CLOCK, ENABLE);
DMA_DoubleBufferModeConfig(AUDIO_MAL_DMA_STREAM,baseAddr1, baseAddr0 );
DMA_DoubleBufferModeCmd(AUDIO_MAL_DMA_STREAM, ENABLE);
NVIC_InitTypeDef NVIC_InitStructure;
/* Enable the DMA clock */
/* Configure the DMA Stream */
//DMA_Cmd(AUDIO_MAL_DMA_STREAM, DISABLE);
/* Set the parameters to be configured */
DMA_InitStructure.DMA_Channel = AUDIO_MAL_DMA_CHANNEL;
DMA_InitStructure.DMA_PeripheralBaseAddr = AUDIO_MAL_DMA_DREG;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)baseAddr0; /* This field will be configured in play function */
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_BufferSize = bufferSize; /* This field will be configured in play function */
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = AUDIO_MAL_DMA_PERIPH_DATA_SIZE;
DMA_InitStructure.DMA_MemoryDataSize = AUDIO_MAL_DMA_MEM_DATA_SIZE;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(AUDIO_MAL_DMA_STREAM, &DMA_InitStructure);
/* Enable the selected DMA interrupts (selected in "stm32f4_discovery_eval_audio_codec.h" defines) */
DMA_ITConfig(AUDIO_MAL_DMA_STREAM, DMA_IT_TC, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = AUDIO_MAL_DMA_IRQ;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = EVAL_AUDIO_IRQ_PREPRIO;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = EVAL_AUDIO_IRQ_SUBRIO;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
SPI_I2S_DMACmd(CODEC_I2S, SPI_I2S_DMAReq_Tx, ENABLE);
DMA_Init(AUDIO_MAL_DMA_STREAM, &DMA_InitStructure);
/* Enable the I2S DMA Stream*/
DMA_Cmd(AUDIO_MAL_DMA_STREAM, ENABLE);
I2S_Cmd(SPI3,ENABLE);
}
