INLINE void RegSWrite(RegisterStruct* reg,u32 offset,u32 data) { #ifdef TRACE if (offset & 3/*(size-1)*/) //4 is min allign size { EMUERROR("unallinged register write"); } #endif offset>>=2; #ifdef TRACE if (reg[offset].flags & size) { #endif if (reg[offset].flags & REG_WRITE_DATA) { if (size==4) *reg[offset].data32=data; else if (size==2) *reg[offset].data16=(u16)data; else *reg[offset].data8=(u8)data; return; } else { if (reg[offset].flags & REG_CONST) EMUERROR("Error [Write to read olny register , const]"); else { if (reg[offset].writeFunction) { reg[offset].writeFunction(data); return; } else { if (!(reg[offset].flags& REG_NOT_IMPL)) EMUERROR("ERROR [Write to read olny register]"); } } } #ifdef TRACE } else { if (!(reg[offset].flags& REG_NOT_IMPL)) EMUERROR4("ERROR :wrong size write on register ; offset=%x , data=%x,sz=%d",offset,data,size); } #endif if ((reg[offset].flags& REG_NOT_IMPL)) EMUERROR3("Write to internal Regs , not implemented , offset=%x,data=%x",offset,data); }
u32 sb_ReadMem(u32 addr,u32 sz) { u32 offset = addr-SB_BASE; #ifdef TRACE if (offset & 3/*(size-1)*/) //4 is min align size { EMUERROR("Unaligned System Bus register read"); } #endif offset>>=2; #ifdef TRACE if (sb_regs[offset].flags & sz) { #endif if (!(sb_regs[offset].flags & (REG_RF|REG_WO))) { if (sz==4) return sb_regs[offset].data32; else if (sz==2) return sb_regs[offset].data16; else return sb_regs[offset].data8; } else { //printf("SB: %08X\n",addr); if ((sb_regs[offset].flags & REG_WO) || sb_regs[offset].readFunctionAddr == NULL) { EMUERROR("sb_ReadMem write-only reg %08x %d\n", addr, sz); return 0; } return sb_regs[offset].readFunctionAddr(addr); } #ifdef TRACE } else { if (!(sb_regs[offset].flags& REG_NOT_IMPL)) EMUERROR("ERROR [wrong size read on register]"); } #endif // if ((sb_regs[offset].flags& REG_NOT_IMPL)) // EMUERROR2("Read from System Control Regs , not implemented , addr=%x",addr); return 0; }
INLINE u32 RegSRead(RegisterStruct* reg,u32 offset) { #ifdef TRACE if (offset & 3/*(size-1)*/) //4 is min allign size { EMUERROR("unallinged register read"); } #endif offset>>=2; #ifdef TRACE if (reg[offset].flags& size) { #endif if (reg[offset].flags & REG_READ_DATA ) { if (size==4) return *reg[offset].data32; else if (size==2) return *reg[offset].data16; else return *reg[offset].data8; } else { if (reg[offset].readFunction) return reg[offset].readFunction(); else { if (!(reg[offset].flags& REG_NOT_IMPL)) EMUERROR("ERROR [readed write olny register]"); } } #ifdef TRACE } else { if (!(reg[offset].flags& REG_NOT_IMPL)) EMUERROR("ERROR [wrong size read on register]"); } #endif if (reg[offset].flags& REG_NOT_IMPL) EMUERROR2("Read from internal Regs , not implemented , offset=%x",offset); return 0; }
void sb_WriteMem(u32 addr,u32 data,u32 sz) { u32 offset = addr-SB_BASE; #ifdef TRACE if (offset & 3/*(size-1)*/) //4 is min align size { EMUERROR("Unaligned System bus register write"); } #endif offset>>=2; #ifdef TRACE if (sb_regs[offset].flags & sz) { #endif if (!(sb_regs[offset].flags & REG_WF) ) { if (sz==4) sb_regs[offset].data32=data; else if (sz==2) sb_regs[offset].data16=(u16)data; else sb_regs[offset].data8=(u8)data; return; } else { //printf("SBW: %08X\n",addr); sb_regs[offset].writeFunctionAddr(addr,data); /* if (sb_regs[offset].flags & REG_CONST) EMUERROR("Error [Write to read only register , const]"); else { if () { sb_regs[offset].writeFunction(data); return; } else { if (!(sb_regs[offset].flags& REG_NOT_IMPL)) EMUERROR("ERROR [Write to read only register]"); } }*/ return; } #ifdef TRACE } else { if (!(sb_regs[offset].flags& REG_NOT_IMPL)) EMUERROR4("ERROR :wrong size write on register ; offset=%x , data=%x,sz=%d",offset,data,sz); } if ((sb_regs[offset].flags& REG_NOT_IMPL)) EMUERROR3("Write to System Control Regs , not implemented , addr=%x,data=%x",addr,data); #endif }
void WriteBios(u32 addr,u32 data,u32 sz) { if (sz != 1) { EMUERROR("Invalid access size @%08x data %x sz %d\n", addr, data, sz); return; } sys_rom.Write(addr, data, sz); }