int s3c64xx_spi2_cfg_gpio(struct platform_device *dev)
{
int gpio;
if (soc_is_exynos5410()) {
s3c_gpio_cfgpin(EXYNOS5410_GPB1(1), S3C_GPIO_SFN(5));
s3c_gpio_setpull(EXYNOS5410_GPB1(1), S3C_GPIO_PULL_UP);
s3c_gpio_cfgall_range(EXYNOS5410_GPB1(3), 2,
S3C_GPIO_SFN(5), S3C_GPIO_PULL_UP);
for (gpio = EXYNOS5410_GPB1(1);
gpio < EXYNOS5410_GPB1(5); gpio++)
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV3);
} else if (soc_is_exynos5250()) {
s3c_gpio_cfgpin(EXYNOS5_GPB1(1), S3C_GPIO_SFN(5));
s3c_gpio_setpull(EXYNOS5_GPB1(1), S3C_GPIO_PULL_UP);
s3c_gpio_cfgall_range(EXYNOS5_GPB1(3), 2,
S3C_GPIO_SFN(5), S3C_GPIO_PULL_UP);
for (gpio = EXYNOS5_GPB1(1); gpio < EXYNOS5_GPB1(5); gpio++)
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV3);
} else {
s3c_gpio_cfgpin(EXYNOS4_GPC1(1), S3C_GPIO_SFN(5));
s3c_gpio_setpull(EXYNOS4_GPC1(1), S3C_GPIO_PULL_UP);
s3c_gpio_cfgall_range(EXYNOS4_GPC1(3), 2,
S3C_GPIO_SFN(5), S3C_GPIO_PULL_UP);
for (gpio = EXYNOS4_GPC1(1); gpio < EXYNOS4_GPC1(5); gpio++)
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV3);
}
return 0;
}
void exynos5_hs_i2c2_cfg_gpio(struct platform_device *dev)
{
if (soc_is_exynos5250())
s3c_gpio_cfgall_range(EXYNOS5_GPA0(6), 2,
S3C_GPIO_SFN(4), S3C_GPIO_PULL_UP);
else if (soc_is_exynos5410())
s3c_gpio_cfgall_range(EXYNOS5410_GPB1(3), 2,
S3C_GPIO_SFN(4), S3C_GPIO_PULL_UP);
else
pr_err("failed to configure gpio for hs-i2c2\n");
}
static int exynos_spdif_cfg_gpio(struct platform_device *pdev)
{
/* configure GPIO for SPDIF port */
if (soc_is_exynos5250())
s3c_gpio_cfgpin_range(EXYNOS5_GPB1(0), 2, S3C_GPIO_SFN(4));
else if (soc_is_exynos5410())
s3c_gpio_cfgpin_range(EXYNOS5410_GPB1(0), 2, S3C_GPIO_SFN(4));
else if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412())
s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(4));
return 0;
}
static int exynos_cfg_i2s_gpio(struct platform_device *pdev)
{
/* configure GPIO for i2s port */
struct exynos_gpio_cfg exynos4_cfg[3] = {
{ EXYNOS4_GPZ(0), 7, S3C_GPIO_SFN(2) },
{ EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(2) },
{ EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(2) }
};
struct exynos_gpio_cfg exynos5_cfg[3] = {
{ EXYNOS5_GPZ(0), 7, S3C_GPIO_SFN(2) },
{ EXYNOS5_GPB0(0), 5, S3C_GPIO_SFN(2) },
{ EXYNOS5_GPB1(0), 5, S3C_GPIO_SFN(2) }
};
struct exynos_gpio_cfg exynos5410_cfg[3] = {
{ EXYNOS5410_GPZ(0), 7, S3C_GPIO_SFN(2) },
{ EXYNOS5410_GPB0(0), 5, S3C_GPIO_SFN(2) },
{ EXYNOS5410_GPB1(0), 5, S3C_GPIO_SFN(2) }
};
struct exynos_gpio_cfg exynos5420_cfg[3] = {
{ EXYNOS5420_GPZ(0), 7, S3C_GPIO_SFN(2) },
{ EXYNOS5420_GPB0(0), 5, S3C_GPIO_SFN(2) },
{ EXYNOS5420_GPB1(0), 5, S3C_GPIO_SFN(2) }
};
if (pdev->id < 0 || pdev->id > 2) {
printk(KERN_ERR "Invalid Device %d\n", pdev->id);
return -EINVAL;
}
if (soc_is_exynos5250())
s3c_gpio_cfgpin_range(exynos5_cfg[pdev->id].addr,
exynos5_cfg[pdev->id].num, exynos5_cfg[pdev->id].bit);
else if (soc_is_exynos5410())
s3c_gpio_cfgpin_range(exynos5410_cfg[pdev->id].addr,
exynos5410_cfg[pdev->id].num, exynos5410_cfg[pdev->id].bit);
else if (soc_is_exynos5420())
s3c_gpio_cfgpin_range(exynos5420_cfg[pdev->id].addr,
exynos5420_cfg[pdev->id].num, exynos5420_cfg[pdev->id].bit);
else if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412())
s3c_gpio_cfgpin_range(exynos4_cfg[pdev->id].addr,
exynos4_cfg[pdev->id].num, exynos4_cfg[pdev->id].bit);
return 0;
}
.hpdet_cb = adonisuniv_wm5102_hpdet_cb,
#endif
.hpdet_id_gpio = S3C_GPIO_END + 3,
.hpdet_acc_id = true,
.jd_gpio5 = true,
.jd_gpio5_nopull = true,
.init_done = wm5102_init_done,
.max_channels_clocked = {
[0] = 2,
}
};
#ifdef MODE_WM5102_SPI
static struct s3c64xx_spi_csinfo spi_audio_csi[] = {
[0] = {
.line = EXYNOS5410_GPB1(2),
.set_level = gpio_set_value,
.fb_delay = 0x2,
},
};
static struct spi_board_info spi_board_info[] __initdata = {
{
.modalias = "wm5102",
.platform_data = &arizona_platform_data,
.max_speed_hz = 10*1000*1000,
.bus_num = WM5102_BUS_NUM,
.chip_select = 0,
.mode = SPI_MODE_0,
.irq = IRQ_EINT(21),
.controller_data = &spi_audio_csi[0],
.use_dma = 1,
};
#ifdef CONFIG_MODEM_SC8803G_CONTROL
static struct platform_device m69_mdm_device = {
.name = "sc880xg-modem",
.id = -1,
.dev = {
.platform_data = &default_mdm_data,
},
};
#endif // CONFIG_MODEM_SC8803G_CONTROL
static struct s3c64xx_spi_csinfo spi2_csi[] = {
[0] = {
.line = EXYNOS5410_GPB1(2),
.set_level = gpio_set_value,
.fb_delay = 0x1,
},
};
static struct spi_board_info spi2_board_info[] __initdata = {
{
.modalias = "sc880xg-spi",
.platform_data = &default_mdm_data,
.max_speed_hz = 12*1000*1000,
.bus_num = 2,
.chip_select = 0,
.mode = SPI_MODE_1,
.data_not_swap = 1,
.controller_data = &spi2_csi[0],
