int cypress_update( int HW_ver )
{
// -- This example section of commands show the high-level calls to -------
// -- perform Target Initialization, SilcionID Test, Bulk-Erase, Target ---
// -- RAM Load, FLASH-Block Program, and Target Checksum Verification. ----
unsigned char fIsError = 0;
// unsigned char bTry=0;
// >>>> ISSP Programming Starts Here <<<<
// ioctl(touch_fd, DEV_CTRL_TOUCH_INT_DISABLE,NULL);
// ioctl(touch_fd, DEV_CTRL_TOUCH_SET_FLAG,NULL);
printk(KERN_INFO "[TSP] %s, %d, HW ver=%d\n", __func__, __LINE__,HW_ver);
#if defined(CONFIG_MACH_GIO)
if( HW_ver == 1)
pSocData = Firmware_Data_HW1;
else if ( HW_ver == 2 )
pSocData = Firmware_Data_HW2;
else if ( HW_ver == 3 || HW_ver == 0 )
pSocData = Firmware_Data_HW3;
else if ( HW_ver == 17 )
pSocData = Firmware_Data_HW11;
else if ( HW_ver == 33 )
pSocData = Firmware_Data_HW21;
else if ( HW_ver == 34)
pSocData = Firmware_Data_HW22;
else if ( HW_ver == 35)
pSocData = Firmware_Data_HW23;
#elif defined(CONFIG_MACH_COOPER)
if( HW_ver == 4 || HW_ver == 3 || HW_ver == 0 )
pSocData = Firmware_Data_HW3;
#else
if( HW_ver == 1 )
pSocData = Firmware_Data_HW1;
else if( HW_ver == 2 )
pSocData = Firmware_Data_HW2;
else if( HW_ver == 3 )
pSocData = Firmware_Data_HW3;
else if( HW_ver == 4 )
pSocData = Firmware_Data_HW4;
#endif
else
{
printk(KERN_INFO "[TSP] %s, %d, HW ver is wrong!!\n", __func__, __LINE__);
goto update_err;
}
#ifdef TX_ON
UART_Start();
UART_CPutString("Start HSSP - Ovation");
UART_PutCRLF();
#endif
// >>>> ISSP Programming Starts Here <<<<
// Acquire the device through reset or power cycle
#ifdef RESET_MODE
UART_CPutString("Reset Mode activated");
#else
// UART_CPutString("Power Cycle Mode activated");
// Initialize the Host & Target for ISSP operations
fIsError = fPowerCycleInitializeTargetForISSP();
if (fIsError )
{
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
#endif
// printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("Verify SiliconID");
#endif
// printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
// Run the SiliconID Verification, and proceed according to result.
#if !defined(CONFIG_MACH_TASS) && !defined(CONFIG_MACH_TASSDT) && !defined(CONFIG_MACH_GIO)
fIsError = fVerifySiliconID();
#endif
if (fIsError )
{
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("End VerifySiliconID");
#endif
// printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
#if 1
// Bulk-Erase the Device.
fIsError = fEraseTarget();
if (fIsError )
{
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
// printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("End EraseTarget");
UART_PutCRLF();
UART_CPutString("Program Flash Blocks Start");
UART_PutCRLF();
#endif
#endif
// printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
#if 1 // program flash block
//LCD_Char_Position(1, 0);
//LCD_Char_PrintString("Program Flash Blocks Start");
//==============================================================//
// Program Flash blocks with predetermined data. In the final application
// this data should come from the HEX output of PSoC Designer.
iChecksumData = 0; // Calculte the device checksum as you go
for (iBlockCounter=0; iBlockCounter<BLOCKS_PER_BANK; iBlockCounter++)
{
fIsError = fReadWriteSetup();
if (fIsError )
{
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
//LoadProgramData(bBankCounter, (unsigned char)iBlockCounter);
iChecksumData += iLoadTarget(iBlockCounter);
fIsError = fProgramTargetBlock(bBankCounter,(unsigned char)iBlockCounter);
if (fIsError )
{
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
fIsError = fReadStatus();
if (fIsError)
{
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
#ifdef TX_ON
UART_PutChar('#');
#endif
}
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("Program Flash Blocks End");
#endif
#endif
#if 1 // verify
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("Verify Start");
UART_PutCRLF();
#endif
//=======================================================//
//PTJ: Doing Verify
//PTJ: this code isnt needed in the program flow because we use PROGRAM-AND-VERIFY (ProgramAndVerify SROM Func)
//PTJ: which has Verify built into it.
// Verify included for completeness in case host desires to do a stand-alone verify at a later date.
for (iBlockCounter=0; iBlockCounter<BLOCKS_PER_BANK; iBlockCounter++)
{
//LoadProgramData(bBankCounter, (unsigned char) iBlockCounter);
fIsError = fReadWriteSetup();
if (fIsError )
{
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
fIsError = fVerifySetup(bBankCounter,(unsigned char)iBlockCounter);
if (fIsError)
{
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
fIsError = fReadStatus();
if (fIsError ) {
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
fIsError = fReadWriteSetup();
if (fIsError) {
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
fIsError = fReadByteLoop(iBlockCounter);
if (fIsError ) {
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
#ifdef TX_ON
UART_PutChar('.');
#endif
}
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("Verify End");
#endif
#endif // end verify
#if 1
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("Security Start");
#endif
//=======================================================//
// Program security data into target PSoC. In the final application this
// data should come from the HEX output of PSoC Designer.
for (bBankCounter=0; (bBankCounter<NUM_BANKS) ; bBankCounter++)
{
//PTJ: READ-WRITE-SETUP used here to select SRAM Bank 1
fIsError = fReadWriteSetup();
if (fIsError )
{
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
// Load one bank of security data from hex file into buffer
fIsError = fLoadSecurityData(bBankCounter);
if (fIsError )
{
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
// Secure one bank of the target flash
fIsError = fSecureTargetFlash();
if (fIsError )
{
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
}
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("End Security data");
#endif
#endif
#if 1 // checksum
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("CheckSum Start");
#endif
// printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
//PTJ: Doing Checksum
iChecksumTarget = 0;
fIsError = fAccTargetBankChecksum(&iChecksumTarget);
if (fIsError )
{
printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
ErrorTrap(fIsError);
goto update_err;
}
// printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("Checksum : iChecksumTarget (0x");
UART_PutHexWord(iChecksumTarget);
UART_CPutString("), iChecksumData (0x");
UART_PutHexWord(iChecksumData);
UART_CPutString(")");
#endif
iChecksumTarget = iChecksumTarget & 0xFFFF;
iChecksumData = iChecksumData & 0xFFFF;
if (iChecksumTarget != iChecksumData)
{
printk(KERN_INFO "[TSP] %s, %d, iChecksumTarget=%d, iChecksumData=%d\n", __func__, __LINE__,iChecksumTarget, iChecksumData );
ErrorTrap(CHECKSUM_ERROR);
goto update_err;
}
#ifdef TX_ON
UART_PutCRLF();
UART_CPutString("End Checksum");
#endif
#endif
// *** SUCCESS ***
// At this point, the Target has been successfully Initialize, ID-Checked,
// Bulk-Erased, Block-Loaded, Block-Programmed, Block-Verified, and Device-
// Checksum Verified.
// You may want to restart Your Target PSoC Here.
ReStartTarget();
// printk(KERN_INFO "[TSP] %s, %d\n", __func__, __LINE__);
return 1;
update_err:
return 0;
}
int touch_update_main(unsigned char bBlack)
{
int retval = PASS;
// -- This example section of commands show the high-level calls to -------
// -- perform Target Initialization, SilcionID Test, Bulk-Erase, Target ---
// -- RAM Load, FLASH-Block Program, and Target Checksum Verification. ----
// >>>> ISSP Programming Starts Here <<<<
CYTTSP_DBG(">>>> ISSP Programming Starts <<<<\n");
// Acquire the device through reset or power cycle
#ifdef RESET_MODE
// Initialize the Host & Target for ISSP operations
if (fIsError = fXRESInitializeTargetForISSP())
{
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
#else
// Initialize the Host & Target for ISSP operations
fIsError = fPowerCycleInitializeTargetForISSP();
if (fIsError)
{
CYTTSP_DBG( "error - Initialize target for ISSP : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
#endif
CYTTSP_DBG(">>>> Run the SiliconID Verification, and proceed according to result <<<<\n");
// Run the SiliconID Verification, and proceed according to result.
fIsError = fVerifySiliconID();
if (fIsError)
{
CYTTSP_DBG( "error - siliconID verification : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
CYTTSP_DBG(">>>> Bulk-Erase the Device <<<<\n");
#if 1
// Bulk-Erase the Device.
fIsError = fEraseTarget();
if (fIsError)
{
CYTTSP_DBG("error - bulk-erase : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
#endif
CYTTSP_DBG(">>>> program flash block <<<<\n");
#if 1 // program flash block
//==============================================================//
// Program Flash blocks with predetermined data. In the final application
// this data should come from the HEX output of PSoC Designer.
binary_index = 0;
iChecksumData = 0; // Calculte the device checksum as you go
for (iBlockCounter=0; iBlockCounter<BLOCKS_PER_BANK; iBlockCounter++)
{
msleep(1);
fIsError = fReadWriteSetup();
if (fIsError)
{
CYTTSP_DBG("error - fReadWriteSetup : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
LoadProgramData(bBankCounter, (unsigned char)iBlockCounter, bBlack);
iChecksumData += iLoadTarget();
fIsError = fProgramTargetBlock(bBankCounter,(unsigned char)iBlockCounter);
if (fIsError)
{
CYTTSP_DBG("error - fProgramTargetBlock : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
// printk("Write Block: %d\n", iBlockCounter);
fIsError = fReadStatus();
if (fIsError)
{
CYTTSP_DBG("error - fReadStatus : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
}
#endif
CYTTSP_DBG(">>>> verify <<<<\n");
#if 0 // verify
//=======================================================//
//PTJ: Doing Verify
//PTJ: this code isnt needed in the program flow because we use PROGRAM-AND-VERIFY (ProgramAndVerify SROM Func)
//PTJ: which has Verify built into it.
// Verify included for completeness in case host desires to do a stand-alone verify at a later date.
binary_index = 0;
for (iBlockCounter=0; iBlockCounter<BLOCKS_PER_BANK; iBlockCounter++)
{
LoadProgramData(bBankCounter, (unsigned char) iBlockCounter);
fIsError = fReadWriteSetup();
if (fIsError)
{
CYTTSP_DBG("error - fReadWriteSetup : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
fIsError = fVerifySetup(bBankCounter,(unsigned char)iBlockCounter);
if (fIsError)
{
CYTTSP_DBG("error - fVerifySetup : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
fIsError = fReadStatus();
if (fIsError)
{
CYTTSP_DBG("error - fReadStatus : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
fIsError = fReadWriteSetup();
if (fIsError)
{
CYTTSP_DBG("error - fReadWriteSetup : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
fIsError = fReadByteLoop();
if (fIsError)
{
CYTTSP_DBG("error - fReadByteLoop : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
}
#endif // end verify
CYTTSP_DBG(">>>> Program security data <<<<\n");
#if 1
//=======================================================//
// Program security data into target PSoC. In the final application this
// data should come from the HEX output of PSoC Designer.
abSecurityDataPtr = 0;
for (bBankCounter=0; bBankCounter<NUM_BANKS; bBankCounter++)
{
//PTJ: READ-WRITE-SETUP used here to select SRAM Bank 1
fIsError = fReadWriteSetup();
if (fIsError)
{
CYTTSP_DBG("error - fReadWriteSetup : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
// Load one bank of security data from hex file into buffer
fIsError = fLoadSecurityData(bBankCounter);
if (fIsError)
{
CYTTSP_DBG("error - fLoadSecurityData : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
// Secure one bank of the target flash
fIsError = fSecureTargetFlash();
if (fIsError)
{
CYTTSP_DBG("error - fSecureTargetFlash : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
}
#endif
CYTTSP_DBG(">>>> checksum <<<<\n");
#if 1 // checksum
//Doing Checksum
iChecksumTarget = 0;
fIsError = fAccTargetBankChecksum(&iChecksumTarget);
if (fIsError)
{
CYTTSP_DBG("error - fAccTargetBankChecksum : %d\n", fIsError);
retval = fIsError;
ErrorTrap(fIsError);
return fIsError;
}
iChecksumData = iChecksumData & 0xFFFF; //jpmoks : to be deleted.
if (iChecksumTarget != iChecksumData)
{
CYTTSP_DBG("error - checksum is different\n");
retval = fIsError;
ErrorTrap(CHECKSUM_ERROR);
return fIsError;
}
#endif
// *** SUCCESS ***
// At this point, the Target has been successfully Initialize, ID-Checked,
// Bulk-Erased, Block-Loaded, Block-Programmed, Block-Verified, and Device-
// Checksum Verified.
// You may want to restart Your Target PSoC Here.
ReStartTarget();
CYTTSP_DBG(">>>> firmware update success <<<<\n");
return retval;
}
void initTimeBase(void)
{
uint16_t PrescalerValue = 0;
#if defined(TIMEBASE_INT1_FREQ)
if ((SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT1_FREQ - 1) < 1)
{
printf("TIMEBASE period 1 is too large. Increase frequency or decrease clock.");
ErrorTrap(ERROR_TIMEBASE_CONFIG);
}
#endif
#if defined(TIMEBASE_INT2_FREQ)
if ((SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT2_FREQ - 1) < 1)
{
printf("TIMEBASE period 2 is too large. Increase frequency or decrease clock.");
ErrorTrap(ERROR_TIMEBASE_CONFIG);
}
#endif
#if defined(TIMEBASE_INT3_FREQ)
if ((SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT3_FREQ - 1) < 1)
{
printf("TIMEBASE period 3 is too large. Increase frequency or decrease clock.");
ErrorTrap(ERROR_TIMEBASE_CONFIG);
}
#endif
#if defined(TIMEBASE_INT4_FREQ)
if ((SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT4_FREQ - 1) < 1)
{
printf("TIMEBASE period 4 is too large. Increase frequency or decrease clock.");
ErrorTrap(ERROR_TIMEBASE_CONFIG);
}
#endif
NVIC_InitTypeDef NVIC_InitStructure;
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
/* TIM clock enable */
#if defined(STM32F303xC)
#if TIMEBASE_TIMER == 2 || TIMEBASE_TIMER == 3 || TIMEBASE_TIMER == 4 || TIMEBASE_TIMER == 6 || TIMEBASE_TIMER == 7
RCC_APB1PeriphClockCmd(MAKENAME(RCC_APB1Periph_TIM,TIMEBASE_TIMER), ENABLE);
#elif TIMEBASE_TIMER == 1 || TIMEBASE_TIMER == 8 || TIMEBASE_TIMER == 15 || TIMEBASE_TIMER == 16 || TIMEBASE_TIMER == 17
RCC_APB2PeriphClockCmd(MAKENAME(RCC_APB2Periph_TIM,TIMEBASE_TIMER), ENABLE);
#endif
#elif defined(STM32F37X)
#if TIMEBASE_TIMER == 15 || TIMEBASE_TIMER == 16 || TIMEBASE_TIMER == 17 || TIMEBASE_TIMER == 19
RCC_APB2PeriphClockCmd(MAKENAME(RCC_APB2Periph_TIM,TIMEBASE_TIMER), ENABLE);
#else
RCC_APB1PeriphClockCmd(MAKENAME(RCC_APB1Periph_TIM,TIMEBASE_TIMER), ENABLE);
#endif
#else
#error("Unrecognized target. The Makefile should define one of the following: {STM32F37X, STM32F303xC}")
#endif
/* Enable the TIM gloabal Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = MAKENAME(TIMER_INTERRUPT,n);
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Compute the prescaler value */
PrescalerValue = (uint16_t) (TIMEBASE_CLOCK_PSC - 1);
/* Time base configuration */
#if TIMEBASE_TIMER == 6 || TIMEBASE_TIMER == 7 || TIMEBASE_TIMER == 18
TIM_TimeBaseStructure.TIM_Period = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT1_FREQ - 1);
/* TIM Interrupts enable */
TIM_ITConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_Update, ENABLE);
#else
#if TIMEBASE_TIMER == 2 || TIMEBASE_TIMER == 5
TIM_TimeBaseStructure.TIM_Period = 4294967295;
#else
TIM_TimeBaseStructure.TIM_Period = 65535;
#endif
#endif
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(MAKENAME(TIM,TIMEBASE_TIMER), &TIM_TimeBaseStructure);
/* Prescaler configuration */
TIM_PrescalerConfig(MAKENAME(TIM,TIMEBASE_TIMER), PrescalerValue, TIM_PSCReloadMode_Immediate);
#if TIMEBASE_TIMER != 6 && TIMEBASE_TIMER != 7 && TIMEBASE_TIMER != 18
/* Output Compare Timing Mode configuration: Channel1 */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Timing;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT1_FREQ - 1);
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OC1Init(MAKENAME(TIM,TIMEBASE_TIMER), &TIM_OCInitStructure);
TIM_OC1PreloadConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_OCPreload_Disable);
/* TIM Interrupts enable */
TIM_ITConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_CC1, ENABLE);
#if defined(TIMEBASE_INT2_FREQ) && TIMEBASE_TIMER != 13 && TIMEBASE_TIMER != 14 && TIMEBASE_TIMER != 16 && TIMEBASE_TIMER != 17
/* Output Compare Timing Mode configuration: Channel2 */
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT2_FREQ - 1);
TIM_OC2Init(MAKENAME(TIM,TIMEBASE_TIMER), &TIM_OCInitStructure);
TIM_OC2PreloadConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_OCPreload_Disable);
/* TIM Interrupts enable */
TIM_ITConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_IT_CC2, ENABLE);
#if defined(TIMEBASE_INT3_FREQ) && TIMEBASE_TIMER != 12 && TIMEBASE_TIMER != 15
/* Output Compare Timing Mode configuration: Channel3 */
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT3_FREQ - 1);
TIM_OC3Init(MAKENAME(TIM,TIMEBASE_TIMER), &TIM_OCInitStructure);
TIM_OC3PreloadConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_OCPreload_Disable);
/* TIM Interrupts enable */
TIM_ITConfig(MAKENAME(TIM,TIMEBASE_TIMER),TIM_IT_CC3, ENABLE);
#ifdef TIMEBASE_INT4_FREQ
/* Output Compare Timing Mode configuration: Channel4 */
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = (TIMEBASE_SIZE) (SystemCoreClock/TIMEBASE_CLOCK_PSC / TIMEBASE_INT4_FREQ - 1);
TIM_OC4Init(MAKENAME(TIM,TIMEBASE_TIMER), &TIM_OCInitStructure);
TIM_OC4PreloadConfig(MAKENAME(TIM,TIMEBASE_TIMER), TIM_OCPreload_Disable);
/* TIM Interrupts enable */
TIM_ITConfig(MAKENAME(TIM,TIMEBASE_TIMER),TIM_IT_CC4, ENABLE);
#endif //TIMEBASE_INT4_FREQ
#endif //defined(TIMEBASE_INT3_FREQ) && TIMEBASE_TIMER != 12 && TIMEBASE_TIMER != 15
#endif //defined(TIMEBASE_INT2_FREQ) && TIMEBASE_TIMER != 13 && TIMEBASE_TIMER != 14 && TIMEBASE_TIMER != 16 && TIMEBASE_TIMER != 17
#endif //TIMEBASE_TIMER != 6 || TIMEBASE_TIMER != 7 || TIMEBASE_TIMER != 18
/* TIM enable counter */
//TIM_Cmd(MAKENAME(TIM,TIMEBASE_TIMER), ENABLE); //Don't do this here, require a PlayTimebase call! Everyone loves PlayTime...base. All your base belong to PlayTime?
}
signed char download_firmware_main(char *filename)
{
struct file *filp;
struct inode *inode = NULL;
int length = 0, remaining = 0, count = 0;
mm_segment_t oldfs;
char *fw_buf = NULL, *buffer;
oldfs = get_fs();
set_fs(KERNEL_DS);
filp = filp_open(filename, O_RDONLY, S_IRUSR);
if (IS_ERR(filp)) {
pr_info("%s: file %s filp_open error, is_err = %x\n", __func__, filename, (int)IS_ERR(filp));
return -EIO;
}
if (!filp->f_op) {
pr_info("%s: File Operation Method Error\n", __func__);
return -EIO;
}
inode = filp->f_path.dentry->d_inode;
if (!inode) {
pr_info("%s: Get inode from filp failed\n", __func__);
filp_close(filp, NULL);
return -EIO;
}
pr_info("%s file offset opsition: %xh\n", __func__, (unsigned)filp->f_pos);
length = i_size_read(inode->i_mapping->host);
if (length == 0) {
pr_info("%s: Try to get file size error\n", __func__);
goto Transfer_DONE;
}
pr_info("%s: length=%d\n", __func__, length);
fw_buf = (char *)kmalloc((length + 1), GFP_KERNEL);
if (fw_buf == NULL) {
pr_info("%s: kernel memory alloc error\n", __func__);
filp_close(filp, NULL);
return -EIO;
}
if (filp->f_op->read(filp, fw_buf, length, &filp->f_pos) != length) {
pr_info("%s: file read error\n", __func__);
goto Transfer_DONE;
}
/* >>>> ISSP Programming Starts Here <<<< */
#ifdef RESET_MODE
fIsError = fXRESInitializeTargetForISSP();
if (fIsError) {
pr_info("power on failed!\n");
ErrorTrap(fIsError);
}
pr_info("power on success!\n");
#else
/* Initialize the Host & Target for ISSP operations */
fIsError = fPowerCycleInitializeTargetForISSP();
if (fIsError) {
pr_info("power on failed!\n");
ErrorTrap(fIsError);
}
pr_info("power on success!\n");
#endif
/* Run the SiliconID Verification, and proceed according to result. */
fIsError = fVerifySiliconID();
if (fIsError) {
pr_info("SiliconID Verification failed!\n");
ErrorTrap(fIsError);
return -EIO;
}
pr_info("SiliconID Verification success!\n");
/*-----------------------------------------------------------------------
xch: the function call below will erase one block (128bytes) of flash
in the target device. The block number to be erased is passed in
as a parameter
fEraseBlock(5); // arbitrarily used the 5th block for debugging purposes
--------------------------------------------------------------------------
*/
fIsError = fEraseTarget();
if (fIsError)
ErrorTrap(fIsError);
pr_info("erase one block success!\n");
/* ==============================================================//
Program Flash blocks with predetermined data. In the final application
this data should come from the HEX output of PSoC Designer.
firmware_transfer(tgt_fw);
*/
remaining = length;
buffer = fw_buf;
iChecksumData = 0; /* Calculte the device checksum as you go */
for (bBankCounter = 0; bBankCounter < NUM_BANKS; bBankCounter++) {
for (iBlockCounter = 0; iBlockCounter < BLOCKS_PER_BANK; iBlockCounter++) {
/* count = (remaining > TARGET_DATABUFF_LEN)? TARGET_DATABUFF_LEN : remaining; */
LoadProgramData(bBankCounter, (unsigned char)iBlockCounter, buffer, count);
/*
This loads the host with test data, not the DUT
if(iBlockCounter==1)
return;
remaining = remaining - count;
buffer = &fw_buf[count * (iBlockCounter+1)];
*/
iChecksumData += iLoadTarget(); /* This loads the DUT */
#ifdef USE_TP
SetTPHigh(); /* Only used of Test Points are enabled */
#endif
fIsError = fProgramTargetBlock(bBankCounter, (unsigned char)iBlockCounter);
if (fIsError)
ErrorTrap(fIsError);
#ifdef USE_TP
SetTPLow(); /* Only used of Test Points are enabled */
#endif
fIsError = fReadStatus();
if (fIsError) /* READ-STATUS after PROGRAM-AND-VERIFY */
ErrorTrap(fIsError);
}
}
pr_info("Program Flash blocks with predetermined data success.\n");
/*=======================================================//
Doing Verify
Verify included for completeness in case host desires to do a
stand-alone verify at a later date.
*/
remaining = length;
buffer = fw_buf;
for (bBankCounter = 0; bBankCounter < NUM_BANKS; bBankCounter++) {
for (iBlockCounter = 0; iBlockCounter < BLOCKS_PER_BANK; iBlockCounter++) {
/* LoadProgramData(bBankCounter, (unsigned char) iBlockCounter,buffer,count);
count = (remaining > TARGET_DATABUFF_LEN)? TARGET_DATABUFF_LEN : remaining;
*/
LoadProgramData(bBankCounter, (unsigned char)iBlockCounter, buffer, count);
/* This loads the host with test data, not the DUT
remaining = remaining - count;
buffer = &fw_buf[count * (iBlockCounter+1)];
*/
fIsError = fVerifySetup(bBankCounter, (unsigned char)iBlockCounter);
if (fIsError) {
pr_info("fVerifySetup err = %d\n", fIsError);
ErrorTrap(fIsError);
}
fIsError = fReadStatus();
if (fIsError) {
pr_info("fReadStatus err = %d\n", fIsError);
ErrorTrap(fIsError);
}
fIsError = fReadByteLoop();
if (fIsError) {
pr_info("fReadByteLoop err = %d\n", fIsError);
ErrorTrap(fIsError);
}
}
}
pr_info("Doing Verify success.\n");
/*---------------------------------------------------------------------------
xch: the function call below will erase one block (128bytes) of flash
in the target device. The block number to be erased is passed in
as a parameter
fEraseBlock(5); // arbitrarily used the 5th block for debugging purposes
-----------------------------------------------------------------------------*/
/* =======================================================
Program security data into target PSoC. In the final application
this data should come from the HEX output of PSoC Designer
*/
for (bBankCounter = 0; bBankCounter < NUM_BANKS; bBankCounter++) {
/* Load one bank of security data from hex file into buffer */
fIsError = fLoadSecurityData(bBankCounter, buffer);
if (fIsError)
ErrorTrap(fIsError);
/* Secure one bank of the target flash */
fIsError = fSecureTargetFlash();
if (fIsError)
ErrorTrap(fIsError);
}
pr_info("set securitydata success\n");
/* ==============================================================
Do VERIFY-SECURITY after SECURE
Load one bank of security data from hex file into buffer
loads abTargetDataOUT[] with security data that was used in secure
bit stream
*/
fIsError = fLoadSecurityData(bBankCounter, buffer);
if (fIsError)
ErrorTrap(fIsError);
fIsError = fVerifySecurity();
if (fIsError)
ErrorTrap(fIsError);
/* =======================================================
Doing Checksum after VERIFY-SECURITY
*/
iChecksumTarget = 0;
for (bBankCounter = 0; bBankCounter < NUM_BANKS; bBankCounter++) {
fIsError = fAccTargetBankChecksum(&iChecksumTarget);
if (fIsError)
ErrorTrap(fIsError);
}
pr_info("%s: checksum = %x\n", __func__, iChecksumTarget);
if (iChecksumTarget != (iChecksumData & 0xFFFF))
ErrorTrap(VERIFY_ERROR);
pr_info("checksum success!\n");
pr_info("download firmware success!\n");
/* *** SUCCESS ***
At this point, the Target has been successfully Initialize,
ID-Checked, Bulk-Erased, Block-Loaded, Block-Programmed,
Block-Verified, and Device-
Checksum Verified.
*/
return 0;
Transfer_DONE:
kfree(fw_buf);
filp_close(filp, NULL);
set_fs(oldfs);
return -EIO;
}