コード例 #1
0
ファイル: ipl.c プロジェクト: rmblair/h390-sandhawk 
/*-------------------------------------------------------------------*/
int ARCH_DEP(initial_cpu_reset) (REGS *regs)
{
    int rc1 = 0, rc;

    /* Clear reset pending indicators */
    regs->sigpireset = regs->sigpreset = 0;

    /* Clear the registers */
    memset ( &regs->psw, 0,           sizeof(regs->psw)           );
    memset ( &regs->captured_zpsw, 0, sizeof(regs->captured_zpsw) );
#ifndef NOCHECK_AEA_ARRAY_BOUNDS
    memset ( &regs->cr_struct, 0,     sizeof(regs->cr_struct)     );
#else
    memset ( &regs->cr, 0,            sizeof(regs->cr)            );
#endif
    regs->fpc    = 0;
    regs->PX     = 0;
    regs->psw.AMASK_G = AMASK24;

    /* Ensure memory sizes are properly indicated */
    regs->mainstor = sysblk.mainstor;
    regs->storkeys = sysblk.storkeys;
    regs->mainlim  = sysblk.mainsize ? (sysblk.mainsize - 1) : 0;
    regs->psa      = (PSA_3XX*)regs->mainstor;

    /* Perform a CPU reset (after setting PSA) */
    rc1 = ARCH_DEP(cpu_reset) (regs);

    regs->todpr  = 0;
    regs->clkc   = 0;
    set_cpu_timer(regs, 0);
#ifdef _FEATURE_INTERVAL_TIMER
    set_int_timer(regs, 0);
#endif

    /* The breaking event address register is initialised to 1 */
    regs->bear = 1;

    /* Initialize external interrupt masks in control register 0 */
    regs->CR(0) = CR0_XM_INTKEY | CR0_XM_EXTSIG |
      (FACILITY_ENABLED(INTERVAL_TIMER, regs) ? CR0_XM_ITIMER : 0);

#if defined(FEATURE_S370_CHANNEL) && !defined(FEATURE_ACCESS_REGISTERS)
    /* For S/370 initialize the channel masks in CR2 */
    regs->CR(2) = 0xFFFFFFFF;
#endif /* defined(FEATURE_S370_CHANNEL) && !defined(FEATURE_ACCESS_REGISTERS) */

    regs->chanset =
#if defined(FEATURE_CHANNEL_SWITCHING)
                    regs->cpuad < FEATURE_LCSS_MAX ? regs->cpuad :
#endif /*defined(FEATURE_CHANNEL_SWITCHING)*/
                                                                   0xFFFF;

    /* Initialize the machine check masks in control register 14 */
    regs->CR(14) = CR14_CHKSTOP | CR14_SYNCMCEL | CR14_XDMGRPT;

#ifndef FEATURE_LINKAGE_STACK
    /* For S/370 initialize the MCEL address in CR15 */
    regs->CR(15) = 512;
#endif /*!FEATURE_LINKAGE_STACK*/

    if(regs->host && regs->guestregs)
      if( (rc = ARCH_DEP(initial_cpu_reset)(regs->guestregs)) )
        rc1 = rc;

#ifdef FEATURE_MESSAGE_SECURITY_ASSIST_EXTENSION_3
    renew_wrapping_keys();
#endif /* FEATURE_MESSAGE_SECURITY_ASSIST_EXTENSION_3 */

    return rc1;
} /* end function initial_cpu_reset */
コード例 #2
0
ファイル: hdiagf18.c プロジェクト: josejamilena/hercules-390 
void ARCH_DEP(diagf18_call) (int r1, int r2, REGS *regs)
{
/* Guest related paramters and values                                */
U16     options;                     /* supplied options             */

#if 0
    if (sizeof(CPB) != 16)
    {
        logmsg("CPB size not 8: %d\n",sizeof(CPB));
    }
#endif


    /* Specification exception if Rx is not even/odd or facility not enabled */
    if ( (!FACILITY_ENABLED(HOST_RESOURCE_ACCESS,regs)) ||
         ((r1 & 0x1) != 0)
       )
    {
        ARCH_DEP(program_interrupt) (regs, PGM_SPECIFICATION_EXCEPTION);
    }

    switch(regs->GR_L(r1))
    {

/*--------------------------------------------------------*/
/* Perform the Query Operation                            */
/*--------------------------------------------------------*/
    case QUERY:

        /* Specification exception if CPB is not on a doubleword boundary */
        if ( (regs->GR(2) & 0x7 ) !=0 )
        {
            ARCH_DEP(program_interrupt) (regs, PGM_SPECIFICATION_EXCEPTION);
        }

        /* Store the CPB at the designated location */
        ARCH_DEP(wstorec)
            (&cap,(BYTE)sizeof(CPB)-1,(VADR)GR_A(r2,regs),USE_REAL_ADDR,regs);

        break;

#if defined(CSOCKET)
/*--------------------------------------------------------*/
/* Perform Socket Function in Compatibility Mode          */
/*--------------------------------------------------------*/
    case CSOCKET:

#if defined(FEATURE_ESAME)
        if (regs->psw.amode64)
        {
            ARCH_DEP(program_interrupt) (regs, PGM_SPECIFICATION_EXCEPTION);
        }
#endif /* defined(ESAME) */
         break;

#endif /* defined(CSOCKET) */

#if defined(CFILE)
/*--------------------------------------------------------*/
/* Perform File Operation in Compatibility Mode           */
/*--------------------------------------------------------*/
    case CFILE:

#if defined(FEATURE_ESAME)
        if (regs->psw.amode64)
        {
            ARCH_DEP(program_interrupt) (regs, PGM_SPECIFICATION_EXCEPTION);
        }
#endif /* defined(ESAME) */

        options = df18_ck_opts
            ( (U16)regs->GR_L(r1+1) & 0x0000FFFF, (U16) COMPAT_INVALID, regs );

        /* Retrieve the Parameter Block address from Ry */
        ARCH_DEP(hdiagf18_FC) (options, (VADR)GR_A(r2,regs), regs);

        break;

#endif /* defined(CFILE) */

#if defined(NSOCKET)
/*--------------------------------------------------------*/
/* Perform Socket Function in Native Mode                 */
/*--------------------------------------------------------*/
    case NSOCKET:
        break;

#endif /* defined(NSOCKET) */

#if defined(NFILE)
/*--------------------------------------------------------*/
/* Perform File Operation in Native Mode                  */
/*--------------------------------------------------------*/
    case NFILE:
        break;

#endif /* defined(NFILE) */

    default:
        ARCH_DEP(program_interrupt)(regs, PGM_SPECIFICATION_EXCEPTION);

    } /* end switch(regs->GR_L(r1)) */
} /* end function ARCH_DEP(host_rsc_acc) */