static int mt_fh_hal_get_dramc(void)
{
FH_BUG_ON(1);
return 0;
}
static int mt_fh_hal_dfs_mmpll(unsigned int target_freq) //mmpll dfs mode
{
unsigned long flags = 0;
unsigned int target_dds = 0;
const unsigned int pll_id = FH_MM_PLLID;
const unsigned int reg_cfg = g_reg_cfg[pll_id];
FH_MSG("%s, current dds(MMPLL_CON1): 0x%x, target freq %d",
__func__,(fh_read32(g_reg_pll_con1[pll_id])&MASK21b),
target_freq);
spin_lock_irqsave(&g_fh_lock, flags);
if(g_fh_pll[pll_id].fh_status == FH_FH_ENABLE_SSC){
unsigned int pll_dds = 0;
unsigned int fh_dds = 0;
//only when SSC is enable, turn off MEMPLL hopping
fh_set_field(reg_cfg, FH_FRDDSX_EN, 0); //disable SSC mode
fh_set_field(reg_cfg, FH_SFSTRX_EN, 0); //disable dvfs mode
fh_set_field(reg_cfg, FH_FHCTLX_EN, 0); //disable hopping control
pll_dds = (DRV_Reg32(g_reg_dds[pll_id])) & MASK21b;
fh_dds = (DRV_Reg32(g_reg_mon[pll_id])) & MASK21b;
FH_MSG(">p:f< %x:%x",pll_dds,fh_dds);
wait_dds_stable(pll_dds, g_reg_mon[pll_id], 100);
}
#if 1
//target_dds = (target_freq/26000) * pow(2, 14);
//target_dds = (unsigned int)(((double)(target_freq)/26000.0) * 16384.0);
//target_dds = target_freq * 16384 / 26000;
//target_dds = (target_freq / 1000) * 16384 / 26;
target_dds = (target_freq / 1000) * 8192 / 13;
#else
switch(target_freq){
case MMPLL_TARGET1_VCO:
target_dds = MMPLL_TARGET1_DDS;
break;
case MMPLL_TARGET2_VCO:
target_dds = MMPLL_TARGET2_DDS;
break;
case MMPLL_TARGET3_VCO:
target_dds = MMPLL_TARGET3_DDS;
break;
case MMPLL_TARGET4_VCO:
target_dds = MMPLL_TARGET4_DDS;
break;
case MMPLL_TARGET5_VCO:
target_dds = MMPLL_TARGET5_DDS;
break;
case MMPLL_TARGET6_VCO:
target_dds = MMPLL_TARGET6_DDS;
break;
default:
FH_BUG_ON("incorrect target_freq");
break;
};
#endif
FH_MSG("target dds: 0x%x",target_dds);
mt_fh_hal_dvfs(pll_id, target_dds);
if(g_fh_pll[pll_id].fh_status == FH_FH_ENABLE_SSC){
const struct freqhopping_ssc* p_setting = &ssc_mmpll_setting[2];
fh_set_field(reg_cfg, FH_FRDDSX_EN, 0); //disable SSC mode
fh_set_field(reg_cfg, FH_SFSTRX_EN, 0); //disable dvfs mode
fh_set_field(reg_cfg, FH_FHCTLX_EN, 0); //disable hopping control
fh_sync_ncpo_to_fhctl_dds(pll_id);
FH_MSG("Enable mmpll SSC mode");
FH_MSG("DDS: 0x%08x", (fh_read32(g_reg_dds[pll_id])&MASK21b));
fh_set_field(reg_cfg,MASK_FRDDSX_DYS,p_setting->df);
fh_set_field(reg_cfg,MASK_FRDDSX_DTS,p_setting->dt);
fh_write32(g_reg_updnlmt[pll_id],
(PERCENT_TO_DDSLMT((fh_read32(g_reg_dds[pll_id])&MASK21b), p_setting->lowbnd) << 16));
FH_MSG("UPDNLMT: 0x%08x", fh_read32(g_reg_updnlmt[pll_id]));
fh_switch2fhctl(pll_id, 1);
fh_set_field(reg_cfg, FH_FRDDSX_EN, 1); //enable SSC mode
fh_set_field(reg_cfg, FH_FHCTLX_EN, 1); //enable hopping control
FH_MSG("CFG: 0x%08x", fh_read32(reg_cfg));
}
spin_unlock_irqrestore(&g_fh_lock, flags);
return 0;
}
static int mt_fh_hal_dram_overclock(int clk)
{
FH_BUG_ON(1);
return 0;
}
static int mt_fh_hal_dfs_armpll(unsigned int current_freq, unsigned int target_freq) //armpll dfs mdoe
{
FH_BUG_ON(1);
return 0;
}
static int mt_fh_hal_is_support_DFS_mode(void)
{
FH_BUG_ON(1);
return FALSE;
}
static int mt_fh_hal_l2h_dvfs_mempll(void) //mempll low to high (200->266MHz)
{
FH_BUG_ON(1);
return 0;
}
static int mt_fh_hal_h2l_dvfs_mempll(void) //mempll high to low(266->200MHz)
{
FH_BUG_ON(1);
return 0;
}
static void mt_fh_hal_popod_restore(void)
{
FH_BUG_ON(1);
}
static void mt_fh_hal_popod_save(void)
{
FH_BUG_ON(1);
}
static void mt_fh_hal_unlock(unsigned long *flags)
{
FH_BUG_ON(1);
}
static int mt_fh_hal_get_init(void)
{
FH_BUG_ON(1);
return 0;
}
static int __freqhopping_ctrl(struct freqhopping_ioctl* fh_ctl,bool enable)
{
FH_BUG_ON(1);
return 0;
}
static int freqhopping_dvfs_proc_write(struct file *file, const char *buffer, unsigned long count, void *data)
{
FH_BUG_ON(1);
return 0;
}
static int freqhopping_dvfs_proc_read(struct seq_file* m, void* v)
{
FH_BUG_ON(1);
return 0;
}
static int freqhopping_clkgen_proc_read(char *page, char **start, off_t off, int count, int *eof, void *data)
{
FH_BUG_ON(1);
return 0;
}
//--------------------------------
//- HAL porting start
//--------------------------------
static void mt_fh_hal_init(void)
{
FH_BUG_ON(1);
}