/*FUNCTION**********************************************************************
*
* Function Name : FTM_DRV_Init
* Description : Initializes the FTM driver.
*
*END**************************************************************************/
ftm_status_t FTM_DRV_Init(uint32_t instance, const ftm_user_config_t * info)
{
assert(instance < FTM_INSTANCE_COUNT);
assert(g_ftmBase[instance] != NULL);
FTM_Type *ftmBase = g_ftmBase[instance];
uint8_t chan = g_ftmChannelCount[instance];
/* clock setting initialization*/
CLOCK_SYS_EnableFtmClock(instance);
FTM_HAL_Reset(ftmBase);
/* Reset the channel registers */
for(int i = 0; i < chan; i++)
{
FTM_WR_CnSC(ftmBase, i, 0);
FTM_WR_CnV(ftmBase, i, 0);
}
FTM_HAL_Init(ftmBase);
FTM_HAL_SetSyncMode(ftmBase, info->syncMethod);
FTM_HAL_SetTofFreq(ftmBase, info->tofFrequency);
FTM_HAL_SetWriteProtectionCmd(ftmBase, info->isWriteProtection);
FTM_HAL_SetBdmMode(ftmBase,info->BDMMode);
NVIC_ClearPendingIRQ(g_ftmIrqId[instance]);
INT_SYS_EnableIRQ(g_ftmIrqId[instance]);
return kStatusFtmSuccess;
}
/*See fsl_ftm_driver.h for documentation of this function.*/
void FTM_DRV_Init(uint8_t instance, ftm_user_config_t * info)
{
assert(instance < HW_FTM_INSTANCE_COUNT);
uint32_t ftmBaseAddr = g_ftmBaseAddr[instance];
uint8_t chan = FSL_FEATURE_FTM_CHANNEL_COUNTn(instance);
/* clock setting initialization*/
CLOCK_SYS_EnableFtmClock(instance);
FTM_HAL_Reset(ftmBaseAddr);
/* Reset the channel registers */
for(int i = 0; i < chan; i++)
{
HW_FTM_CnSC_WR(ftmBaseAddr, i, 0);
HW_FTM_CnV_WR(ftmBaseAddr, i, 0);
}
FTM_HAL_Init(ftmBaseAddr);
FTM_HAL_SetSyncMode(ftmBaseAddr, info->syncMethod);
FTM_HAL_SetTofFreq(ftmBaseAddr, info->tofFrequency);
FTM_HAL_SetWriteProtectionCmd(ftmBaseAddr, info->isWriteProtection);
FTM_HAL_SetBdmMode(ftmBaseAddr,info->BDMMode);
NVIC_ClearPendingIRQ(g_ftmIrqId[instance]);
INT_SYS_EnableIRQ(g_ftmIrqId[instance]);
}