void Permedia3LoadPalette( ScrnInfoPtr pScrn, int numColors, int *indices, LOCO *colors, VisualPtr pVisual ){ #if 0 GLINTPtr pGlint = GLINTPTR(pScrn); #endif int i, index, shift = 0, j, repeat = 1; if (pScrn->depth == 15) { repeat = 8; shift = 3; } for(i = 0; i < numColors; i++) { index = indices[i]; for (j = 0; j < repeat; j++) { Permedia2WriteAddress(pScrn, (index << shift)+j); Permedia2WriteData(pScrn, colors[index].red); Permedia2WriteData(pScrn, colors[index].green); Permedia2WriteData(pScrn, colors[index].blue); } #if 0 GLINT_SLOW_WRITE_REG(index, PM3LUTIndex); GLINT_SLOW_WRITE_REG((colors[index].red & 0xFF) | ((colors[index].green & 0xFF) << 8) | ((colors[index].blue & 0xFF) << 16), PM3LUTData); #endif } }
void glintIBMHideCursor() { unsigned char tmp, tmp1; tmp = GLINT_READ_REG(IBMRGB_INDEX_LOW); GLINT_SLOW_WRITE_REG(IBMRGB_curs, IBMRGB_INDEX_LOW); tmp1 = GLINT_READ_REG(IBMRGB_INDEX_DATA) & ~3; GLINT_SLOW_WRITE_REG(tmp1, IBMRGB_INDEX_DATA); GLINT_SLOW_WRITE_REG(tmp, IBMRGB_INDEX_LOW); }
void glintIBMShowCursor() { unsigned char tmp; /* Enable cursor - X11 mode */ tmp = GLINT_READ_REG(IBMRGB_INDEX_LOW); GLINT_SLOW_WRITE_REG(IBMRGB_curs, IBMRGB_INDEX_LOW); GLINT_SLOW_WRITE_REG(0x27, IBMRGB_INDEX_DATA); GLINT_SLOW_WRITE_REG(tmp, IBMRGB_INDEX_LOW); }
static void Permedia3RestoreAccelState(ScrnInfoPtr pScrn) { GLINTPtr pGlint = GLINTPTR(pScrn); if ((IS_J2000) && (pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_GAMMA)) { GLINT_SLOW_WRITE_REG(pGlint->MultiIndex, BroadcastMask); } Permedia3Sync(pScrn); }
/* special one for 565 mode */ void Permedia3LoadPalette16( ScrnInfoPtr pScrn, int numColors, int *indices, LOCO *colors, VisualPtr pVisual ){ #if 0 GLINTPtr pGlint = GLINTPTR(pScrn); #endif int i, index, j; for(i = 0; i < numColors; i++) { index = indices[i]; for (j = 0; j < 4; j++) { Permedia2WriteAddress(pScrn, (index << 2)+j); Permedia2WriteData(pScrn, colors[index >> 1].red); Permedia2WriteData(pScrn, colors[index].green); Permedia2WriteData(pScrn, colors[index >> 1].blue); } #if 0 GLINT_SLOW_WRITE_REG(index, PM3LUTIndex); GLINT_SLOW_WRITE_REG((colors[index].red & 0xFF) | ((colors[index].green & 0xFF) << 8) | ((colors[index].blue & 0xFF) << 16), PM3LUTData); #endif if(index <= 31) { for (j = 0; j < 4; j++) { Permedia2WriteAddress(pScrn, (index << 3)+j); Permedia2WriteData(pScrn, colors[index].red); Permedia2WriteData(pScrn, colors[(index << 1) + 1].green); Permedia2WriteData(pScrn, colors[index].blue); } } } }
void PM2VDACGlintSetClock(long freq) { unsigned char m,n,p; unsigned long clockused; unsigned long fref = 14318; clockused = PM2VDAC_CalculateClock(freq/2,fref,&m,&n,&p); #ifdef DEBUG ErrorF("requested %ld, setting to %ld, m %d, n %d, p %d\n", freq,clockused,m,n,p); #endif /* * now set the clock */ GLINT_SLOW_WRITE_REG(PM2VDACRDDClk0PreScale >> 8, PM2VDACIndexRegHigh); glintOutPM2IndReg(PM2VDACRDDClk0PreScale,0x00,m); glintOutPM2IndReg(PM2VDACRDDClk0FeedbackScale,0x00,n); glintOutPM2IndReg(PM2VDACRDDClk0PostScale,0x00,p); GLINT_SLOW_WRITE_REG(0, PM2VDACIndexRegHigh); }
static void setregs(const unsigned char regs[], int mode) { int i; unsigned int *p = (unsigned int *)(regs+VGA_TOTAL_REGS); const unsigned char *q = regs+188; unlock(); GLINT_SLOW_WRITE_REG(0xFF, PM2DACReadMask); if(chiptype == cPM2V) GLINT_SLOW_WRITE_REG(p[19], ChipConfig); GLINT_SLOW_WRITE_REG(p[0], Aperture0); GLINT_SLOW_WRITE_REG(p[1], Aperture1); GLINT_SLOW_WRITE_REG(p[2], PMFramebufferWriteMask); GLINT_SLOW_WRITE_REG(p[3], PMBypassWriteMask); GLINT_SLOW_WRITE_REG(p[4], DFIFODis); GLINT_SLOW_WRITE_REG(p[5], FIFODis); if(0) GLINT_SLOW_WRITE_REG(p[6], PMMemConfig); GLINT_SLOW_WRITE_REG(p[17], PMVideoControl); GLINT_SLOW_WRITE_REG(p[9], PMHgEnd); GLINT_SLOW_WRITE_REG(p[16], PMScreenBase); GLINT_SLOW_WRITE_REG(p[18], VClkCtl); GLINT_SLOW_WRITE_REG(p[10], PMScreenStride); GLINT_SLOW_WRITE_REG(p[7], PMHTotal); GLINT_SLOW_WRITE_REG(p[8], PMHbEnd); GLINT_SLOW_WRITE_REG(p[24], PMHsStart); GLINT_SLOW_WRITE_REG(p[11], PMHsEnd); GLINT_SLOW_WRITE_REG(p[12], PMVTotal); GLINT_SLOW_WRITE_REG(p[13], PMVbEnd); GLINT_SLOW_WRITE_REG(p[14], PMVsStart); GLINT_SLOW_WRITE_REG(p[15], PMVsEnd); if(chiptype != cPM2V) GLINT_SLOW_WRITE_REG(p[19], ChipConfig); for (i=0;i<768;i++) { Permedia2WriteAddress(i); Permedia2WriteData(regs[VGA_TOTAL_REGS + 128 + i]); } switch(chiptype) { case cPM2: Permedia2OutIndReg(PM2DACIndexMCR, 0x00, p[25]); Permedia2OutIndReg(PM2DACIndexMDCR, 0x00, p[26]); Permedia2OutIndReg(PM2DACIndexCMR, 0x00, p[27]); Permedia2OutIndReg(PM2DACIndexClockAM, 0x00, p[20]); Permedia2OutIndReg(PM2DACIndexClockAN, 0x00, p[21]); Permedia2OutIndReg(PM2DACIndexClockAP, 0x00, p[22]); break; case cPM2V: GLINT_SLOW_WRITE_REG(p[23],PM2VDACRDIndexControl); Permedia2vOutIndReg(PM2VDACRDOverlayKey, 0x00, p[25]); Permedia2vOutIndReg(PM2VDACRDSyncControl, 0x00, p[26]); Permedia2vOutIndReg(PM2VDACRDMiscControl, 0x00, p[27]); Permedia2vOutIndReg(PM2VDACRDDACControl, 0x00, p[28]); Permedia2vOutIndReg(PM2VDACRDPixelSize, 0x00, p[29]); Permedia2vOutIndReg(PM2VDACRDColorFormat, 0x00, p[30]); i = Permedia2vInIndReg(PM2VDACIndexClockControl) & 0xFC; Permedia2vOutIndReg(PM2VDACRDDClk0PreScale, 0x00, p[20]); Permedia2vOutIndReg(PM2VDACRDDClk0FeedbackScale, 0x00, p[21]); Permedia2vOutIndReg(PM2VDACRDDClk0PostScale, 0x00, p[22]); Permedia2vOutIndReg(PM2VDACIndexClockControl, 0x00, i | 0x03); for(i=0;i<6;i++) Permedia2vOutIndReg(PM2VDACRDCursorPalette+i, 0x00, q[i]); Permedia2vOutIndReg(PM2VDACRDCursorHotSpotX, 0x00, q[6]); Permedia2vOutIndReg(PM2VDACRDCursorHotSpotY, 0x00, q[7]); Permedia2vOutIndReg(PM2VDACRDCursorXLow, 0x00, q[8]); Permedia2vOutIndReg(PM2VDACRDCursorXHigh, 0x00, q[9]); Permedia2vOutIndReg(PM2VDACRDCursorYLow, 0x00, q[10]); Permedia2vOutIndReg(PM2VDACRDCursorYHigh, 0x00, q[11]); Permedia2vOutIndReg(PM2DACCursorControl, 0x00, q[12]); Permedia2vOutIndReg(PM2VDACRDCursorMode, 0x00, q[13]); } }
int Permedia3MemorySizeDetect(ScrnInfoPtr pScrn) { GLINTPtr pGlint = GLINTPTR (pScrn); CARD32 size = 0, temp, temp1, temp2, i; /* We can map 64MB, as that's the size of the Permedia3 aperture * regardless of memory configuration */ pGlint->FbMapSize = 64*1024*1024; #ifndef XSERVER_LIBPCIACCESS /* Mark as VIDMEM_MMIO to avoid write-combining while detecting memory */ pGlint->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO, pGlint->PciTag, pGlint->FbAddress, pGlint->FbMapSize); #else { void** result = (void**)&pGlint->FbBase; int err = pci_device_map_range(pGlint->PciInfo, pGlint->FbAddress, pGlint->FbMapSize, PCI_DEV_MAP_FLAG_WRITABLE, result); if (err) return FALSE; } #endif if (pGlint->FbBase == NULL) return 0; temp = GLINT_READ_REG(PM3MemBypassWriteMask); GLINT_SLOW_WRITE_REG(0xffffffff, PM3MemBypassWriteMask); /* The Permedia3 splits up memory, and even replicates it. Grrr. * So that each 32MB appears at offset 0, and offset 32, unless * there's really 64MB attached to the chip. * So, 16MB appears at offset 0, nothing between 16-32, then it re-appears * at offset 32. * This below is to detect the cases of memory combinations */ /* Test first 32MB */ for(i=0;i<32;i++) { /* write test pattern */ MMIO_OUT32(pGlint->FbBase, i*1024*1024, i*0x00345678); mem_barrier(); temp1 = MMIO_IN32(pGlint->FbBase, i*1024*1024); /* Let's check for wrapover, write will fail at 16MB boundary */ if (temp1 == (i*0x00345678)) size = i; else break; } /* Ok, we're satisfied we've got 32MB, let's test the second lot */ if ((size + 1) == i) { for(i=0;i<32;i++) { /* Clear first 32MB */ MMIO_OUT32(pGlint->FbBase, i*1024*1024, 0); } mem_barrier(); for(i=32;i<64;i++) { /* write test pattern */ MMIO_OUT32(pGlint->FbBase, i*1024*1024, i*0x00345678); mem_barrier(); temp1 = MMIO_IN32(pGlint->FbBase, i*1024*1024); temp2 = MMIO_IN32(pGlint->FbBase, (i-32)*1024*1024); /* Let's check for wrapover */ if ( (temp1 == (i*0x00345678)) && (temp2 == 0) ) size = i; else break; } } GLINT_SLOW_WRITE_REG(temp, PM3MemBypassWriteMask); #ifndef XSERVER_LIBPCIACCESS xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pGlint->FbBase, pGlint->FbMapSize); #else pci_device_unmap_range(pGlint->PciInfo, pGlint->FbBase, pGlint->FbMapSize); #endif pGlint->FbBase = NULL; pGlint->FbMapSize = 0; return ( (size+1) * 1024 ); }
void Permedia3PreInit(ScrnInfoPtr pScrn) { GLINTPtr pGlint = GLINTPTR(pScrn); CARD32 LocalMemCaps; TRACE_ENTER("Permedia3PreInit"); if (IS_J2000) { unsigned char m,n,p; if (pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_GAMMA) GLINT_SLOW_WRITE_REG(GCSRSecondaryGLINTMapEn, GCSRAperture); /* Memory timings for the Appian J2000 board. * This is needed for the second head which is left un-initialized * by the bios, thus freezing the machine. */ GLINT_SLOW_WRITE_REG(0x02e311B8, PM3LocalMemCaps); GLINT_SLOW_WRITE_REG(0x07424905, PM3LocalMemTimings); GLINT_SLOW_WRITE_REG(0x0c000003, PM3LocalMemControl); GLINT_SLOW_WRITE_REG(0x00000061, PM3LocalMemRefresh); GLINT_SLOW_WRITE_REG(0x00000000, PM3LocalMemPowerDown); /* Let's program the K, M and S Clocks to the same values as the bios * does for first head : * - KClk and MClk are 105Mhz. * - S Clock is set to PClk. * Note 1 : pGlint->RefClock is not set yet, so use 14318 instead. * Note 2 : KClk gets internally halved, so we need to double it. */ (void) PM3DAC_CalculateClock(2*105000, 14318, &m,&n,&p); Permedia2vOutIndReg(pScrn, PM3RD_KClkPreScale, 0x00, m); Permedia2vOutIndReg(pScrn, PM3RD_KClkFeedbackScale, 0x00, n); Permedia2vOutIndReg(pScrn, PM3RD_KClkPostScale, 0x00, p); Permedia2vOutIndReg(pScrn, PM3RD_KClkControl, 0x00, PM3RD_KClkControl_STATE_RUN | PM3RD_KClkControl_SOURCE_PLL | PM3RD_KClkControl_ENABLE); Permedia2vOutIndReg(pScrn, PM3RD_MClkControl, 0x00, PM3RD_MClkControl_STATE_RUN | PM3RD_MClkControl_SOURCE_KCLK | PM3RD_MClkControl_ENABLE); Permedia2vOutIndReg(pScrn, PM3RD_SClkControl, 0x00, PM3RD_SClkControl_STATE_RUN | PM3RD_SClkControl_SOURCE_PCLK | PM3RD_SClkControl_ENABLE); } #if defined(__alpha__) /* * On Alpha, we have to "int10" secondary VX1 cards early; * otherwise, some information taken from registers, like * memory size, is incorrect. */ if (!xf86IsPrimaryPci(pGlint->PciInfo)) { if ( IS_QVX1 ) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VX1 secondary enabling VGA before int10\n"); /* Enable VGA on the current card. */ PCI_WRITE_BYTE(pGlint->PciInfo, 0, 0xf8); PCI_WRITE_BYTE(pGlint->PciInfo, 0, 0xf4); PCI_WRITE_BYTE(pGlint->PciInfo, 0, 0xfc); /* The card we are on should be VGA-enabled now, so run int10. */ if (xf86LoadSubModule(pScrn, "int10")) { xf86Int10InfoPtr pInt; xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Initializing int10\n"); pInt = xf86InitInt10(pGlint->pEnt->index); xf86FreeInt10(pInt); } xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VX1 secondary disabling VGA after int10\n"); /* Finally, disable VGA on the current card. */ PCI_WRITE_BYTE(pGlint->PciInfo, 0x70, 0xf8); PCI_WRITE_BYTE(pGlint->PciInfo, 0x01, 0xf4); PCI_WRITE_BYTE(pGlint->PciInfo, 0x00, 0xfc); } } #endif /* __alpha__ */ /* If we have SDRAM instead of SGRAM, we have to do some things differently in the FillRectSolid code. */ LocalMemCaps = GLINT_READ_REG(PM3LocalMemCaps); pGlint->PM3_UsingSGRAM = !(LocalMemCaps & PM3LocalMemCaps_NoWriteMask); xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using %s memory\n", pGlint->PM3_UsingSGRAM ? "SGRAM" : "SDRAM"); TRACE_EXIT("Permedia3PreInit"); }
void Permedia2InitializeEngine(ScrnInfoPtr pScrn) { GLINTPtr pGlint = GLINTPTR(pScrn); /* Initialize the Accelerator Engine to defaults */ TRACE_ENTER("Permedia2InitializeEngine"); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, ScissorMode); GLINT_SLOW_WRITE_REG(UNIT_ENABLE, FBWriteMode); GLINT_SLOW_WRITE_REG(0, dXSub); GLINT_SLOW_WRITE_REG(GWIN_DisableLBUpdate, GLINTWindow); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, DitherMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, AlphaBlendMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, ColorDDAMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, TextureColorMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, TextureAddressMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PMTextureReadMode); GLINT_SLOW_WRITE_REG(pGlint->pprod, LBReadMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, AlphaBlendMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, TexelLUTMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, YUVMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, DepthMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, RouterMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, FogMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, AntialiasMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, AlphaTestMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, StencilMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, AreaStippleMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, LogicalOpMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, DepthMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, StatisticMode); GLINT_SLOW_WRITE_REG(0x400, FilterMode); GLINT_SLOW_WRITE_REG(0xffffffff, FBHardwareWriteMask); GLINT_SLOW_WRITE_REG(0xffffffff, FBSoftwareWriteMask); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, RasterizerMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, GLINTDepth); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, FBSourceOffset); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, FBPixelOffset); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, LBSourceOffset); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, WindowOrigin); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, FBWindowBase); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, FBSourceBase); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, LBWindowBase); #if X_BYTE_ORDER == X_BIG_ENDIAN pGlint->RasterizerSwap = 1; #else pGlint->RasterizerSwap = 0; #endif switch (pScrn->bitsPerPixel) { case 8: pGlint->PixelWidth = 0x0; /* 8 Bits */ pGlint->TexMapFormat = pGlint->pprod; #if X_BYTE_ORDER == X_BIG_ENDIAN pGlint->RasterizerSwap |= 3<<15; /* Swap host data */ #endif break; case 16: pGlint->PixelWidth = 0x1; /* 16 Bits */ pGlint->TexMapFormat = pGlint->pprod | 1<<19; #if X_BYTE_ORDER == X_BIG_ENDIAN pGlint->RasterizerSwap |= 2<<15; /* Swap host data */ #endif break; case 24: pGlint->PixelWidth = 0x4; /* 24 Bits */ pGlint->TexMapFormat = pGlint->pprod | 2<<19; break; case 32: pGlint->PixelWidth = 0x2; /* 32 Bits */ pGlint->TexMapFormat = pGlint->pprod | 2<<19; break; } pGlint->ClippingOn = FALSE; pGlint->startxdom = 0; pGlint->startxsub = 0; pGlint->starty = 0; pGlint->count = 0; pGlint->dy = 1<<16; pGlint->dxdom = 0; pGlint->x = 0; pGlint->y = 0; pGlint->h = 0; pGlint->w = 0; pGlint->ROP = 0xFF; GLINT_SLOW_WRITE_REG(pGlint->PixelWidth, FBReadPixel); GLINT_SLOW_WRITE_REG(pGlint->TexMapFormat, PMTextureMapFormat); GLINT_SLOW_WRITE_REG(0, RectangleSize); GLINT_SLOW_WRITE_REG(0, RectangleOrigin); GLINT_SLOW_WRITE_REG(0, dXDom); GLINT_SLOW_WRITE_REG(1<<16, dY); GLINT_SLOW_WRITE_REG(0, StartXDom); GLINT_SLOW_WRITE_REG(0, StartXSub); GLINT_SLOW_WRITE_REG(0, StartY); GLINT_SLOW_WRITE_REG(0, GLINTCount); TRACE_EXIT("Permedia2InitializeEngine"); }
void glintIBMSetCursorPosition(x, y, xorigin, yorigin) { unsigned char tmp; tmp = GLINT_READ_REG(IBMRGB_INDEX_LOW); GLINT_SLOW_WRITE_REG(IBMRGB_curs_hot_x, IBMRGB_INDEX_LOW); GLINT_SLOW_WRITE_REG(xorigin & 0xFF, IBMRGB_INDEX_DATA); GLINT_SLOW_WRITE_REG(IBMRGB_curs_hot_y, IBMRGB_INDEX_LOW); GLINT_SLOW_WRITE_REG(yorigin & 0xFF, IBMRGB_INDEX_DATA); GLINT_SLOW_WRITE_REG(IBMRGB_curs_xl, IBMRGB_INDEX_LOW); GLINT_SLOW_WRITE_REG(x & 0xFF, IBMRGB_INDEX_DATA); GLINT_SLOW_WRITE_REG(IBMRGB_curs_xh, IBMRGB_INDEX_LOW); GLINT_SLOW_WRITE_REG((x >> 8) & 0x0F, IBMRGB_INDEX_DATA); GLINT_SLOW_WRITE_REG(IBMRGB_curs_yl, IBMRGB_INDEX_LOW); GLINT_SLOW_WRITE_REG(y & 0xFF, IBMRGB_INDEX_DATA); GLINT_SLOW_WRITE_REG(IBMRGB_curs_yh, IBMRGB_INDEX_LOW); GLINT_SLOW_WRITE_REG((y >> 8) & 0x0F, IBMRGB_INDEX_DATA); GLINT_SLOW_WRITE_REG(tmp, IBMRGB_INDEX_LOW); }
void Permedia3InitializeEngine(ScrnInfoPtr pScrn) { GLINTPtr pGlint = GLINTPTR(pScrn); int colorformat = 0; /* Initialize the Accelerator Engine to defaults */ TRACE_ENTER("Permedia3InitializeEngine"); if ((IS_J2000) && (pGlint->Chipset == PCI_VENDOR_3DLABS_CHIP_GAMMA)) { GLINT_SLOW_WRITE_REG(pGlint->MultiIndex, BroadcastMask); } if (pGlint->MultiAperture) { ErrorF("pm3_accel: SVEN : multiAperture set\n"); /* Only write the following register to the first PM3 */ GLINT_SLOW_WRITE_REG(1, BroadcastMask); GLINT_SLOW_WRITE_REG(0x00000001, ScanLineOwnership); /* Only write the following register to the second PM3 */ GLINT_SLOW_WRITE_REG(2, BroadcastMask); GLINT_SLOW_WRITE_REG(0x00000005, ScanLineOwnership); /* Make sure the rest of the register writes go to both PM3's */ GLINT_SLOW_WRITE_REG(3, BroadcastMask); } /* Disable LocalBuffer. Fixes stripes problems when * doing screen-to-screen copies */ GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3LBDestReadMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3LBDestReadEnables); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3LBSourceReadMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3LBWriteMode); /* Host out PreInit */ /* Set filter mode to enable sync tag & data output */ GLINT_SLOW_WRITE_REG(0x400, FilterMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, StatisticMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3DeltaMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, RasterizerMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, ScissorMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, LineStippleMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, AreaStippleMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3GIDMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, DepthMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, StencilMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, ColorDDAMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3TextureCoordMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3TextureIndexMode0); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3TextureIndexMode1); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, TextureReadMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3LUTMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, TextureFilterMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3TextureCompositeMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3TextureApplicationMode); GLINT_SLOW_WRITE_REG(0, PM3TextureCompositeColorMode1); GLINT_SLOW_WRITE_REG(0, PM3TextureCompositeAlphaMode1); GLINT_SLOW_WRITE_REG(0, PM3TextureCompositeColorMode0); GLINT_SLOW_WRITE_REG(0, PM3TextureCompositeAlphaMode0); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, FogMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, ChromaTestMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, AlphaTestMode); /* Not done in P3Lib ??? */ GLINT_SLOW_WRITE_REG(UNIT_DISABLE, AntialiasMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3AlphaTestMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, YUVMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3AlphaBlendColorMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3AlphaBlendAlphaMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, DitherMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, LogicalOpMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, StatisticMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, RouterMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, PM3Window); GLINT_SLOW_WRITE_REG(0, PM3Config2D); GLINT_SLOW_WRITE_REG(0xffffffff, PM3SpanColorMask); GLINT_SLOW_WRITE_REG(0, PM3XBias); GLINT_SLOW_WRITE_REG(0, PM3YBias); GLINT_SLOW_WRITE_REG(0, PM3DeltaControl); GLINT_SLOW_WRITE_REG(0xffffffff, BitMaskPattern); /* ScissorStippleUnit Initialization (is it needed ?) */ pGlint->ClippingOn = FALSE; GLINT_SLOW_WRITE_REG(UNIT_DISABLE, ScissorMode); /* We never use Screen Scissor ... GLINT_SLOW_WRITE_REG( (pScrn->virtualX&0xffff)|((pScrn->virtualY&0xffff)<<16), ScreenSize); GLINT_SLOW_WRITE_REG( (0&0xffff)|((0&0xffff)<<16), WindowOrigin); */ /* StencilDepthUnit Initialization */ GLINT_SLOW_WRITE_REG(0, PM3Window); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, DepthMode); GLINT_SLOW_WRITE_REG(UNIT_DISABLE, StencilMode); GLINT_SLOW_WRITE_REG(0, StencilData); /* FBReadUnit Initialization */ TRACE("Permedia3InitializeEngine : only syncs upto now"); GLINT_SLOW_WRITE_REG( PM3FBDestReadEnables_E(0xff) | PM3FBDestReadEnables_R(0xff) | PM3FBDestReadEnables_ReferenceAlpha(0xff), PM3FBDestReadEnables); GLINT_SLOW_WRITE_REG(0, PM3FBDestReadBufferAddr0); GLINT_SLOW_WRITE_REG(0, PM3FBDestReadBufferOffset0); GLINT_SLOW_WRITE_REG( PM3FBDestReadBufferWidth_Width(pScrn->displayWidth), PM3FBDestReadBufferWidth0); /* GLINT_SLOW_WRITE_REG(0, PM3FBDestReadBufferAddr1); GLINT_SLOW_WRITE_REG(0, PM3FBDestReadBufferOffset1); GLINT_SLOW_WRITE_REG( PM3FBDestReadBufferWidth_Width(pScrn->displayWidth), PM3FBDestReadBufferWidth1); GLINT_SLOW_WRITE_REG(0, PM3FBDestReadBufferAddr2); GLINT_SLOW_WRITE_REG(0, PM3FBDestReadBufferOffset2); GLINT_SLOW_WRITE_REG( PM3FBDestReadBufferWidth_Width(pScrn->displayWidth), PM3FBDestReadBufferWidth2); GLINT_SLOW_WRITE_REG(0, PM3FBDestReadBufferAddr3); GLINT_SLOW_WRITE_REG(0, PM3FBDestReadBufferOffset3); GLINT_SLOW_WRITE_REG( PM3FBDestReadBufferWidth_Width(pScrn->displayWidth), PM3FBDestReadBufferWidth3); */ GLINT_SLOW_WRITE_REG( PM3FBDestReadMode_ReadEnable | /* Not needed, since FBDestRead is the same as FBWrite. PM3FBDestReadMode_Blocking | */ PM3FBDestReadMode_Enable0, PM3FBDestReadMode); TRACE("Permedia3InitializeEngine : DestRead"); GLINT_SLOW_WRITE_REG(0, PM3FBSourceReadBufferAddr); GLINT_SLOW_WRITE_REG(0, PM3FBSourceReadBufferOffset); GLINT_SLOW_WRITE_REG( PM3FBSourceReadBufferWidth_Width(pScrn->displayWidth), PM3FBSourceReadBufferWidth); GLINT_SLOW_WRITE_REG( PM3FBSourceReadMode_Blocking | PM3FBSourceReadMode_ReadEnable, PM3FBSourceReadMode); TRACE("Permedia3InitializeEngine : SourceRead"); switch (pScrn->bitsPerPixel) { case 8: pGlint->PM3_PixelSize = 2; #if X_BYTE_ORDER == X_BIG_ENDIAN pGlint->RasterizerSwap = 3<<15; /* Swap host data */ #endif break; case 16: pGlint->PM3_PixelSize = 1; #if X_BYTE_ORDER == X_BIG_ENDIAN pGlint->RasterizerSwap = 2<<15; /* Swap host data */ #endif break; case 32: pGlint->PM3_PixelSize = 0; break; } GLINT_SLOW_WRITE_REG(pGlint->PM3_PixelSize, PixelSize); #if X_BYTE_ORDER == X_BIG_ENDIAN GLINT_SLOW_WRITE_REG(1 | pGlint->RasterizerSwap, RasterizerMode); #endif TRACE("Permedia3InitializeEngine : PixelSize"); /* LogicalOpUnit Initialization */ GLINT_SLOW_WRITE_REG(0xffffffff, PM3_OTHERWRITEMASK); /* FBWriteUnit Initialization */ GLINT_SLOW_WRITE_REG( PM3FBWriteMode_WriteEnable| PM3FBWriteMode_OpaqueSpan| PM3FBWriteMode_Enable0, PM3FBWriteMode); GLINT_SLOW_WRITE_REG(0, PM3FBWriteBufferAddr0); GLINT_SLOW_WRITE_REG(0, PM3FBWriteBufferOffset0); GLINT_SLOW_WRITE_REG( PM3FBWriteBufferWidth_Width(pScrn->displayWidth), PM3FBWriteBufferWidth0); /* GLINT_SLOW_WRITE_REG(0, PM3FBWriteBufferAddr1); GLINT_SLOW_WRITE_REG(0, PM3FBWriteBufferOffset1); GLINT_SLOW_WRITE_REG( PM3FBWriteBufferWidth_Width(pScrn->displayWidth), PM3FBWriteBufferWidth1); GLINT_SLOW_WRITE_REG(0, PM3FBWriteBufferAddr2); GLINT_SLOW_WRITE_REG(0, PM3FBWriteBufferOffset2); GLINT_SLOW_WRITE_REG( PM3FBWriteBufferWidth_Width(pScrn->displayWidth), PM3FBWriteBufferWidth2); GLINT_SLOW_WRITE_REG(0, PM3FBWriteBufferAddr3); GLINT_SLOW_WRITE_REG(0, PM3FBWriteBufferOffset3); GLINT_SLOW_WRITE_REG( PM3FBWriteBufferWidth_Width(pScrn->displayWidth), PM3FBWriteBufferWidth3); */ TRACE("Permedia3InitializeEngine : FBWrite"); /* SizeOfframebuffer */ GLINT_SLOW_WRITE_REG( pScrn->displayWidth * (8 * pGlint->FbMapSize / (pScrn->bitsPerPixel * pScrn->displayWidth) >4095?4095: 8 * pGlint->FbMapSize / (pScrn->bitsPerPixel * pScrn->displayWidth)), PM3SizeOfFramebuffer); GLINT_SLOW_WRITE_REG(0xffffffff, PM3_WRITEMASK); TRACE("Permedia3InitializeEngine : FBHardwareWriteMask & SizeOfFramebuffer"); /* Color Format */ switch (pScrn->depth) { case 8: colorformat = 4; break; case 15: colorformat = 2; break; case 16: colorformat = 3; break; case 24: case 32: colorformat = 0; break; } GLINT_SLOW_WRITE_REG(UNIT_DISABLE| ((colorformat&0xf)<<2)|(1<<10), DitherMode); /* Other stuff */ pGlint->startxdom = 0; pGlint->startxsub = 0; pGlint->starty = 0; pGlint->count = 0; pGlint->dy = 1<<16; pGlint->dxdom = 0; pGlint->x = 0; pGlint->y = 0; pGlint->h = 0; pGlint->w = 0; pGlint->ROP = 0xFF; GLINT_SLOW_WRITE_REG(0, dXDom); GLINT_SLOW_WRITE_REG(0, dXSub); GLINT_SLOW_WRITE_REG(1<<16, dY); GLINT_SLOW_WRITE_REG(0, StartXDom); GLINT_SLOW_WRITE_REG(0, StartXSub); GLINT_SLOW_WRITE_REG(0, StartY); GLINT_SLOW_WRITE_REG(0, GLINTCount); if (*pGlint->AccelInfoRec->Sync) (*pGlint->AccelInfoRec->Sync)(pScrn); TRACE_EXIT("Permedia3InitializeEngine"); }