void GPIO_Test_for_TE(void)
{
if(sys_gpio_test)
{
sys_gpio_test = 0;
GPIO_HAL_SetPinDir(PTA, 4, kGpioDigitalOutput); // INT1 pin
GPIO_HAL_SetPinDir(PTB, 5, kGpioDigitalInput); // INT2 pin
PORT_HAL_SetMuxMode(PORTB,3u,kPortMuxAsGpio);
PORT_HAL_SetMuxMode(PORTB,4u,kPortMuxAsGpio);
GPIO_HAL_SetPinDir(PTB, 3, kGpioDigitalOutput); // SCL pin
GPIO_HAL_SetPinDir(PTB, 4, kGpioDigitalOutput); // SDA pin
while(1)
{
if(GPIO_HAL_ReadPinInput(PTB, 5))
{
GPIO_HAL_ClearPinOutput(PTA, 4); // INT1 set low
GPIO_HAL_SetPinOutput(PTB, 3); // SCL set high
GPIO_HAL_ClearPinOutput(PTB, 4); // SDA set low
}
else
{
GPIO_HAL_SetPinOutput(PTA, 4); // INT1 set high
GPIO_HAL_ClearPinOutput(PTB, 3); // SCL set low
GPIO_HAL_SetPinOutput(PTB, 4); // SDA set high
}
delay_ms(100);
}
}
}
/*************************************************************************
* Function Name: GPIO_init
* Parameters: none
* Return: none
* Description: I/O pins configuration
*************************************************************************/
void GPIO_init(void)
{
// Brake control
PORT_HAL_SetMuxMode(PORTE_BASE_PTR, 24, kPortMuxAsGpio);
PORT_HAL_SetPullMode(PORTE_BASE_PTR, 24, kPortPullDown);
GPIO_HAL_SetPinDir(GPIOE_BASE_PTR, 24, kGpioDigitalOutput);
GPIO_HAL_ClearPinOutput(GPIOE_BASE_PTR, 24);
// LED
PORT_HAL_SetMuxMode(PORTD_BASE_PTR, 6, kPortMuxAsGpio);
PORT_HAL_SetPullMode(PORTD_BASE_PTR, 6, kPortPullDown);
GPIO_HAL_SetPinDir(GPIOD_BASE_PTR, 6, kGpioDigitalOutput);
GPIO_HAL_SetPinOutput(GPIOD_BASE_PTR, 6);// Turn off LED
#if defined(KV10Z7_SERIES)
// Push buttons: PTA4 = SW1, PTB0 = SW2
PORT_HAL_SetMuxMode(PORTA_BASE_PTR, 4, kPortMuxAsGpio);
PORT_HAL_SetPullMode(PORTA_BASE_PTR, 4, kPortPullDown);
PORT_HAL_SetMuxMode(PORTB_BASE_PTR, 0, kPortMuxAsGpio);
PORT_HAL_SetPullMode(PORTB_BASE_PTR, 0, kPortPullDown);
#elif (defined(KV10Z1287_SERIES) || defined(KV11Z7_SERIES))
// Push buttons: PTE20 = SW3, PTA4 = SW2
PORT_HAL_SetMuxMode(PORTE_BASE_PTR, 20, kPortMuxAsGpio);
PORT_HAL_SetPullMode(PORTE_BASE_PTR, 20, kPortPullDown);
PORT_HAL_SetMuxMode(PORTA_BASE_PTR, 4, kPortMuxAsGpio);
PORT_HAL_SetPullMode(PORTA_BASE_PTR, 4, kPortPullDown);
#endif
}
void gpio_dir(gpio_t *obj, PinDirection direction) {
MBED_ASSERT(obj->pin != (PinName)NC);
uint32_t port = obj->pin >> GPIO_PORT_SHIFT;
uint32_t gpio_addrs[] = GPIO_BASE_ADDRS;
uint32_t pin_num = obj->pin & 0xFF;
switch (direction) {
case PIN_INPUT:
GPIO_HAL_SetPinDir(gpio_addrs[port], pin_num, kGpioDigitalInput);
break;
case PIN_OUTPUT:
GPIO_HAL_SetPinDir(gpio_addrs[port], pin_num, kGpioDigitalOutput);
break;
}
}
/*FUNCTION**********************************************************************
*
* Function Name : GPIO_DRV_InputPinInit
* Description : Initialize one GPIO input pin used by board.
*
*END**************************************************************************/
void GPIO_DRV_InputPinInit(const gpio_input_pin_user_config_t *inputPin)
{
/* Get actual port and pin number.*/
uint32_t port = GPIO_EXTRACT_PORT(inputPin->pinName);
uint32_t pin = GPIO_EXTRACT_PIN(inputPin->pinName);
uint32_t gpioBaseAddr = g_gpioBaseAddr[port];
uint32_t portBaseAddr = g_portBaseAddr[port];
/* Un-gate port clock*/
CLOCK_SYS_EnablePortClock(port);
/* Set current pin as digital input.*/
GPIO_HAL_SetPinDir(gpioBaseAddr, pin, kGpioDigitalInput);
/* Configure GPIO input features. */
PORT_HAL_SetPullCmd(portBaseAddr, pin, inputPin->config.isPullEnable);
PORT_HAL_SetPullMode(portBaseAddr, pin, inputPin->config.pullSelect);
PORT_HAL_SetPassiveFilterCmd(portBaseAddr, pin,
inputPin->config.isPassiveFilterEnabled);
#if FSL_FEATURE_PORT_HAS_DIGITAL_FILTER
PORT_HAL_SetDigitalFilterCmd(portBaseAddr, pin,
inputPin->config.isDigitalFilterEnabled);
#endif
PORT_HAL_SetPinIntMode(portBaseAddr, pin, inputPin->config.interrupt);
/* Configure NVIC */
if ((inputPin->config.interrupt) && (g_portIrqId[port]))
{
/* Enable GPIO interrupt.*/
INT_SYS_EnableIRQ(g_portIrqId[port]);
}
}
/*FUNCTION**********************************************************************
*
* Function Name : GPIO_DRV_SetPinDir
* Description : Set current direction of individual GPIO pin.
*
*END**************************************************************************/
void GPIO_DRV_SetPinDir(uint32_t pinName, gpio_pin_direction_t direction)
{
uint32_t gpioBaseAddr = g_gpioBaseAddr[GPIO_EXTRACT_PORT(pinName)];
uint32_t pin = GPIO_EXTRACT_PIN(pinName);
GPIO_HAL_SetPinDir(gpioBaseAddr, pin, direction);
}
/*FUNCTION**********************************************************************
*
* Function Name : GPIO_DRV_SetPinDir
* Description : Set current direction of individual GPIO pin.
*
*END**************************************************************************/
void GPIO_DRV_SetPinDir(uint32_t pinName, gpio_pin_direction_t direction)
{
GPIO_Type * gpioBase = g_gpioBase[GPIO_EXTRACT_PORT(pinName)];
uint32_t pin = GPIO_EXTRACT_PIN(pinName);
GPIO_HAL_SetPinDir(gpioBase, pin, direction);
}
/*FUNCTION**********************************************************************
*
* Function Name : GPIO_DRV_OutputPinInit
* Description : Initialize one GPIO output pin used by board.
*
*END**************************************************************************/
void GPIO_DRV_OutputPinInit(const gpio_output_pin_user_config_t *outputPin)
{
/* Get actual port and pin number.*/
uint32_t port = GPIO_EXTRACT_PORT(outputPin->pinName);
uint32_t pin = GPIO_EXTRACT_PIN(outputPin->pinName);
GPIO_Type * gpioBase = g_gpioBase[port];
PORT_Type * portBase = g_portBase[port];
/* Un-gate port clock*/
CLOCK_SYS_EnablePortClock(port);
/* Set current pin as gpio.*/
PORT_HAL_SetMuxMode(portBase, pin, kPortMuxAsGpio);
/* Set current pin as digital output.*/
GPIO_HAL_SetPinDir(gpioBase, pin, kGpioDigitalOutput);
/* Configure GPIO output features. */
GPIO_HAL_WritePinOutput(gpioBase, pin, outputPin->config.outputLogic);
#if FSL_FEATURE_PORT_HAS_SLEW_RATE
PORT_HAL_SetSlewRateMode(portBase, pin, outputPin->config.slewRate);
#endif
#if FSL_FEATURE_PORT_HAS_DRIVE_STRENGTH
PORT_HAL_SetDriveStrengthMode(portBase, pin, outputPin->config.driveStrength);
#endif
#if FSL_FEATURE_PORT_HAS_OPEN_DRAIN
PORT_HAL_SetOpenDrainCmd(portBase, pin, outputPin->config.isOpenDrainEnabled);
#endif
}
void disable_unused_pins(void)
{
/* Disable debug pins when MCU sleeps */
setup_debug_pins(kPortPinDisabled);
/* Disable uart pins */
setup_uart_pins(kPortMuxAsGpio);
GPIO_HAL_SetPinDir(GPIOE, 0, kGpioDigitalInput);
PORT_HAL_SetPullCmd(PORTE, 0, true);
PORT_HAL_SetPullMode(PORTE, 0, kPortPullUp);
GPIO_HAL_SetPinDir(GPIOE, 1, kGpioDigitalInput);
PORT_HAL_SetPullCmd(PORTE, 1, true);
PORT_HAL_SetPullMode(PORTE, 1, kPortPullUp);
OSC_HAL_SetExternalRefClkInStopModeCmd(OSC_BASE_PTR, false);
}
void configure_xcvr_pins(void)
{
/* XCVR DIO0 */
PORT_HAL_SetMuxMode(PORTC,4u,kPortMuxAsGpio);
GPIO_HAL_SetPinDir(GPIOC,4u,kGpioDigitalInput);
/* XCVR DIO1 */
PORT_HAL_SetMuxMode(PORTC,3u,kPortMuxAsGpio);
GPIO_HAL_SetPinDir(GPIOC,3u,kGpioDigitalInput);
/* XCVR DIO4 */
PORT_HAL_SetMuxMode(PORTD,4u,kPortMuxAsGpio);
GPIO_HAL_SetPinDir(GPIOD,4u,kGpioDigitalInput);
/* XCVR CLKIN */
PORT_HAL_SetMuxMode(PORTA,18u,kPortMuxAsGpio);
GPIO_HAL_SetPinDir(GPIOA,18u,kGpioDigitalInput);
/* XCVR RESET */
PORT_HAL_SetMuxMode(PORTE,30u,kPortMuxAsGpio);
GPIO_HAL_SetPinDir(GPIOE,30u,kGpioDigitalOutput);
}
/*FUNCTION**********************************************************************
*
* Function Name : GPIO_DRV_InputPinInit
* Description : Initialize one GPIO input pin used by board.
*
*END**************************************************************************/
void GPIO_DRV_InputPinInit(const gpio_input_pin_user_config_t *inputPin)
{
/* Get actual port and pin number.*/
uint32_t port = GPIO_EXTRACT_PORT(inputPin->pinName);
uint32_t pin = GPIO_EXTRACT_PIN(inputPin->pinName);
GPIO_Type * gpioBase = g_gpioBase[port];
PORT_Type * portBase = g_portBase[port];
/* Un-gate port clock*/
CLOCK_SYS_EnablePortClock(port);
/* Set current pin as gpio.*/
PORT_HAL_SetMuxMode(portBase, pin, kPortMuxAsGpio);
/* Set current pin as digital input.*/
GPIO_HAL_SetPinDir(gpioBase, pin, kGpioDigitalInput);
/* Configure GPIO input features. */
#if FSL_FEATURE_PORT_HAS_PULL_ENABLE
PORT_HAL_SetPullCmd(portBase, pin, inputPin->config.isPullEnable);
#endif
#if FSL_FEATURE_PORT_HAS_PULL_SELECTION
PORT_HAL_SetPullMode(portBase, pin, inputPin->config.pullSelect);
#endif
#if FSL_FEATURE_PORT_HAS_PASSIVE_FILTER
PORT_HAL_SetPassiveFilterCmd(portBase, pin,
inputPin->config.isPassiveFilterEnabled);
#endif
#if FSL_FEATURE_PORT_HAS_DIGITAL_FILTER
PORT_HAL_SetDigitalFilterCmd(portBase, pin,
inputPin->config.isDigitalFilterEnabled);
#endif
#if FSL_FEATURE_GPIO_HAS_INTERRUPT_VECTOR
PORT_HAL_SetPinIntMode(portBase, pin, inputPin->config.interrupt);
/* Configure NVIC */
if ((inputPin->config.interrupt) && (g_portIrqId[port]))
{
/* Enable GPIO interrupt.*/
INT_SYS_EnableIRQ(g_portIrqId[port]);
}
#endif
}
/*************************************************************************
* Function Name: SPI0_init
* Parameters: none
* Return: none
* Description: SPI initialization
*************************************************************************/
void SPI0_init(void)
{
dspi_baud_rate_divisors_t divisors;
divisors.doubleBaudRate = 0;
divisors.baudRateDivisor = 3;
divisors.prescaleDivisor = 3;
dspi_data_format_config_t config;
config.clkPhase = kDspiClockPhase_SecondEdge;
config.bitsPerFrame = 8;
config.clkPolarity = kDspiClockPolarity_ActiveHigh;
config.direction = kDspiMsbFirst;
#if defined(KV10Z7_SERIES)
PORT_HAL_SetMuxMode(PORTC_BASE_PTR,2,kPortMuxAsGpio);// MC33937 RESET
GPIO_HAL_SetPinDir(GPIOC_BASE_PTR, 2, kGpioDigitalOutput);
PORT_HAL_SetMuxMode(PORTD_BASE_PTR,7,kPortMuxAsGpio);// MC33937 DRV_EN
GPIO_HAL_SetPinDir(GPIOD_BASE_PTR, 7, kGpioDigitalOutput);
#elif (defined(KV10Z1287_SERIES) || defined(KV11Z7_SERIES))
PORT_HAL_SetMuxMode(PORTE_BASE_PTR,29,kPortMuxAsGpio);// MC33937 DRV_EN
GPIO_HAL_SetPinDir(GPIOE_BASE_PTR, 29, kGpioDigitalOutput);
#endif
GPIO_HAL_SetPinOutput(GPIOC_BASE_PTR, 2);//MC33937_RESET_HIGH;
#if defined(KV10Z7_SERIES)
GPIO_HAL_SetPinOutput(GPIOD_BASE_PTR, 7);//MC33937_ENABLE_HIGH;
#elif (defined(KV10Z1287_SERIES) || defined(KV11Z7_SERIES))
GPIO_HAL_SetPinOutput(GPIOE_BASE_PTR, 29);
#endif
DSPI_HAL_StopTransfer(SPI0_BASE_PTR);// halt SPI before SPI setting
DSPI_HAL_Enable(SPI0_BASE_PTR);//Enables the DSPI peripheral and sets the MCR MDIS to 0.
DSPI_HAL_SetMasterSlaveMode(SPI0_BASE_PTR, kDspiMaster);//Enable Master Mode
DSPI_HAL_SetPcsPolarityMode(SPI0_BASE_PTR, kDspiPcs0,kDspiPcs_ActiveLow);//The setting for either "active high, inactive low (0)" or "active low, inactive high(1)" of type dspi_pcs_polarity_config_t.
DSPI_HAL_SetFifoCmd(SPI0_BASE_PTR, false, false);//Disable the DSPI FIFOs.
DSPI_HAL_PresetTransferCount(SPI0_BASE_PTR, 0x0000);//Pre-sets the transfer count.
DSPI_HAL_SetDelay(SPI0_BASE_PTR, kDspiCtar0,3,0, kDspiPcsToSck); // CTAR0 selection option for master or slave mode
DSPI_HAL_SetDelay(SPI0_BASE_PTR, kDspiCtar0,2,0, kDspiLastSckToPcs);
DSPI_HAL_SetDelay(SPI0_BASE_PTR, kDspiCtar0,0,2, kDspiAfterTransfer);
DSPI_HAL_SetBaudDivisors(SPI0_BASE_PTR, kDspiCtar0, &divisors);
DSPI_HAL_SetDataFormat(SPI0_BASE_PTR, kDspiCtar0, &config);
DSPI_HAL_ClearStatusFlag(SPI0_BASE_PTR ,kDspiTxComplete);///*!< TCF status/interrupt enable */
DSPI_HAL_ClearStatusFlag(SPI0_BASE_PTR ,kDspiEndOfQueue);///*!< EOQF status/interrupt enable*/
DSPI_HAL_ClearStatusFlag(SPI0_BASE_PTR ,kDspiTxFifoUnderflow);///*!< TFUF status/interrupt enable*/
DSPI_HAL_ClearStatusFlag(SPI0_BASE_PTR ,kDspiTxFifoFillRequest);///*!< TFFF status/interrupt enable*/
DSPI_HAL_ClearStatusFlag(SPI0_BASE_PTR ,kDspiRxFifoOverflow);///*!< RFOF status/interrupt enable*/
DSPI_HAL_SetIntMode(SPI0_BASE_PTR,kDspiTxComplete, false);/*!< TCF status/interrupt disable */
DSPI_HAL_SetIntMode(SPI0_BASE_PTR,kDspiEndOfQueue, false);/*!< EOQF status/interrupt disable */
DSPI_HAL_SetIntMode(SPI0_BASE_PTR,kDspiTxFifoUnderflow, false);/*!< TFUF status/interrupt disable*/
DSPI_HAL_SetIntMode(SPI0_BASE_PTR,kDspiTxFifoFillRequest, false);/*!< TFFF status/interrupt disable*/
DSPI_HAL_SetIntMode(SPI0_BASE_PTR,kDspiRxFifoOverflow, false);/*!< RFOF status/interrupt disable*/
DSPI_HAL_SetIntMode(SPI0_BASE_PTR,kDspiRxFifoDrainRequest, false);/*!< RFDF status/interrupt disable*/
DSPI_HAL_StartTransfer(SPI0_BASE_PTR);// Starts the DSPI transfers, clears HALT bit in MCR.
PORT_HAL_SetMuxMode(PORTD_BASE_PTR, 3, kPortMuxAlt2);
PORT_HAL_SetMuxMode(PORTD_BASE_PTR, 2, kPortMuxAlt2);
PORT_HAL_SetMuxMode(PORTC_BASE_PTR, 0, kPortMuxAlt7);
PORT_HAL_SetMuxMode(PORTC_BASE_PTR, 5, kPortMuxAlt2);
}
/*************************************************************************
* Function Name: FTM0_init
* Parameters: none
* Return: none
* Description: FlexTimer 0 initialization
*************************************************************************/
void FTM0_init(void)
{
FTM_HAL_SetWriteProtectionCmd(FTM0_BASE_PTR, false);//false: Write-protection is disabled
FTM_HAL_Enable(FTM0_BASE_PTR, true);//true: all registers including FTM-specific registers are available
FTM_HAL_SetCounterInitVal(FTM0_BASE_PTR, (uint16_t)(-PWM_MODULO/2));
FTM_HAL_SetMod(FTM0_BASE_PTR, (uint16_t)PWM_MODULO/2-1); // 20 kHz
FTM_HAL_SetChnEdgeLevel(FTM0_BASE_PTR, 0, 2);
FTM_HAL_SetChnEdgeLevel(FTM0_BASE_PTR, 1, 2);
FTM_HAL_SetChnEdgeLevel(FTM0_BASE_PTR, 2, 2);
FTM_HAL_SetChnEdgeLevel(FTM0_BASE_PTR, 3, 2);
FTM_HAL_SetChnEdgeLevel(FTM0_BASE_PTR, 4, 2);
FTM_HAL_SetChnEdgeLevel(FTM0_BASE_PTR, 5, 2);
// output mask updated on PWM synchronization (not on rising edge of clock)
FTM_HAL_SetMaxLoadingCmd(FTM0_BASE_PTR, true);//True to enable minimum loading point
FTM_HAL_SetOutmaskPwmSyncModeCmd(FTM0_BASE_PTR, 1);//true if OUTMASK register is updated only by PWM sync\n
FTM_HAL_SetDualChnPwmSyncCmd(FTM0_BASE_PTR, 0, true);//True to enable PWM synchronization
FTM_HAL_SetDualChnPwmSyncCmd(FTM0_BASE_PTR, 1, true);
FTM_HAL_SetDualChnPwmSyncCmd(FTM0_BASE_PTR, 2, true);
FTM_HAL_SetDualChnDeadtimeCmd(FTM0_BASE_PTR, 0, true);//True to enable deadtime insertion, false to disable
FTM_HAL_SetDualChnDeadtimeCmd(FTM0_BASE_PTR, 1, true);
FTM_HAL_SetDualChnDeadtimeCmd(FTM0_BASE_PTR, 2, true);
FTM_HAL_SetDualChnCompCmd(FTM0_BASE_PTR, 0, true);//True to enable complementary mode, false to disable
FTM_HAL_SetDualChnCompCmd(FTM0_BASE_PTR, 1, true);
FTM_HAL_SetDualChnCompCmd(FTM0_BASE_PTR, 2, true);
FTM_HAL_SetDualChnCombineCmd(FTM0_BASE_PTR, 0, true);// True to enable channel pair to combine, false to disable
FTM_HAL_SetDualChnCombineCmd(FTM0_BASE_PTR, 1, true);
FTM_HAL_SetDualChnCombineCmd(FTM0_BASE_PTR, 2, true);
// High transistors have negative polarity (MC33927/37)
FTM_HAL_SetDeadtimePrescale(FTM0_BASE_PTR, kFtmDivided1);
FTM_HAL_SetDeadtimeCount(FTM0_BASE_PTR, FTM_DEADTIME_DTVAL(63)); // DTVAL - deadtime value (0-63): deadtime period = DTPS x DTVAL
FTM_HAL_SetInitTriggerCmd(FTM0_BASE_PTR, true);//True to enable, false to disable
FTM_HAL_SetChnOutputPolarityCmd(FTM0_BASE_PTR, 0, 1);
FTM_HAL_SetChnOutputPolarityCmd(FTM0_BASE_PTR, 2, 1);
FTM_HAL_SetChnOutputPolarityCmd(FTM0_BASE_PTR, 4, 1);
/* Following line configures:
- enhanced PWM synchronization, FTM counter reset on SW sync
- output SW control / polarity registers updated on PWM synchronization (not on rising edge of clock)
- output SW control/inverting(swap)/mask registers updated from buffers on SW synchronization */
FTM_HAL_SetPwmSyncModeCmd(FTM0_BASE_PTR, true);// true means use Enhanced PWM synchronization\n
FTM_HAL_SetCounterSoftwareSyncModeCmd(FTM0_BASE_PTR, true);//true means software trigger activates register sync\n
FTM_HAL_SetSwoctrlPwmSyncModeCmd(FTM0_BASE_PTR, true);//true means SWOCTRL register is updated by PWM synch\n
FTM_HAL_SetInvctrlPwmSyncModeCmd(FTM0_BASE_PTR, true);//true means INVCTRL register is updated by PWM synch\n
FTM_HAL_SetSwoctrlSoftwareSyncModeCmd(FTM0_BASE_PTR, true);//true means software trigger activates register sync\n
FTM_HAL_SetInvctrlSoftwareSyncModeCmd(FTM0_BASE_PTR, true);//true means software trigger activates register sync\n
FTM_HAL_SetOutmaskSoftwareSyncModeCmd(FTM0_BASE_PTR, true);//true means software
FTM_HAL_SetChnOutputMask(FTM0_BASE_PTR, 0, 1);//Sets the FTM peripheral timer channel output mask.
FTM_HAL_SetChnOutputMask(FTM0_BASE_PTR, 1, 1);
FTM_HAL_SetChnOutputMask(FTM0_BASE_PTR, 2, 1);
FTM_HAL_SetChnOutputMask(FTM0_BASE_PTR, 3, 1);
FTM_HAL_SetChnOutputMask(FTM0_BASE_PTR, 4, 1);
FTM_HAL_SetChnOutputMask(FTM0_BASE_PTR, 5, 1);
FTM_HAL_SetCounter(FTM0_BASE_PTR, 1U); // update of FTM settings
// no ISR, counting up, system clock, divide by 1
FTM_HAL_SetClockSource(FTM0_BASE_PTR, kClock_source_FTM_SystemClk);
FTM_HAL_SetChnCountVal(FTM0_BASE_PTR, 0, (uint16_t)(-PWM_MODULO/4));
FTM_HAL_SetChnCountVal(FTM0_BASE_PTR, 1,(uint16_t) PWM_MODULO/4);
FTM_HAL_SetChnCountVal(FTM0_BASE_PTR, 2, (uint16_t)(-PWM_MODULO/4));
FTM_HAL_SetChnCountVal(FTM0_BASE_PTR, 3,(uint16_t) PWM_MODULO/4);
FTM_HAL_SetChnCountVal(FTM0_BASE_PTR, 4, (uint16_t)(-PWM_MODULO/4));
FTM_HAL_SetChnCountVal(FTM0_BASE_PTR, 5,(uint16_t) PWM_MODULO/4);
FTM_HAL_SetSoftwareTriggerCmd(FTM0_BASE_PTR, 1);
FTM_HAL_SetPwmLoadCmd(FTM0_BASE_PTR, 1);
// FTM0 PWM output pins
PORT_HAL_SetMuxMode(PORTC_BASE_PTR, 1, kPortMuxAlt4);
PORT_HAL_SetMuxMode(PORTC_BASE_PTR, 3, kPortMuxAlt4);
PORT_HAL_SetMuxMode(PORTC_BASE_PTR, 4, kPortMuxAlt4);
PORT_HAL_SetMuxMode(PORTD_BASE_PTR, 4, kPortMuxAlt4);
PORT_HAL_SetMuxMode(PORTD_BASE_PTR, 5, kPortMuxAlt4);
#if defined(KV10Z7_SERIES)
PORT_HAL_SetMuxMode(PORTE_BASE_PTR, 25, kPortMuxAlt3);
#elif (defined(KV10Z1287_SERIES) || defined(KV11Z7_SERIES))
PORT_HAL_SetMuxMode(PORTC_BASE_PTR, 2, kPortMuxAlt4);
#endif
GPIO_HAL_SetPinDir(GPIOC_BASE_PTR, 1, kGpioDigitalOutput);
GPIO_HAL_SetPinDir(GPIOC_BASE_PTR, 3, kGpioDigitalOutput);
GPIO_HAL_SetPinDir(GPIOC_BASE_PTR, 4, kGpioDigitalOutput);
GPIO_HAL_SetPinDir(GPIOD_BASE_PTR, 4, kGpioDigitalOutput);
GPIO_HAL_SetPinDir(GPIOD_BASE_PTR, 5, kGpioDigitalOutput);
#if defined(KV10Z7_SERIES)
GPIO_HAL_SetPinDir(GPIOE_BASE_PTR, 25, kGpioDigitalOutput);
#elif (defined(KV10Z1287_SERIES) || defined(KV11Z7_SERIES))
GPIO_HAL_SetPinDir(GPIOC_BASE_PTR, 2, kGpioDigitalOutput);
#endif
}