/**
* Function IsSame
* test is 2 zones are equivalent:
* 2 zones are equivalent if they have same parameters and same outlines
* info relative to filling is not take in account
* @param aZoneToCompare = zone to compare with "this"
*/
bool ZONE_CONTAINER::IsSame( const ZONE_CONTAINER& aZoneToCompare )
{
// compare basic parameters:
if( GetLayer() != aZoneToCompare.GetLayer() )
return false;
if( GetNetCode() != aZoneToCompare.GetNetCode() )
return false;
if( GetPriority() != aZoneToCompare.GetPriority() )
return false;
// Compare zone specific parameters
if( GetIsKeepout() != aZoneToCompare.GetIsKeepout() )
return false;
if( GetIsKeepout() )
{
if( GetDoNotAllowCopperPour() != aZoneToCompare.GetDoNotAllowCopperPour() )
return false;
if( GetDoNotAllowVias() != aZoneToCompare.GetDoNotAllowVias() )
return false;
if( GetDoNotAllowTracks() != aZoneToCompare.GetDoNotAllowTracks() )
return false;
}
if( m_ArcToSegmentsCount != aZoneToCompare.GetArcSegmentCount() )
return false;
if( m_ZoneClearance != aZoneToCompare.m_ZoneClearance )
return false;
if( m_ZoneMinThickness != aZoneToCompare.GetMinThickness() )
return false;
if( m_FillMode != aZoneToCompare.GetFillMode() )
return false;
if( m_PadConnection != aZoneToCompare.m_PadConnection )
return false;
if( m_ThermalReliefGap != aZoneToCompare.m_ThermalReliefGap )
return false;
if( m_ThermalReliefCopperBridge != aZoneToCompare.m_ThermalReliefCopperBridge )
return false;
// Compare outlines
wxASSERT( m_Poly ); // m_Poly == NULL Should never happen
wxASSERT( aZoneToCompare.Outline() );
if( Outline()->m_CornersList.GetList() !=
aZoneToCompare.Outline()->m_CornersList.GetList() ) // Compare vector
return false;
return true;
}
bool PCB_POLYGON::Parse( XNODE* aNode,
const wxString& aDefaultMeasurementUnit,
const wxString& aActualConversion )
{
XNODE* lNode;
wxString propValue;
lNode = FindNode( aNode, wxT( "netNameRef" ) );
if( lNode )
{
lNode->GetAttribute( wxT( "Name" ), &propValue );
propValue.Trim( false );
propValue.Trim( true );
m_net = propValue;
m_netCode = GetNetCode( m_net );
}
// retrieve polygon outline
FormPolygon( aNode, &m_outline, aDefaultMeasurementUnit, aActualConversion );
m_positionX = m_outline[0]->x;
m_positionY = m_outline[0]->y;
// fill the polygon with the same contour as its outline is
m_islands.Add( new VERTICES_ARRAY );
FormPolygon( aNode, m_islands[0], aDefaultMeasurementUnit, aActualConversion );
return true;
}
TRACK* TRACK::GetEndNetCode( int NetCode )
{
TRACK* NextS, * Track = this;
int ii = 0;
if( Track == NULL )
return NULL;
if( NetCode == -1 )
NetCode = GetNetCode();
while( Track != NULL )
{
NextS = (TRACK*) Track->Pnext;
if( Track->GetNetCode() == NetCode )
ii++;
if( NextS == NULL )
break;
if( NextS->GetNetCode() > NetCode )
break;
Track = NextS;
}
if( ii )
return Track;
else
return NULL;
}
TRACK* TRACK::GetStartNetCode( int NetCode )
{
TRACK* Track = this;
int ii = 0;
if( NetCode == -1 )
NetCode = GetNetCode();
while( Track != NULL )
{
if( Track->GetNetCode() > NetCode )
break;
if( Track->GetNetCode() == NetCode )
{
ii++;
break;
}
Track = (TRACK*) Track->Pnext;
}
if( ii )
return Track;
else
return NULL;
}
wxString TRACK::GetSelectMenuText() const
{
wxString text;
wxString netname;
NETINFO_ITEM* net;
BOARD* board = GetBoard();
// deleting tracks requires all the information we can get to
// disambiguate all the choices under the cursor!
if( board )
{
net = GetNet();
if( net )
netname = net->GetNetname();
else
netname = _("Not found");
}
else
{
wxFAIL_MSG( wxT( "TRACK::GetSelectMenuText: BOARD is NULL" ) );
netname = wxT( "???" );
}
text.Printf( _("Track %s, net [%s] (%d) on layer %s, length: %s" ),
GetChars( ShowWidth() ), GetChars( netname ),
GetNetCode(), GetChars( GetLayerName() ),
GetChars( ::LengthDoubleToString( GetLength() ) ) );
return text;
}
void TRACK::GetMsgPanelInfoBase_Common( std::vector< MSG_PANEL_ITEM >& aList )
{
wxString msg;
// Display Net Name
if( GetBoard() )
{
NETINFO_ITEM* net = GetNet();
if( net )
msg = net->GetNetname();
else
msg = wxT( "<noname>" );
aList.push_back( MSG_PANEL_ITEM( _( "NetName" ), msg, RED ) );
// Display net code : (useful in test or debug)
msg.Printf( wxT( "%d.%d" ), GetNetCode(), GetSubNet() );
aList.push_back( MSG_PANEL_ITEM( _( "NetCode" ), msg, RED ) );
}
#if defined(DEBUG)
// Display the flags
msg.Printf( wxT( "0x%08X" ), m_Flags );
aList.push_back( MSG_PANEL_ITEM( wxT( "Flags" ), msg, BLUE ) );
#if 0
// Display start and end pointers:
msg.Printf( wxT( "%p" ), start );
aList.push_back( MSG_PANEL_ITEM( wxT( "start ptr" ), msg, BLUE ) );
msg.Printf( wxT( "%p" ), end );
aList.push_back( MSG_PANEL_ITEM( wxT( "end ptr" ), msg, BLUE ) );
// Display this ptr
msg.Printf( wxT( "%p" ), this );
aList.push_back( MSG_PANEL_ITEM( wxT( "this" ), msg, BLUE ) );
#endif
#if 0
// Display start and end positions:
msg.Printf( wxT( "%d %d" ), m_Start.x, m_Start.y );
aList.push_back( MSG_PANEL_ITEM( wxT( "Start pos" ), msg, BLUE ) );
msg.Printf( wxT( "%d %d" ), m_End.x, m_End.y );
aList.push_back( MSG_PANEL_ITEM( wxT( "End pos" ), msg, BLUE ) );
#endif
#endif // defined(DEBUG)
// Display the State member
msg = wxT( ". . " );
if( GetState( TRACK_LOCKED ) )
msg[0] = 'F';
if( GetState( TRACK_AR ) )
msg[2] = 'A';
aList.push_back( MSG_PANEL_ITEM( _( "Status" ), msg, MAGENTA ) );
}
bool PCB_COPPER_POUR::Parse( XNODE* aNode,
wxString aDefaultMeasurementUnit,
wxString aActualConversion,
wxStatusBar* aStatusBar )
{
XNODE* lNode;
wxString pourType, str, propValue;
int pourSpacing, thermalWidth;
// aStatusBar->SetStatusText( aStatusBar->GetStatusText() + wxT( " CooperPour..." ) );
//str = FindNode( aNode, wxT( "pourType" ) )->GetNodeContent();
//str.Trim( false );
//pourType = str.MakeUpper();
lNode = FindNode( aNode, wxT( "netNameRef" ) );
if( lNode )
{
lNode->GetAttribute( wxT( "Name" ), &propValue );
propValue.Trim( false );
propValue.Trim( true );
m_net = propValue;
m_netCode = GetNetCode( m_net );
}
if( FindNode( aNode, wxT( "width" ) ) )
SetWidth( FindNode( aNode, wxT( "width" ) )->GetNodeContent(),
aDefaultMeasurementUnit, &m_width, aActualConversion );
if( FindNode( aNode, wxT( "pourSpacing" ) ) )
SetWidth( FindNode( aNode, wxT( "pourSpacing" ) )->GetNodeContent(),
aDefaultMeasurementUnit, &pourSpacing, aActualConversion );
if( FindNode( aNode, wxT( "thermalWidth" ) ) )
SetWidth( FindNode( aNode, wxT( "thermalWidth" ) )->GetNodeContent(),
aDefaultMeasurementUnit, &thermalWidth, aActualConversion );
lNode = FindNode( aNode, wxT( "pcbPoly" ) );
if( lNode )
{
// retrieve copper pour outline
FormPolygon( lNode, &m_outline, aDefaultMeasurementUnit, aActualConversion );
m_positionX = m_outline[0]->x;
m_positionY = m_outline[0]->y;
}
else
{
return false;
}
return true;
}
wxString ZONE_CONTAINER::GetSelectMenuText() const
{
wxString text;
NETINFO_ITEM* net;
BOARD* board = GetBoard();
int ncont = m_Poly->GetContour( m_CornerSelection );
if( ncont )
text << wxT( " " ) << _( "(Cutout)" );
if( GetIsKeepout() )
text << wxT( " " ) << _( "(Keepout)" );
text << wxString::Format( wxT( " (%08lX)" ), m_TimeStamp );
// Display net name for copper zones
if( !GetIsKeepout() )
{
if( GetNetCode() >= 0 )
{
if( board )
{
net = GetNet();
if( net )
{
text << wxT( " [" ) << net->GetNetname() << wxT( "]" );
}
}
else
{
text << _( "** NO BOARD DEFINED **" );
}
}
else
{ // A netcode < 0 is an error:
// Netname not found or area not initialised
text << wxT( " [" ) << GetNetname() << wxT( "]" );
text << wxT( " <" ) << _( "Not Found" ) << wxT( ">" );
}
}
wxString msg;
msg.Printf( _( "Zone Outline %s on %s" ), GetChars( text ),
GetChars( GetLayerName() ) );
return msg;
}
void D_PAD::CopyNetlistSettings( D_PAD* aPad )
{
// Don't do anything foolish like trying to copy to yourself.
wxCHECK_RET( aPad != NULL && aPad != this, wxT( "Cannot copy to NULL or yourself." ) );
aPad->SetNetCode( GetNetCode() );
aPad->SetLocalClearance( m_LocalClearance );
aPad->SetLocalSolderMaskMargin( m_LocalSolderMaskMargin );
aPad->SetLocalSolderPasteMargin( m_LocalSolderPasteMargin );
aPad->SetLocalSolderPasteMarginRatio( m_LocalSolderPasteMarginRatio );
aPad->SetZoneConnection( m_ZoneConnection );
aPad->SetThermalWidth( m_ThermalWidth );
aPad->SetThermalGap( m_ThermalGap );
}
TRACK* TRACK::GetBestInsertPoint( BOARD* aPcb )
{
TRACK* track;
if( Type() == PCB_ZONE_T )
track = aPcb->m_Zone;
else
track = aPcb->m_Track;
for( ; track; track = track->Next() )
{
if( GetNetCode() <= track->GetNetCode() )
return track;
}
return NULL;
}
wxString VIA::GetSelectMenuText() const
{
wxString text;
wxString format;
BOARD* board = GetBoard();
switch( GetViaType() )
{
case VIA_BLIND_BURIED:
format = _( "Blind/Buried Via %s, net[%s] (%d) on layers %s/%s" );
break;
case VIA_MICROVIA:
format = _( "Micro Via %s, Net [%s] (%d) on layers %s/%s" );
break;
// else say nothing about normal (through) vias
default:
format = _( "Via %s net [%s] (%d) on layers %s/%s" );
break;
}
if( board )
{
wxString netname = GetNetname();
// say which layers, only two for now
LAYER_NUM topLayer;
LAYER_NUM botLayer;
LayerPair( &topLayer, &botLayer );
text.Printf( format.GetData(), GetChars( ShowWidth() ),
GetChars( netname ), GetNetCode(),
GetChars( board->GetLayerName( topLayer ) ),
GetChars( board->GetLayerName( botLayer ) ) );
}
else
{
wxFAIL_MSG( wxT( "VIA::GetSelectMenuText: BOARD is NULL" ) );
text.Printf( format.GetData(), GetChars( ShowWidth() ),
wxT( "???" ), 0,
wxT( "??" ), wxT( "??" ) );
}
return text;
}
void CN_CONNECTIVITY_ALGO::markItemNetAsDirty( const BOARD_ITEM* aItem )
{
if( aItem->IsConnected() )
{
auto citem = static_cast<const BOARD_CONNECTED_ITEM*>( aItem );
MarkNetAsDirty( citem->GetNetCode() );
}
else
{
if( aItem->Type() == PCB_MODULE_T )
{
auto mod = static_cast <const MODULE*>( aItem );
for( D_PAD* pad = mod->PadsList(); pad; pad = pad->Next() )
MarkNetAsDirty( pad->GetNetCode() );
}
}
}
bool PCB_PLANE::Parse( XNODE* aNode,
wxString aDefaultMeasurementUnit,
wxString aActualConversion,
wxStatusBar* aStatusBar )
{
XNODE* lNode;
wxString pourType, str, propValue;
// aStatusBar->SetStatusText( aStatusBar->GetStatusText() + wxT( " Plane..." ) );
lNode = FindNode( aNode, wxT( "netNameRef" ) );
if( lNode )
{
lNode->GetAttribute( wxT( "Name" ), &propValue );
propValue.Trim( false );
propValue.Trim( true );
m_net = propValue;
m_netCode = GetNetCode( m_net );
}
if( FindNode( aNode, wxT( "width" ) ) )
SetWidth( FindNode( aNode, wxT( "width" ) )->GetNodeContent(),
aDefaultMeasurementUnit, &m_width, aActualConversion );
lNode = FindNode( aNode, wxT( "pcbPoly" ) );
if( lNode )
{
// retrieve plane outline
FormPolygon( lNode, &m_outline, aDefaultMeasurementUnit, aActualConversion );
m_positionX = m_outline[0]->x;
m_positionY = m_outline[0]->y;
}
else
{
return false;
}
return true;
}
TRACK* TRACK::GetBestInsertPoint( BOARD* aPcb )
{
TRACK* track;
// When reading from a file most of the items will already be in the correct order.
// Searching from the back therefore takes us from n^2 to essentially 0.
if( Type() == PCB_ZONE_T ) // Deprecated items, only found in very old boards
track = aPcb->m_SegZoneDeprecated.GetLast();
else
track = aPcb->m_Track.GetLast();
for( ; track; track = track->Back() )
{
if( GetNetCode() >= track->GetNetCode() )
return track->Next();
}
if( Type() == PCB_ZONE_T ) // Deprecated
return aPcb->m_SegZoneDeprecated.GetFirst();
else
return aPcb->m_Track.GetFirst();
}
/**
* Function AddClearanceAreasPolygonsToPolysList
* Supports a min thickness area constraint.
* Add non copper areas polygons (pads and tracks with clearance)
* to the filled copper area found
* in BuildFilledPolysListData after calculating filled areas in a zone
* Non filled copper areas are pads and track and their clearance areas
* The filled copper area must be computed just before.
* BuildFilledPolysListData() call this function just after creating the
* filled copper area polygon (without clearance areas)
* to do that this function:
* 1 - Creates the main outline (zone outline) using a correction to shrink the resulting area
* with m_ZoneMinThickness/2 value.
* The result is areas with a margin of m_ZoneMinThickness/2
* When drawing outline with segments having a thickness of m_ZoneMinThickness, the
* outlines will match exactly the initial outlines
* 3 - Add all non filled areas (pads, tracks) in group B with a clearance of m_Clearance +
* m_ZoneMinThickness/2
* in a buffer
* - If Thermal shapes are wanted, add non filled area, in order to create these thermal shapes
* 4 - calculates the polygon A - B
* 5 - put resulting list of polygons (filled areas) in m_FilledPolysList
* This zone contains pads with the same net.
* 6 - Remove insulated copper islands
* 7 - If Thermal shapes are wanted, remove unconnected stubs in thermal shapes:
* creates a buffer of polygons corresponding to stubs to remove
* sub them to the filled areas.
* Remove new insulated copper islands
*/
void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList( BOARD* aPcb )
{
// Set the number of segments in arc approximations
if( m_ArcToSegmentsCount == ARC_APPROX_SEGMENTS_COUNT_HIGHT_DEF )
s_CircleToSegmentsCount = ARC_APPROX_SEGMENTS_COUNT_HIGHT_DEF;
else
s_CircleToSegmentsCount = ARC_APPROX_SEGMENTS_COUNT_LOW_DEF;
/* calculates the coeff to compensate radius reduction of holes clearance
* due to the segment approx.
* For a circle the min radius is radius * cos( 2PI / s_CircleToSegmentsCount / 2)
* s_Correction is 1 /cos( PI/s_CircleToSegmentsCount )
*/
s_Correction = 1.0 / cos( M_PI / s_CircleToSegmentsCount );
// This KI_POLYGON_SET is the area(s) to fill, with m_ZoneMinThickness/2
KI_POLYGON_SET polyset_zone_solid_areas;
int margin = m_ZoneMinThickness / 2;
/* First, creates the main polygon (i.e. the filled area using only one outline)
* to reserve a m_ZoneMinThickness/2 margin around the outlines and holes
* this margin is the room to redraw outlines with segments having a width set to
* m_ZoneMinThickness
* so m_ZoneMinThickness is the min thickness of the filled zones areas
* the main polygon is stored in polyset_zone_solid_areas
*/
CopyPolygonsFromFilledPolysListToKiPolygonList( polyset_zone_solid_areas );
polyset_zone_solid_areas -= margin;
if( polyset_zone_solid_areas.size() == 0 )
return;
/* Calculates the clearance value that meet DRC requirements
* from m_ZoneClearance and clearance from the corresponding netclass
* We have a "local" clearance in zones because most of time
* clearance between a zone and others items is bigger than the netclass clearance
* this is more true for small clearance values
* Note also the "local" clearance is used for clearance between non copper items
* or items like texts on copper layers
*/
int zone_clearance = std::max( m_ZoneClearance, GetClearance() );
zone_clearance += margin;
/* store holes (i.e. tracks and pads areas as polygons outlines)
* in a polygon list
*/
/* items ouside the zone bounding box are skipped
* the bounding box is the zone bounding box + the biggest clearance found in Netclass list
*/
EDA_RECT item_boundingbox;
EDA_RECT zone_boundingbox = GetBoundingBox();
int biggest_clearance = aPcb->GetDesignSettings().GetBiggestClearanceValue();
biggest_clearance = std::max( biggest_clearance, zone_clearance );
zone_boundingbox.Inflate( biggest_clearance );
/*
* First : Add pads. Note: pads having the same net as zone are left in zone.
* Thermal shapes will be created later if necessary
*/
int item_clearance;
// static to avoid unnecessary memory allocation when filling many zones.
static CPOLYGONS_LIST cornerBufferPolysToSubstract;
cornerBufferPolysToSubstract.RemoveAllContours();
/* Use a dummy pad to calculate hole clerance when a pad is not on all copper layers
* and this pad has a hole
* This dummy pad has the size and shape of the hole
* Therefore, this dummy pad is a circle or an oval.
* A pad must have a parent because some functions expect a non null parent
* to find the parent board, and some other data
*/
MODULE dummymodule( aPcb ); // Creates a dummy parent
D_PAD dummypad( &dummymodule );
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
D_PAD* nextpad;
for( D_PAD* pad = module->Pads(); pad != NULL; pad = nextpad )
{
nextpad = pad->Next(); // pad pointer can be modified by next code, so
// calculate the next pad here
if( !pad->IsOnLayer( GetLayer() ) )
{
/* Test for pads that are on top or bottom only and have a hole.
* There are curious pads but they can be used for some components that are
* inside the board (in fact inside the hole. Some photo diodes and Leds are
* like this)
*/
if( pad->GetDrillSize().x == 0 && pad->GetDrillSize().y == 0 )
continue;
// Use a dummy pad to calculate a hole shape that have the same dimension as
// the pad hole
dummypad.SetSize( pad->GetDrillSize() );
dummypad.SetOrientation( pad->GetOrientation() );
dummypad.SetShape( pad->GetDrillShape() == PAD_DRILL_OBLONG ?
PAD_OVAL : PAD_CIRCLE );
dummypad.SetPosition( pad->GetPosition() );
pad = &dummypad;
}
// Note: netcode <=0 means not connected item
if( ( pad->GetNetCode() != GetNetCode() ) || ( pad->GetNetCode() <= 0 ) )
{
item_clearance = pad->GetClearance() + margin;
item_boundingbox = pad->GetBoundingBox();
item_boundingbox.Inflate( item_clearance );
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
int clearance = std::max( zone_clearance, item_clearance );
pad->TransformShapeWithClearanceToPolygon( cornerBufferPolysToSubstract,
clearance,
s_CircleToSegmentsCount,
s_Correction );
}
continue;
}
if( ( GetPadConnection( pad ) == PAD_NOT_IN_ZONE )
|| ( pad->GetShape() == PAD_TRAPEZOID ) )
// PAD_TRAPEZOID shapes are not in zones because they are used in microwave apps
// and i think it is good that shapes are not changed by thermal pads or others
{
int gap = zone_clearance;
int thermalGap = GetThermalReliefGap( pad );
gap = std::max( gap, thermalGap );
item_boundingbox = pad->GetBoundingBox();
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
pad->TransformShapeWithClearanceToPolygon( cornerBufferPolysToSubstract,
gap,
s_CircleToSegmentsCount,
s_Correction );
}
}
}
}
/* Add holes (i.e. tracks and vias areas as polygons outlines)
* in cornerBufferPolysToSubstract
*/
for( TRACK* track = aPcb->m_Track; track; track = track->Next() )
{
if( !track->IsOnLayer( GetLayer() ) )
continue;
if( track->GetNetCode() == GetNetCode() && (GetNetCode() != 0) )
continue;
item_clearance = track->GetClearance() + margin;
item_boundingbox = track->GetBoundingBox();
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
int clearance = std::max( zone_clearance, item_clearance );
track->TransformShapeWithClearanceToPolygon( cornerBufferPolysToSubstract,
clearance,
s_CircleToSegmentsCount,
s_Correction );
}
}
/* Add module edge items that are on copper layers
* Pcbnew allows these items to be on copper layers in microwave applictions
* This is a bad thing, but must be handled here, until a better way is found
*/
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
for( BOARD_ITEM* item = module->GraphicalItems(); item; item = item->Next() )
{
if( !item->IsOnLayer( GetLayer() ) && !item->IsOnLayer( Edge_Cuts ) )
continue;
if( item->Type() != PCB_MODULE_EDGE_T )
continue;
item_boundingbox = item->GetBoundingBox();
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
( (EDGE_MODULE*) item )->TransformShapeWithClearanceToPolygon(
cornerBufferPolysToSubstract, zone_clearance,
s_CircleToSegmentsCount, s_Correction );
}
}
}
// Add graphic items (copper texts) and board edges
for( BOARD_ITEM* item = aPcb->m_Drawings; item; item = item->Next() )
{
if( item->GetLayer() != GetLayer() && item->GetLayer() != Edge_Cuts )
continue;
switch( item->Type() )
{
case PCB_LINE_T:
( (DRAWSEGMENT*) item )->TransformShapeWithClearanceToPolygon(
cornerBufferPolysToSubstract,
zone_clearance, s_CircleToSegmentsCount, s_Correction );
break;
case PCB_TEXT_T:
( (TEXTE_PCB*) item )->TransformBoundingBoxWithClearanceToPolygon(
cornerBufferPolysToSubstract, zone_clearance );
break;
default:
break;
}
}
// Add zones outlines having an higher priority and keepout
for( int ii = 0; ii < GetBoard()->GetAreaCount(); ii++ )
{
ZONE_CONTAINER* zone = GetBoard()->GetArea( ii );
if( zone->GetLayer() != GetLayer() )
continue;
if( !zone->GetIsKeepout() && zone->GetPriority() <= GetPriority() )
continue;
if( zone->GetIsKeepout() && ! zone->GetDoNotAllowCopperPour() )
continue;
// A highter priority zone or keepout area is found: remove its area
item_boundingbox = zone->GetBoundingBox();
if( !item_boundingbox.Intersects( zone_boundingbox ) )
continue;
// Add the zone outline area.
// However if the zone has the same net as the current zone,
// do not add clearance.
// the zone will be connected to the current zone, but filled areas
// will use different parameters (clearance, thermal shapes )
bool addclearance = GetNetCode() != zone->GetNetCode();
int clearance = zone_clearance;
if( zone->GetIsKeepout() )
{
addclearance = true;
clearance = m_ZoneMinThickness / 2;
}
zone->TransformOutlinesShapeWithClearanceToPolygon(
cornerBufferPolysToSubstract,
clearance, addclearance );
}
// Remove thermal symbols
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
for( D_PAD* pad = module->Pads(); pad != NULL; pad = pad->Next() )
{
// Rejects non-standard pads with tht-only thermal reliefs
if( GetPadConnection( pad ) == THT_THERMAL
&& pad->GetAttribute() != PAD_STANDARD )
continue;
if( GetPadConnection( pad ) != THERMAL_PAD
&& GetPadConnection( pad ) != THT_THERMAL )
continue;
if( !pad->IsOnLayer( GetLayer() ) )
continue;
if( pad->GetNetCode() != GetNetCode() )
continue;
item_boundingbox = pad->GetBoundingBox();
int thermalGap = GetThermalReliefGap( pad );
item_boundingbox.Inflate( thermalGap, thermalGap );
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
CreateThermalReliefPadPolygon( cornerBufferPolysToSubstract,
*pad, thermalGap,
GetThermalReliefCopperBridge( pad ),
m_ZoneMinThickness,
s_CircleToSegmentsCount,
s_Correction, s_thermalRot );
}
}
}
// cornerBufferPolysToSubstract contains polygons to substract.
// polyset_zone_solid_areas contains the main filled area
// Calculate now actual solid areas
if( cornerBufferPolysToSubstract.GetCornersCount() > 0 )
{
KI_POLYGON_SET polyset_holes;
cornerBufferPolysToSubstract.ExportTo( polyset_holes );
// Remove holes from initial area.:
polyset_zone_solid_areas -= polyset_holes;
}
// put solid areas in m_FilledPolysList:
m_FilledPolysList.RemoveAllContours();
CopyPolygonsFromKiPolygonListToFilledPolysList( polyset_zone_solid_areas );
// Remove insulated islands:
if( GetNetCode() > 0 )
TestForCopperIslandAndRemoveInsulatedIslands( aPcb );
// Now we remove all unused thermal stubs.
cornerBufferPolysToSubstract.RemoveAllContours();
// Test thermal stubs connections and add polygons to remove unconnected stubs.
// (this is a refinement for thermal relief shapes)
if( GetNetCode() > 0 )
BuildUnconnectedThermalStubsPolygonList( cornerBufferPolysToSubstract, aPcb, this,
s_Correction, s_thermalRot );
// remove copper areas corresponding to not connected stubs
if( cornerBufferPolysToSubstract.GetCornersCount() )
{
KI_POLYGON_SET polyset_holes;
cornerBufferPolysToSubstract.ExportTo( polyset_holes );
// Remove unconnected stubs
polyset_zone_solid_areas -= polyset_holes;
// put these areas in m_FilledPolysList
m_FilledPolysList.RemoveAllContours();
CopyPolygonsFromKiPolygonListToFilledPolysList( polyset_zone_solid_areas );
if( GetNetCode() > 0 )
TestForCopperIslandAndRemoveInsulatedIslands( aPcb );
}
cornerBufferPolysToSubstract.RemoveAllContours();
}
void ZONE_CONTAINER::GetMsgPanelInfo( std::vector< MSG_PANEL_ITEM >& aList )
{
wxString msg;
msg = _( "Zone Outline" );
// Display Cutout instead of Outline for holes inside a zone
// i.e. when num contour !=0
int ncont = m_Poly->GetContour( m_CornerSelection );
if( ncont )
msg << wxT( " " ) << _( "(Cutout)" );
aList.push_back( MSG_PANEL_ITEM( _( "Type" ), msg, DARKCYAN ) );
if( GetIsKeepout() )
{
msg.Empty();
if( GetDoNotAllowVias() )
AccumulateDescription( msg, _("No via") );
if( GetDoNotAllowTracks() )
AccumulateDescription( msg, _("No track") );
if( GetDoNotAllowCopperPour() )
AccumulateDescription( msg, _("No copper pour") );
aList.push_back( MSG_PANEL_ITEM( _( "Keepout" ), msg, RED ) );
}
else if( IsOnCopperLayer() )
{
if( GetNetCode() >= 0 )
{
NETINFO_ITEM* equipot = GetNet();
if( equipot )
msg = equipot->GetNetname();
else
msg = wxT( "<noname>" );
}
else // a netcode < 0 is an error
{
msg = wxT( " [" );
msg << GetNetname() + wxT( "]" );
msg << wxT( " <" ) << _( "Not Found" ) << wxT( ">" );
}
aList.push_back( MSG_PANEL_ITEM( _( "NetName" ), msg, RED ) );
#if 1
// Display net code : (useful in test or debug)
msg.Printf( wxT( "%d" ), GetNetCode() );
aList.push_back( MSG_PANEL_ITEM( _( "NetCode" ), msg, RED ) );
#endif
// Display priority level
msg.Printf( wxT( "%d" ), GetPriority() );
aList.push_back( MSG_PANEL_ITEM( _( "Priority" ), msg, BLUE ) );
}
else
{
aList.push_back( MSG_PANEL_ITEM( _( "Non Copper Zone" ), wxEmptyString, RED ) );
}
aList.push_back( MSG_PANEL_ITEM( _( "Layer" ), GetLayerName(), BROWN ) );
msg.Printf( wxT( "%d" ), (int) m_Poly->m_CornersList.GetCornersCount() );
aList.push_back( MSG_PANEL_ITEM( _( "Corners" ), msg, BLUE ) );
if( m_FillMode )
msg = _( "Segments" );
else
msg = _( "Polygons" );
aList.push_back( MSG_PANEL_ITEM( _( "Fill mode" ), msg, BROWN ) );
// Useful for statistics :
msg.Printf( wxT( "%d" ), (int) m_Poly->m_HatchLines.size() );
aList.push_back( MSG_PANEL_ITEM( _( "Hatch lines" ), msg, BLUE ) );
if( m_FilledPolysList.GetCornersCount() )
{
msg.Printf( wxT( "%d" ), (int) m_FilledPolysList.GetCornersCount() );
aList.push_back( MSG_PANEL_ITEM( _( "Corners in DrawList" ), msg, BLUE ) );
}
}
void ZONE_CONTAINER::buildFeatureHoleList( BOARD* aPcb, SHAPE_POLY_SET& aFeatures )
{
int segsPerCircle;
double correctionFactor;
// Set the number of segments in arc approximations
if( m_ArcToSegmentsCount == ARC_APPROX_SEGMENTS_COUNT_HIGHT_DEF )
segsPerCircle = ARC_APPROX_SEGMENTS_COUNT_HIGHT_DEF;
else
segsPerCircle = ARC_APPROX_SEGMENTS_COUNT_LOW_DEF;
/* calculates the coeff to compensate radius reduction of holes clearance
* due to the segment approx.
* For a circle the min radius is radius * cos( 2PI / s_CircleToSegmentsCount / 2)
* s_Correction is 1 /cos( PI/s_CircleToSegmentsCount )
*/
correctionFactor = 1.0 / cos( M_PI / (double) segsPerCircle );
aFeatures.RemoveAllContours();
int outline_half_thickness = m_ZoneMinThickness / 2;
int zone_clearance = std::max( m_ZoneClearance, GetClearance() );
zone_clearance += outline_half_thickness;
/* store holes (i.e. tracks and pads areas as polygons outlines)
* in a polygon list
*/
/* items ouside the zone bounding box are skipped
* the bounding box is the zone bounding box + the biggest clearance found in Netclass list
*/
EDA_RECT item_boundingbox;
EDA_RECT zone_boundingbox = GetBoundingBox();
int biggest_clearance = aPcb->GetDesignSettings().GetBiggestClearanceValue();
biggest_clearance = std::max( biggest_clearance, zone_clearance );
zone_boundingbox.Inflate( biggest_clearance );
/*
* First : Add pads. Note: pads having the same net as zone are left in zone.
* Thermal shapes will be created later if necessary
*/
int item_clearance;
/* Use a dummy pad to calculate hole clerance when a pad is not on all copper layers
* and this pad has a hole
* This dummy pad has the size and shape of the hole
* Therefore, this dummy pad is a circle or an oval.
* A pad must have a parent because some functions expect a non null parent
* to find the parent board, and some other data
*/
MODULE dummymodule( aPcb ); // Creates a dummy parent
D_PAD dummypad( &dummymodule );
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
D_PAD* nextpad;
for( D_PAD* pad = module->Pads(); pad != NULL; pad = nextpad )
{
nextpad = pad->Next(); // pad pointer can be modified by next code, so
// calculate the next pad here
if( !pad->IsOnLayer( GetLayer() ) )
{
/* Test for pads that are on top or bottom only and have a hole.
* There are curious pads but they can be used for some components that are
* inside the board (in fact inside the hole. Some photo diodes and Leds are
* like this)
*/
if( pad->GetDrillSize().x == 0 && pad->GetDrillSize().y == 0 )
continue;
// Use a dummy pad to calculate a hole shape that have the same dimension as
// the pad hole
dummypad.SetSize( pad->GetDrillSize() );
dummypad.SetOrientation( pad->GetOrientation() );
dummypad.SetShape( pad->GetDrillShape() == PAD_DRILL_SHAPE_OBLONG ?
PAD_SHAPE_OVAL : PAD_SHAPE_CIRCLE );
dummypad.SetPosition( pad->GetPosition() );
pad = &dummypad;
}
// Note: netcode <=0 means not connected item
if( ( pad->GetNetCode() != GetNetCode() ) || ( pad->GetNetCode() <= 0 ) )
{
item_clearance = pad->GetClearance() + outline_half_thickness;
item_boundingbox = pad->GetBoundingBox();
item_boundingbox.Inflate( item_clearance );
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
int clearance = std::max( zone_clearance, item_clearance );
pad->TransformShapeWithClearanceToPolygon( aFeatures,
clearance,
segsPerCircle,
correctionFactor );
}
continue;
}
// Pads are removed from zone if the setup is PAD_ZONE_CONN_NONE
if( GetPadConnection( pad ) == PAD_ZONE_CONN_NONE )
{
int gap = zone_clearance;
int thermalGap = GetThermalReliefGap( pad );
gap = std::max( gap, thermalGap );
item_boundingbox = pad->GetBoundingBox();
item_boundingbox.Inflate( gap );
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
pad->TransformShapeWithClearanceToPolygon( aFeatures,
gap,
segsPerCircle,
correctionFactor );
}
}
}
}
/* Add holes (i.e. tracks and vias areas as polygons outlines)
* in cornerBufferPolysToSubstract
*/
for( TRACK* track = aPcb->m_Track; track; track = track->Next() )
{
if( !track->IsOnLayer( GetLayer() ) )
continue;
if( track->GetNetCode() == GetNetCode() && (GetNetCode() != 0) )
continue;
item_clearance = track->GetClearance() + outline_half_thickness;
item_boundingbox = track->GetBoundingBox();
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
int clearance = std::max( zone_clearance, item_clearance );
track->TransformShapeWithClearanceToPolygon( aFeatures,
clearance,
segsPerCircle,
correctionFactor );
}
}
/* Add module edge items that are on copper layers
* Pcbnew allows these items to be on copper layers in microwave applictions
* This is a bad thing, but must be handled here, until a better way is found
*/
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
for( BOARD_ITEM* item = module->GraphicalItems(); item; item = item->Next() )
{
if( !item->IsOnLayer( GetLayer() ) && !item->IsOnLayer( Edge_Cuts ) )
continue;
if( item->Type() != PCB_MODULE_EDGE_T )
continue;
item_boundingbox = item->GetBoundingBox();
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
( (EDGE_MODULE*) item )->TransformShapeWithClearanceToPolygon(
aFeatures, zone_clearance,
segsPerCircle, correctionFactor );
}
}
}
// Add graphic items (copper texts) and board edges
for( BOARD_ITEM* item = aPcb->m_Drawings; item; item = item->Next() )
{
if( item->GetLayer() != GetLayer() && item->GetLayer() != Edge_Cuts )
continue;
switch( item->Type() )
{
case PCB_LINE_T:
( (DRAWSEGMENT*) item )->TransformShapeWithClearanceToPolygon(
aFeatures,
zone_clearance, segsPerCircle, correctionFactor );
break;
case PCB_TEXT_T:
( (TEXTE_PCB*) item )->TransformBoundingBoxWithClearanceToPolygon(
aFeatures, zone_clearance );
break;
default:
break;
}
}
// Add zones outlines having an higher priority and keepout
for( int ii = 0; ii < GetBoard()->GetAreaCount(); ii++ )
{
ZONE_CONTAINER* zone = GetBoard()->GetArea( ii );
if( zone->GetLayer() != GetLayer() )
continue;
if( !zone->GetIsKeepout() && zone->GetPriority() <= GetPriority() )
continue;
if( zone->GetIsKeepout() && ! zone->GetDoNotAllowCopperPour() )
continue;
// A highter priority zone or keepout area is found: remove this area
item_boundingbox = zone->GetBoundingBox();
if( !item_boundingbox.Intersects( zone_boundingbox ) )
continue;
// Add the zone outline area.
// However if the zone has the same net as the current zone,
// do not add any clearance.
// the zone will be connected to the current zone, but filled areas
// will use different parameters (clearance, thermal shapes )
bool same_net = GetNetCode() == zone->GetNetCode();
bool use_net_clearance = true;
int min_clearance = zone_clearance;
// Do not forget to make room to draw the thick outlines
// of the hole created by the area of the zone to remove
int holeclearance = zone->GetClearance() + outline_half_thickness;
// The final clearance is obviously the max value of each zone clearance
min_clearance = std::max( min_clearance, holeclearance );
if( zone->GetIsKeepout() || same_net )
{
// Just take in account the fact the outline has a thickness, so
// the actual area to substract is inflated to take in account this fact
min_clearance = outline_half_thickness;
use_net_clearance = false;
}
zone->TransformOutlinesShapeWithClearanceToPolygon(
aFeatures,
min_clearance, use_net_clearance );
}
// Remove thermal symbols
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
{
for( D_PAD* pad = module->Pads(); pad != NULL; pad = pad->Next() )
{
// Rejects non-standard pads with tht-only thermal reliefs
if( GetPadConnection( pad ) == PAD_ZONE_CONN_THT_THERMAL
&& pad->GetAttribute() != PAD_ATTRIB_STANDARD )
continue;
if( GetPadConnection( pad ) != PAD_ZONE_CONN_THERMAL
&& GetPadConnection( pad ) != PAD_ZONE_CONN_THT_THERMAL )
continue;
if( !pad->IsOnLayer( GetLayer() ) )
continue;
if( pad->GetNetCode() != GetNetCode() )
continue;
item_boundingbox = pad->GetBoundingBox();
int thermalGap = GetThermalReliefGap( pad );
item_boundingbox.Inflate( thermalGap, thermalGap );
if( item_boundingbox.Intersects( zone_boundingbox ) )
{
CreateThermalReliefPadPolygon( aFeatures,
*pad, thermalGap,
GetThermalReliefCopperBridge( pad ),
m_ZoneMinThickness,
segsPerCircle,
correctionFactor, s_thermalRot );
}
}
}
}
void ZONE_CONTAINER::AddClearanceAreasPolygonsToPolysList_NG( BOARD* aPcb )
{
int segsPerCircle;
double correctionFactor;
int outline_half_thickness = m_ZoneMinThickness / 2;
std::unique_ptr<SHAPE_FILE_IO> dumper( new SHAPE_FILE_IO(
g_DumpZonesWhenFilling ? "zones_dump.txt" : "", SHAPE_FILE_IO::IOM_APPEND ) );
// Set the number of segments in arc approximations
if( m_ArcToSegmentsCount == ARC_APPROX_SEGMENTS_COUNT_HIGHT_DEF )
segsPerCircle = ARC_APPROX_SEGMENTS_COUNT_HIGHT_DEF;
else
segsPerCircle = ARC_APPROX_SEGMENTS_COUNT_LOW_DEF;
/* calculates the coeff to compensate radius reduction of holes clearance
* due to the segment approx.
* For a circle the min radius is radius * cos( 2PI / s_CircleToSegmentsCount / 2)
* s_Correction is 1 /cos( PI/s_CircleToSegmentsCount )
*/
correctionFactor = 1.0 / cos( M_PI / (double) segsPerCircle );
CPOLYGONS_LIST tmp;
if(g_DumpZonesWhenFilling)
dumper->BeginGroup("clipper-zone");
SHAPE_POLY_SET solidAreas = ConvertPolyListToPolySet( m_smoothedPoly->m_CornersList );
solidAreas.Inflate( -outline_half_thickness, segsPerCircle );
solidAreas.Simplify( POLY_CALC_MODE );
SHAPE_POLY_SET holes;
if(g_DumpZonesWhenFilling)
dumper->Write( &solidAreas, "solid-areas" );
tmp.RemoveAllContours();
buildFeatureHoleList( aPcb, holes );
if(g_DumpZonesWhenFilling)
dumper->Write( &holes, "feature-holes" );
holes.Simplify( POLY_CALC_MODE );
if (g_DumpZonesWhenFilling)
dumper->Write( &holes, "feature-holes-postsimplify" );
solidAreas.BooleanSubtract( holes, POLY_CALC_MODE );
if (g_DumpZonesWhenFilling)
dumper->Write( &solidAreas, "solid-areas-minus-holes" );
SHAPE_POLY_SET areas_fractured = solidAreas;
areas_fractured.Fracture( POLY_CALC_MODE );
if (g_DumpZonesWhenFilling)
dumper->Write( &areas_fractured, "areas_fractured" );
m_FilledPolysList = areas_fractured;
// Remove insulated islands:
if( GetNetCode() > 0 )
TestForCopperIslandAndRemoveInsulatedIslands( aPcb );
SHAPE_POLY_SET thermalHoles;
// Test thermal stubs connections and add polygons to remove unconnected stubs.
// (this is a refinement for thermal relief shapes)
if( GetNetCode() > 0 )
BuildUnconnectedThermalStubsPolygonList( thermalHoles, aPcb, this,
correctionFactor, s_thermalRot );
// remove copper areas corresponding to not connected stubs
if( !thermalHoles.IsEmpty() )
{
thermalHoles.Simplify( POLY_CALC_MODE );
// Remove unconnected stubs
solidAreas.BooleanSubtract( thermalHoles, POLY_CALC_MODE );
if( g_DumpZonesWhenFilling )
dumper->Write( &thermalHoles, "thermal-holes" );
// put these areas in m_FilledPolysList
SHAPE_POLY_SET th_fractured = solidAreas;
th_fractured.Fracture( POLY_CALC_MODE );
if( g_DumpZonesWhenFilling )
dumper->Write ( &th_fractured, "th_fractured" );
m_FilledPolysList = th_fractured;
if( GetNetCode() > 0 )
TestForCopperIslandAndRemoveInsulatedIslands( aPcb );
}
if(g_DumpZonesWhenFilling)
dumper->EndGroup();
}
void PCB_PAD::Parse( XNODE* aNode, wxString aDefaultMeasurementUnit,
wxString aActualConversion )
{
XNODE* lNode, *cNode;
long num;
wxString propValue, str, emsg;
PCB_PAD_SHAPE* padShape;
m_rotation = 0;
lNode = FindNode( aNode, wxT( "padNum" ) );
if( lNode )
{
lNode->GetNodeContent().ToLong( &num );
m_number = (int) num;
}
lNode = FindNode( aNode, wxT( "padStyleRef" ) );
if( lNode )
{
lNode->GetAttribute( wxT( "Name" ), &propValue );
propValue.Trim( false );
m_name.text = propValue;
}
lNode = FindNode( aNode, wxT( "pt" ) );
if( lNode )
SetPosition( lNode->GetNodeContent(), aDefaultMeasurementUnit,
&m_positionX, &m_positionY, aActualConversion );
lNode = FindNode( aNode, wxT( "rotation" ) );
if( lNode )
{
str = lNode->GetNodeContent();
str.Trim( false );
m_rotation = StrToInt1Units( str );
}
lNode = FindNode( aNode, wxT( "netNameRef" ) );
if( lNode )
{
lNode->GetAttribute( wxT( "Name" ), &propValue );
propValue.Trim( false );
propValue.Trim( true );
m_net = propValue;
m_netCode = GetNetCode( m_net );
}
lNode = FindNode( aNode, wxT( "defaultPinDes" ) );
if( lNode )
{
lNode->GetAttribute( wxT( "Name" ), &propValue );
//propValue.Trim( false );
m_defaultPinDes = propValue;
}
lNode = aNode;
while( lNode && lNode->GetName() != wxT( "www.lura.sk" ) )
lNode = lNode->GetParent();
lNode = FindNode( lNode, wxT( "library" ) );
if ( !lNode )
THROW_IO_ERROR( wxT( "Unable to find library section" ) );
lNode = FindNode( lNode, wxT( "padStyleDef" ) );
while( lNode )
{
lNode->GetAttribute( wxT( "Name" ), &propValue );
if( propValue.IsSameAs( m_name.text, false) )
break;
lNode = lNode->GetNext();
}
if ( !lNode )
THROW_IO_ERROR( wxString::Format( wxT( "Unable to find padStyleDef " ) + m_name.text ) );
cNode = FindNode( lNode, wxT( "holeDiam" ) );
if( cNode )
SetWidth( cNode->GetNodeContent(), aDefaultMeasurementUnit, &m_hole, aActualConversion );
if( FindNodeGetContent( lNode, wxT( "isHolePlated" ) ) == wxT( "False" ) )
m_isHolePlated = false;
cNode = FindNode( lNode, wxT( "padShape" ) );
while( cNode )
{
if( cNode->GetName() == wxT( "padShape" ) )
{
// we support only Pads on specific layers......
// we do not support pads on "Plane", "NonSignal" , "Signal" ... layerr
if( FindNode( cNode, wxT( "layerNumRef" ) ) )
{
padShape = new PCB_PAD_SHAPE( m_callbacks, m_board );
padShape->Parse( cNode, aDefaultMeasurementUnit, aActualConversion );
m_shapes.Add( padShape );
}
}
cNode = cNode->GetNext();
}
}
void VIA::Draw( EDA_DRAW_PANEL* panel, wxDC* aDC, GR_DRAWMODE aDrawMode,
const wxPoint& aOffset )
{
int radius;
LAYER_NUM curr_layer = ( (PCB_SCREEN*) panel->GetScreen() )->m_Active_Layer;
int fillvia = 0;
PCB_BASE_FRAME* frame = (PCB_BASE_FRAME*) panel->GetParent();
PCB_SCREEN* screen = frame->GetScreen();
if( frame->m_DisplayViaFill == FILLED )
fillvia = 1;
GRSetDrawMode( aDC, aDrawMode );
BOARD * brd = GetBoard( );
EDA_COLOR_T color = brd->GetVisibleElementColor(VIAS_VISIBLE + GetViaType());
if( brd->IsElementVisible( PCB_VISIBLE(VIAS_VISIBLE + GetViaType()) ) == false
&& ( color & HIGHLIGHT_FLAG ) != HIGHLIGHT_FLAG )
return;
if( DisplayOpt.ContrastModeDisplay )
{
if( !IsOnLayer( curr_layer ) )
ColorTurnToDarkDarkGray( &color );
}
if( aDrawMode & GR_HIGHLIGHT )
ColorChangeHighlightFlag( &color, !(aDrawMode & GR_AND) );
ColorApplyHighlightFlag( &color );
SetAlpha( &color, 150 );
radius = m_Width >> 1;
// for small via size on screen (radius < 4 pixels) draw a simplified shape
int radius_in_pixels = aDC->LogicalToDeviceXRel( radius );
bool fast_draw = false;
// Vias are drawn as a filled circle or a double circle. The hole will be drawn later
int drill_radius = GetDrillValue() / 2;
int inner_radius = radius - aDC->DeviceToLogicalXRel( 2 );
if( radius_in_pixels < MIN_VIA_DRAW_SIZE )
{
fast_draw = true;
fillvia = false;
}
if( fillvia )
{
GRFilledCircle( panel->GetClipBox(), aDC, m_Start + aOffset, radius, color );
}
else
{
GRCircle( panel->GetClipBox(), aDC, m_Start + aOffset, radius, 0, color );
if ( fast_draw )
return;
GRCircle( panel->GetClipBox(), aDC, m_Start + aOffset, inner_radius, 0, color );
}
// Draw the via hole if the display option allows it
if( DisplayOpt.m_DisplayViaMode != VIA_HOLE_NOT_SHOW )
{
// Display all drill holes requested or Display non default holes requested
if( (DisplayOpt.m_DisplayViaMode == ALL_VIA_HOLE_SHOW)
|| ( (drill_radius > 0 ) && !IsDrillDefault() ) )
{
if( fillvia )
{
bool blackpenstate = false;
if( screen->m_IsPrinting )
{
blackpenstate = GetGRForceBlackPenState();
GRForceBlackPen( false );
color = WHITE;
}
else
{
color = BLACK; // or DARKGRAY;
}
if( (aDrawMode & GR_XOR) == 0)
GRSetDrawMode( aDC, GR_COPY );
if( aDC->LogicalToDeviceXRel( drill_radius ) > MIN_DRAW_WIDTH ) // Draw hole if large enough.
GRFilledCircle( panel->GetClipBox(), aDC, m_Start.x + aOffset.x,
m_Start.y + aOffset.y, drill_radius, 0, color, color );
if( screen->m_IsPrinting )
GRForceBlackPen( blackpenstate );
}
else
{
if( drill_radius < inner_radius ) // We can show the via hole
GRCircle( panel->GetClipBox(), aDC, m_Start + aOffset, drill_radius, 0, color );
}
}
}
if( ShowClearance( this ) )
{
GRCircle( panel->GetClipBox(), aDC, m_Start + aOffset, radius + GetClearance(), 0, color );
}
// for Micro Vias, draw a partial cross : X on component layer, or + on copper layer
// (so we can see 2 superimposed microvias ):
if( GetViaType() == VIA_MICROVIA )
{
int ax, ay, bx, by;
if( IsOnLayer( LAYER_N_BACK ) )
{
ax = radius; ay = 0;
bx = drill_radius; by = 0;
}
else
{
ax = ay = (radius * 707) / 1000;
bx = by = (drill_radius * 707) / 1000;
}
/* lines | or \ */
GRLine( panel->GetClipBox(), aDC, m_Start.x + aOffset.x - ax,
m_Start.y + aOffset.y - ay,
m_Start.x + aOffset.x - bx,
m_Start.y + aOffset.y - by, 0, color );
GRLine( panel->GetClipBox(), aDC, m_Start.x + aOffset.x + bx,
m_Start.y + aOffset.y + by,
m_Start.x + aOffset.x + ax,
m_Start.y + aOffset.y + ay, 0, color );
// lines - or /
GRLine( panel->GetClipBox(), aDC, m_Start.x + aOffset.x + ay,
m_Start.y + aOffset.y - ax,
m_Start.x + aOffset.x + by,
m_Start.y + aOffset.y - bx, 0, color );
GRLine( panel->GetClipBox(), aDC, m_Start.x + aOffset.x - by,
m_Start.y + aOffset.y + bx,
m_Start.x + aOffset.x - ay,
m_Start.y + aOffset.y + ax, 0, color );
}
// for Buried Vias, draw a partial line : orient depending on layer pair
// (so we can see superimposed buried vias ):
if( GetViaType() == VIA_BLIND_BURIED )
{
int ax = 0, ay = radius, bx = 0, by = drill_radius;
LAYER_NUM layer_top, layer_bottom;
( (VIA*) this )->LayerPair( &layer_top, &layer_bottom );
// lines for the top layer
RotatePoint( &ax, &ay, layer_top * 3600.0 / brd->GetCopperLayerCount( ) );
RotatePoint( &bx, &by, layer_top * 3600.0 / brd->GetCopperLayerCount( ) );
GRLine( panel->GetClipBox(), aDC, m_Start.x + aOffset.x - ax,
m_Start.y + aOffset.y - ay,
m_Start.x + aOffset.x - bx,
m_Start.y + aOffset.y - by, 0, color );
// lines for the bottom layer
ax = 0; ay = radius; bx = 0; by = drill_radius;
RotatePoint( &ax, &ay, layer_bottom * 3600.0 / brd->GetCopperLayerCount( ) );
RotatePoint( &bx, &by, layer_bottom * 3600.0 / brd->GetCopperLayerCount( ) );
GRLine( panel->GetClipBox(), aDC, m_Start.x + aOffset.x - ax,
m_Start.y + aOffset.y - ay,
m_Start.x + aOffset.x - bx,
m_Start.y + aOffset.y - by, 0, color );
}
// Display the short netname:
if( GetNetCode() == NETINFO_LIST::UNCONNECTED )
return;
if( DisplayOpt.DisplayNetNamesMode == 0 || DisplayOpt.DisplayNetNamesMode == 1 )
return;
NETINFO_ITEM* net = GetNet();
if( net == NULL )
return;
int len = net->GetShortNetname().Len();
if( len > 0 )
{
// calculate a good size for the text
int tsize = m_Width / len;
if( aDC->LogicalToDeviceXRel( tsize ) >= MIN_TEXT_SIZE )
{
tsize = (tsize * 7) / 10; // small reduction to give a better look, inside via
if( (aDrawMode & GR_XOR) == 0 )
GRSetDrawMode( aDC, GR_COPY );
EDA_RECT* clipbox = panel? panel->GetClipBox() : NULL;
DrawGraphicHaloText( clipbox, aDC, m_Start,
color, WHITE, BLACK, net->GetShortNetname(), 0,
wxSize( tsize, tsize ),
GR_TEXT_HJUSTIFY_CENTER, GR_TEXT_VJUSTIFY_CENTER,
tsize / 7, false, false );
}
}
}
void TRACK::DrawShortNetname( EDA_DRAW_PANEL* panel,
wxDC* aDC, GR_DRAWMODE aDrawMode, EDA_COLOR_T aBgColor )
{
/* we must filter tracks, to avoid a lot of texts.
* - only tracks with a length > 10 * thickness are eligible
* and, of course, if we are not printing the board
*/
if( DisplayOpt.DisplayNetNamesMode == 0 || DisplayOpt.DisplayNetNamesMode == 1 )
return;
#define THRESHOLD 10
int len = KiROUND( GetLineLength( m_Start, m_End ) );
if( len < THRESHOLD * m_Width )
return;
// no room to display a text inside track
if( aDC->LogicalToDeviceXRel( m_Width ) < MIN_TEXT_SIZE )
return;
if( GetNetCode() == NETINFO_LIST::UNCONNECTED )
return;
NETINFO_ITEM* net = GetNet();
if( net == NULL )
return;
int textlen = net->GetShortNetname().Len();
if( textlen > 0 )
{
// calculate a good size for the text
int tsize = std::min( m_Width, len / textlen );
int dx = m_End.x - m_Start.x ;
int dy = m_End.y - m_Start.y ;
wxPoint tpos = m_Start + m_End;
tpos.x /= 2;
tpos.y /= 2;
// Calculate angle: if the track segment is vertical, angle = 90 degrees
// If horizontal 0 degrees, otherwise compute it
double angle; // angle is in 0.1 degree
if( dy == 0 ) // Horizontal segment
{
angle = 0;
}
else
{
if( dx == 0 ) // Vertical segment
{
angle = 900;
}
else
{
/* atan2 is *not* the solution here, since it can give upside
down text. We want to work only in the first and fourth quadrant */
angle = RAD2DECIDEG( -atan( double( dy ) / double( dx ) ) );
}
}
LAYER_NUM curr_layer = ( (PCB_SCREEN*) panel->GetScreen() )->m_Active_Layer;
if( ( aDC->LogicalToDeviceXRel( tsize ) >= MIN_TEXT_SIZE )
&& ( !(!IsOnLayer( curr_layer )&& DisplayOpt.ContrastModeDisplay) ) )
{
if( (aDrawMode & GR_XOR) == 0 )
GRSetDrawMode( aDC, GR_COPY );
tsize = (tsize * 7) / 10; // small reduction to give a better look
EDA_RECT* clipbox = panel? panel->GetClipBox() : NULL;
DrawGraphicHaloText( clipbox, aDC, tpos,
aBgColor, BLACK, WHITE, net->GetShortNetname(), angle,
wxSize( tsize, tsize ),
GR_TEXT_HJUSTIFY_CENTER, GR_TEXT_VJUSTIFY_CENTER,
tsize / 7,
false, false );
}
}
}
void D_PAD::DrawShape( EDA_RECT* aClipBox, wxDC* aDC, PAD_DRAWINFO& aDrawInfo )
{
wxPoint coord[4];
double angle = m_Orient;
int seg_width;
GRSetDrawMode( aDC, aDrawInfo.m_DrawMode );
// calculate pad shape position :
wxPoint shape_pos = ShapePos() - aDrawInfo.m_Offset;
wxSize halfsize = m_Size;
halfsize.x >>= 1;
halfsize.y >>= 1;
switch( GetShape() )
{
case PAD_CIRCLE:
if( aDrawInfo.m_ShowPadFilled )
GRFilledCircle( aClipBox, aDC, shape_pos.x, shape_pos.y,
halfsize.x + aDrawInfo.m_Mask_margin.x, 0,
aDrawInfo.m_Color, aDrawInfo.m_Color );
else
GRCircle( aClipBox, aDC, shape_pos.x, shape_pos.y,
halfsize.x + aDrawInfo.m_Mask_margin.x,
m_PadSketchModePenSize, aDrawInfo.m_Color );
if( aDrawInfo.m_PadClearance )
{
GRCircle( aClipBox,
aDC, shape_pos.x, shape_pos.y,
halfsize.x + aDrawInfo.m_PadClearance,
0, aDrawInfo.m_Color );
}
break;
case PAD_OVAL:
{
wxPoint segStart, segEnd;
seg_width = BuildSegmentFromOvalShape(segStart, segEnd, angle,
aDrawInfo.m_Mask_margin);
segStart += shape_pos;
segEnd += shape_pos;
if( aDrawInfo.m_ShowPadFilled )
{
GRFillCSegm( aClipBox, aDC, segStart.x, segStart.y, segEnd.x, segEnd.y,
seg_width, aDrawInfo.m_Color );
}
else
{
GRCSegm( aClipBox, aDC, segStart.x, segStart.y, segEnd.x, segEnd.y,
seg_width, m_PadSketchModePenSize, aDrawInfo.m_Color );
}
// Draw the clearance line
if( aDrawInfo.m_PadClearance )
{
seg_width += 2 * aDrawInfo.m_PadClearance;
GRCSegm( aClipBox, aDC, segStart.x, segStart.y, segEnd.x, segEnd.y,
seg_width, aDrawInfo.m_Color );
}
}
break;
case PAD_RECT:
case PAD_TRAPEZOID:
BuildPadPolygon( coord, aDrawInfo.m_Mask_margin, angle );
for( int ii = 0; ii < 4; ii++ )
coord[ii] += shape_pos;
GRClosedPoly( aClipBox, aDC, 4, coord, aDrawInfo.m_ShowPadFilled,
aDrawInfo.m_ShowPadFilled ? 0 : m_PadSketchModePenSize,
aDrawInfo.m_Color, aDrawInfo.m_Color );
if( aDrawInfo.m_PadClearance )
{
BuildPadPolygon( coord, wxSize( aDrawInfo.m_PadClearance,
aDrawInfo.m_PadClearance ), angle );
for( int ii = 0; ii < 4; ii++ )
coord[ii] += shape_pos;
GRClosedPoly( aClipBox, aDC, 4, coord, 0, aDrawInfo.m_Color, aDrawInfo.m_Color );
}
break;
default:
break;
}
// Draw the pad hole
wxPoint holepos = m_Pos - aDrawInfo.m_Offset;
int hole = m_Drill.x >> 1;
bool drawhole = hole > 0;
if( !aDrawInfo.m_ShowPadFilled && !aDrawInfo.m_ShowNotPlatedHole )
drawhole = false;
if( drawhole )
{
bool blackpenstate = false;
if( aDrawInfo.m_IsPrinting )
{
blackpenstate = GetGRForceBlackPenState();
GRForceBlackPen( false );
aDrawInfo.m_HoleColor = WHITE;
}
if( aDrawInfo.m_DrawMode != GR_XOR )
GRSetDrawMode( aDC, GR_COPY );
else
GRSetDrawMode( aDC, GR_XOR );
EDA_COLOR_T hole_color = aDrawInfo.m_HoleColor;
if( aDrawInfo. m_ShowNotPlatedHole ) // Draw a specific hole color
hole_color = aDrawInfo.m_NPHoleColor;
switch( GetDrillShape() )
{
case PAD_DRILL_CIRCLE:
if( aDC->LogicalToDeviceXRel( hole ) > MIN_DRAW_WIDTH )
GRFilledCircle( aClipBox, aDC, holepos.x, holepos.y, hole, 0,
hole_color, hole_color );
break;
case PAD_DRILL_OBLONG:
{
wxPoint drl_start, drl_end;
GetOblongDrillGeometry( drl_start, drl_end, seg_width );
GRFilledSegment( aClipBox, aDC, holepos + drl_start,
holepos + drl_end, seg_width, hole_color );
}
break;
default:
break;
}
if( aDrawInfo.m_IsPrinting )
GRForceBlackPen( blackpenstate );
}
GRSetDrawMode( aDC, aDrawInfo.m_DrawMode );
// Draw "No connect" ( / or \ or cross X ) if necessary
if( GetNetCode() == 0 && aDrawInfo.m_ShowNCMark )
{
int dx0 = std::min( halfsize.x, halfsize.y );
EDA_COLOR_T nc_color = BLUE;
if( m_layerMask[F_Cu] ) /* Draw \ */
GRLine( aClipBox, aDC, holepos.x - dx0, holepos.y - dx0,
holepos.x + dx0, holepos.y + dx0, 0, nc_color );
if( m_layerMask[B_Cu] ) // Draw /
GRLine( aClipBox, aDC, holepos.x + dx0, holepos.y - dx0,
holepos.x - dx0, holepos.y + dx0, 0, nc_color );
}
if( aDrawInfo.m_DrawMode != GR_XOR )
GRSetDrawMode( aDC, GR_COPY );
else
GRSetDrawMode( aDC, GR_XOR );
// Draw the pad number
if( !aDrawInfo.m_Display_padnum && !aDrawInfo.m_Display_netname )
return;
wxPoint tpos0 = shape_pos; // Position of the centre of text
wxPoint tpos = tpos0;
wxSize AreaSize; // size of text area, normalized to AreaSize.y < AreaSize.x
int shortname_len = 0;
if( aDrawInfo.m_Display_netname )
shortname_len = GetShortNetname().Len();
if( GetShape() == PAD_CIRCLE )
angle = 0;
AreaSize = m_Size;
if( m_Size.y > m_Size.x )
{
angle += 900;
AreaSize.x = m_Size.y;
AreaSize.y = m_Size.x;
}
if( shortname_len > 0 ) // if there is a netname, provides room to display this netname
{
AreaSize.y /= 2; // Text used only the upper area of the
// pad. The lower area displays the net name
tpos.y -= AreaSize.y / 2;
}
// Calculate the position of text, that is the middle point of the upper
// area of the pad
RotatePoint( &tpos, shape_pos, angle );
// Draw text with an angle between -90 deg and + 90 deg
double t_angle = angle;
NORMALIZE_ANGLE_90( t_angle );
/* Note: in next calculations, texte size is calculated for 3 or more
* chars. Of course, pads numbers and nets names can have less than 3
* chars. but after some tries, i found this is gives the best look
*/
#define MIN_CHAR_COUNT 3
wxString buffer;
int tsize;
EDA_RECT* clipBox = aDrawInfo.m_DrawPanel?
aDrawInfo.m_DrawPanel->GetClipBox() : NULL;
if( aDrawInfo.m_Display_padnum )
{
StringPadName( buffer );
int numpad_len = buffer.Len();
numpad_len = std::max( numpad_len, MIN_CHAR_COUNT );
tsize = std::min( AreaSize.y, AreaSize.x / numpad_len );
if( aDC->LogicalToDeviceXRel( tsize ) >= MIN_TEXT_SIZE ) // Not drawable when size too small.
{
// tsize reserve room for marges and segments thickness
tsize = ( tsize * 7 ) / 10;
DrawGraphicHaloText( clipBox, aDC, tpos,
aDrawInfo.m_Color, BLACK, WHITE,
buffer, t_angle,
wxSize( tsize , tsize ), GR_TEXT_HJUSTIFY_CENTER,
GR_TEXT_VJUSTIFY_CENTER, tsize / 7, false, false );
}
}
// display the short netname, if exists
if( shortname_len == 0 )
return;
shortname_len = std::max( shortname_len, MIN_CHAR_COUNT );
tsize = std::min( AreaSize.y, AreaSize.x / shortname_len );
if( aDC->LogicalToDeviceXRel( tsize ) >= MIN_TEXT_SIZE ) // Not drawable in size too small.
{
tpos = tpos0;
if( aDrawInfo.m_Display_padnum )
tpos.y += AreaSize.y / 2;
RotatePoint( &tpos, shape_pos, angle );
// tsize reserve room for marges and segments thickness
tsize = ( tsize * 7 ) / 10;
DrawGraphicHaloText( clipBox, aDC, tpos,
aDrawInfo.m_Color, BLACK, WHITE,
GetShortNetname(), t_angle,
wxSize( tsize, tsize ), GR_TEXT_HJUSTIFY_CENTER,
GR_TEXT_VJUSTIFY_CENTER, tsize / 7, false, false );
}
}
void VIA::Draw( EDA_DRAW_PANEL* panel, wxDC* aDC, GR_DRAWMODE aDrawMode, const wxPoint& aOffset )
{
wxCHECK_RET( panel != NULL, wxT( "VIA::Draw panel cannot be NULL." ) );
int radius;
PCB_LAYER_ID curr_layer = ( (PCB_SCREEN*) panel->GetScreen() )->m_Active_Layer;
int fillvia = 0;
PCB_BASE_FRAME* frame = (PCB_BASE_FRAME*) panel->GetParent();
PCB_SCREEN* screen = frame->GetScreen();
auto displ_opts = (PCB_DISPLAY_OPTIONS*)( frame->GetDisplayOptions() );
if( displ_opts->m_DisplayViaFill == FILLED )
fillvia = 1;
GRSetDrawMode( aDC, aDrawMode );
BOARD * brd = GetBoard();
COLOR4D color = frame->Settings().Colors().GetItemColor( LAYER_VIAS + GetViaType() );
if( brd->IsElementVisible( LAYER_VIAS + GetViaType() ) == false
&& !( aDrawMode & GR_HIGHLIGHT ) )
return;
// Only draw the via if at least one of the layers it crosses is being displayed
if( !( brd->GetVisibleLayers() & GetLayerSet() ).any() )
return;
if( displ_opts->m_ContrastModeDisplay )
{
if( !IsOnLayer( curr_layer ) )
color = COLOR4D( DARKDARKGRAY );
}
if( ( aDrawMode & GR_HIGHLIGHT ) && !( aDrawMode & GR_AND ) )
color.SetToLegacyHighlightColor();
color.a = 0.588;
radius = m_Width >> 1;
// for small via size on screen (radius < 4 pixels) draw a simplified shape
int radius_in_pixels = aDC->LogicalToDeviceXRel( radius );
bool fast_draw = false;
// Vias are drawn as a filled circle or a double circle. The hole will be drawn later
int drill_radius = GetDrillValue() / 2;
int inner_radius = radius - aDC->DeviceToLogicalXRel( 2 );
if( radius_in_pixels < MIN_VIA_DRAW_SIZE )
{
fast_draw = true;
fillvia = false;
}
if( fillvia )
{
GRFilledCircle( panel->GetClipBox(), aDC, m_Start + aOffset, radius, color );
}
else
{
GRCircle( panel->GetClipBox(), aDC, m_Start + aOffset, radius, 0, color );
if ( fast_draw )
return;
GRCircle( panel->GetClipBox(), aDC, m_Start + aOffset, inner_radius, 0, color );
}
if( fillvia )
{
bool blackpenstate = false;
if( screen->m_IsPrinting )
{
blackpenstate = GetGRForceBlackPenState();
GRForceBlackPen( false );
color = WHITE;
}
else
{
color = BLACK; // or DARKGRAY;
}
if( (aDrawMode & GR_XOR) == 0)
GRSetDrawMode( aDC, GR_COPY );
// Draw hole if the radius is > 1pixel.
if( aDC->LogicalToDeviceXRel( drill_radius ) > 1 )
GRFilledCircle( panel->GetClipBox(), aDC, m_Start.x + aOffset.x,
m_Start.y + aOffset.y, drill_radius, 0, color, color );
if( screen->m_IsPrinting )
GRForceBlackPen( blackpenstate );
}
else
{
if( drill_radius < inner_radius ) // We can show the via hole
GRCircle( panel->GetClipBox(), aDC, m_Start + aOffset, drill_radius, 0, color );
}
if( ShowClearance( displ_opts, this ) )
{
GRCircle( panel->GetClipBox(), aDC, m_Start + aOffset, radius + GetClearance(), 0, color );
}
// for Micro Vias, draw a partial cross : X on component layer, or + on copper layer
// (so we can see 2 superimposed microvias ):
if( GetViaType() == VIA_MICROVIA )
{
int ax, ay, bx, by;
if( IsOnLayer( B_Cu ) )
{
ax = radius; ay = 0;
bx = drill_radius; by = 0;
}
else
{
ax = ay = (radius * 707) / 1000;
bx = by = (drill_radius * 707) / 1000;
}
// lines '|' or '\'
GRLine( panel->GetClipBox(), aDC, m_Start.x + aOffset.x - ax,
m_Start.y + aOffset.y - ay,
m_Start.x + aOffset.x - bx,
m_Start.y + aOffset.y - by, 0, color );
GRLine( panel->GetClipBox(), aDC, m_Start.x + aOffset.x + bx,
m_Start.y + aOffset.y + by,
m_Start.x + aOffset.x + ax,
m_Start.y + aOffset.y + ay, 0, color );
// lines - or '/'
GRLine( panel->GetClipBox(), aDC, m_Start.x + aOffset.x + ay,
m_Start.y + aOffset.y - ax,
m_Start.x + aOffset.x + by,
m_Start.y + aOffset.y - bx, 0, color );
GRLine( panel->GetClipBox(), aDC, m_Start.x + aOffset.x - by,
m_Start.y + aOffset.y + bx,
m_Start.x + aOffset.x - ay,
m_Start.y + aOffset.y + ax, 0, color );
}
// for Buried Vias, draw a partial line : orient depending on layer pair
// (so we can see superimposed buried vias ):
if( GetViaType() == VIA_BLIND_BURIED )
{
int ax = 0, ay = radius, bx = 0, by = drill_radius;
PCB_LAYER_ID layer_top, layer_bottom;
LayerPair( &layer_top, &layer_bottom );
// lines for the top layer
RotatePoint( &ax, &ay, layer_top * 3600.0 / brd->GetCopperLayerCount( ) );
RotatePoint( &bx, &by, layer_top * 3600.0 / brd->GetCopperLayerCount( ) );
GRLine( panel->GetClipBox(), aDC, m_Start.x + aOffset.x - ax,
m_Start.y + aOffset.y - ay,
m_Start.x + aOffset.x - bx,
m_Start.y + aOffset.y - by, 0, color );
// lines for the bottom layer
ax = 0; ay = radius; bx = 0; by = drill_radius;
RotatePoint( &ax, &ay, layer_bottom * 3600.0 / brd->GetCopperLayerCount( ) );
RotatePoint( &bx, &by, layer_bottom * 3600.0 / brd->GetCopperLayerCount( ) );
GRLine( panel->GetClipBox(), aDC, m_Start.x + aOffset.x - ax,
m_Start.y + aOffset.y - ay,
m_Start.x + aOffset.x - bx,
m_Start.y + aOffset.y - by, 0, color );
}
// Display the short netname:
if( GetNetCode() == NETINFO_LIST::UNCONNECTED )
return;
if( displ_opts->m_DisplayNetNamesMode == 0 || displ_opts->m_DisplayNetNamesMode == 1 )
return;
NETINFO_ITEM* net = GetNet();
if( net == NULL )
return;
int len = net->GetShortNetname().Len();
if( len > 0 )
{
// calculate a good size for the text
int tsize = m_Width / len;
if( aDC->LogicalToDeviceXRel( tsize ) >= MIN_TEXT_SIZE )
{
tsize = (tsize * 7) / 10; // small reduction to give a better look, inside via
if( (aDrawMode & GR_XOR) == 0 )
GRSetDrawMode( aDC, GR_COPY );
EDA_RECT* clipbox = panel->GetClipBox();
DrawGraphicHaloText( clipbox, aDC, m_Start,
color, WHITE, BLACK, net->GetShortNetname(), 0,
wxSize( tsize, tsize ),
GR_TEXT_HJUSTIFY_CENTER, GR_TEXT_VJUSTIFY_CENTER,
tsize / 7, false, false );
}
}
}
void PCB_POLYGON::AssignNet( const wxString& aNetName )
{
m_net = aNetName;
m_netCode = GetNetCode( m_net );
}
TRACK* TRACK::GetTrack( TRACK* aStartTrace, TRACK* aEndTrace, ENDPOINT_T aEndPoint,
bool aSameNetOnly, bool aSequential )
{
const wxPoint &position = GetEndPoint( aEndPoint );
LAYER_MSK refLayers = GetLayerMask();
TRACK *previousSegment;
TRACK *nextSegment;
if( aSequential )
{
// Simple sequential search: from aStartTrace forward to aEndTrace
previousSegment = NULL;
nextSegment = aStartTrace;
}
else
{
/* Local bidirectional search: from this backward to aStartTrace
* AND forward to aEndTrace. The idea is that nearest segments
* are found (on average) faster in this way. In fact same-net
* segments are almost guaranteed to be found faster, in a global
* search, since they are grouped together in the track list */
previousSegment = this;
nextSegment = this;
}
while( nextSegment || previousSegment )
{
// Terminate the search in the direction if the netcode mismatches
if( aSameNetOnly )
{
if( nextSegment && (nextSegment->GetNetCode() != GetNetCode()) )
nextSegment = NULL;
if( previousSegment && (previousSegment->GetNetCode() != GetNetCode()) )
previousSegment = NULL;
}
if( nextSegment )
{
if ( (nextSegment != this) &&
!nextSegment->GetState( BUSY | IS_DELETED ) &&
(refLayers & nextSegment->GetLayerMask()) )
{
if( (position == nextSegment->m_Start) ||
(position == nextSegment->m_End) )
return nextSegment;
}
// Keep looking forward
if( nextSegment == aEndTrace )
nextSegment = NULL;
else
nextSegment = nextSegment->Next();
}
// Same as above, looking back. During sequential search this branch is inactive
if( previousSegment )
{
if ( (previousSegment != this) &&
!previousSegment->GetState( BUSY | IS_DELETED ) &&
(refLayers & previousSegment->GetLayerMask()) )
{
if( (position == previousSegment->m_Start) ||
(position == previousSegment->m_End) )
return previousSegment;
}
if( previousSegment == aStartTrace )
previousSegment = NULL;
else
previousSegment = previousSegment->Back();
}
}
return NULL;
}
