/**Function*************************************************************
Synopsis [Derives GIA manager using special pins to denote box boundaries.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Abc_NtkTestPinDeriveGia( Abc_Ntk_t * pNtk, int fWhiteBoxOnly, int fVerbose )
{
Gia_Man_t * pTemp;
Gia_Man_t * pGia = NULL;
Vec_Ptr_t * vNodes;
Abc_Obj_t * pObj, * pFanin;
int i, k, iPinLit = 0;
// prepare logic network
assert( Abc_NtkIsLogic(pNtk) );
Abc_NtkToAig( pNtk );
// construct GIA
Abc_NtkFillTemp( pNtk );
pGia = Gia_ManStart( Abc_NtkObjNumMax(pNtk) );
Gia_ManHashAlloc( pGia );
// create primary inputs
Abc_NtkForEachCi( pNtk, pObj, i )
pObj->iTemp = Gia_ManAppendCi(pGia);
// create internal nodes in a topologic order from white boxes
vNodes = Abc_NtkDfs( pNtk, 0 );
Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i )
{
// input side
if ( !fWhiteBoxOnly || Abc_NodeIsWhiteBox(pObj) )
{
// create special pintype for this node
iPinLit = Gia_ManAppendPinType( pGia, 1 );
// create input pins
Abc_ObjForEachFanin( pObj, pFanin, k )
pFanin->iTemp = Gia_ManAppendAnd( pGia, pFanin->iTemp, iPinLit );
}
// perform GIA construction
pObj->iTemp = Abc_NtkTestTimNodeStrash( pGia, pObj );
// output side
if ( !fWhiteBoxOnly || Abc_NodeIsWhiteBox(pObj) )
{
// create special pintype for this node
iPinLit = Gia_ManAppendPinType( pGia, 1 );
// create output pins
pObj->iTemp = Gia_ManAppendAnd( pGia, pObj->iTemp, iPinLit );
}
}
Vec_PtrFree( vNodes );
// create primary outputs
Abc_NtkForEachCo( pNtk, pObj, i )
pObj->iTemp = Gia_ManAppendCo( pGia, Abc_ObjFanin0(pObj)->iTemp );
// finalize GIA
Gia_ManHashStop( pGia );
Gia_ManSetRegNum( pGia, 0 );
// clean up GIA
pGia = Gia_ManCleanup( pTemp = pGia );
Gia_ManStop( pTemp );
return pGia;
}
/**Function*************************************************************
Synopsis [Duplicates AIG in the DFS order.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManFromAigSimple( Aig_Man_t * p )
{
Gia_Man_t * pNew;
Aig_Obj_t * pObj;
int i;
// create the new manager
pNew = Gia_ManStart( Aig_ManObjNum(p) );
pNew->pName = Gia_UtilStrsav( p->pName );
pNew->nConstrs = p->nConstrs;
// create the PIs
Aig_ManCleanData( p );
Aig_ManForEachObj( p, pObj, i )
{
if ( Aig_ObjIsAnd(pObj) )
pObj->iData = Gia_ManAppendAnd( pNew, Gia_ObjChild0Copy(pObj), Gia_ObjChild1Copy(pObj) );
else if ( Aig_ObjIsPi(pObj) )
pObj->iData = Gia_ManAppendCi( pNew );
else if ( Aig_ObjIsPo(pObj) )
pObj->iData = Gia_ManAppendCo( pNew, Gia_ObjChild0Copy(pObj) );
else if ( Aig_ObjIsConst1(pObj) )
pObj->iData = 1;
else
assert( 0 );
}
Gia_ManSetRegNum( pNew, Aig_ManRegNum(p) );
return pNew;
}
/**Function*************************************************************
Synopsis [Duplicates AIG according to the timing manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManDupUnnormalize( Gia_Man_t * p )
{
Vec_Int_t * vNodes;
Gia_Man_t * pNew;
Gia_Obj_t * pObj;
int i;
vNodes = Gia_ManOrderWithBoxes( p );
if ( vNodes == NULL )
return NULL;
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pSpec = Abc_UtilStrsav( p->pSpec );
if ( p->pSibls )
pNew->pSibls = ABC_CALLOC( int, Gia_ManObjNum(p) );
Gia_ManForEachObjVec( vNodes, p, pObj, i )
{
if ( Gia_ObjIsAnd(pObj) )
{
pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
if ( Gia_ObjSibl(p, Gia_ObjId(p, pObj)) )
pNew->pSibls[Abc_Lit2Var(pObj->Value)] = Abc_Lit2Var(Gia_ObjSiblObj(p, Gia_ObjId(p, pObj))->Value);
}
else if ( Gia_ObjIsCi(pObj) )
pObj->Value = Gia_ManAppendCi( pNew );
else if ( Gia_ObjIsCo(pObj) )
pObj->Value = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
else if ( Gia_ObjIsConst0(pObj) )
pObj->Value = 0;
else assert( 0 );
}
Gia_ManSetRegNum( pNew, Gia_ManRegNum(p) );
Vec_IntFree( vNodes );
return pNew;
}
/**Function*************************************************************
Synopsis [Reverses the above step.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Gia_ManDupFf2In_rec( Gia_Man_t * pNew, Gia_Obj_t * pObj )
{
if ( pObj->Value != ~0 )
return pObj->Value;
assert( Gia_ObjIsAnd(pObj) );
Gia_ManDupFf2In_rec( pNew, Gia_ObjFanin0(pObj) );
Gia_ManDupFf2In_rec( pNew, Gia_ObjFanin1(pObj) );
return pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
}
/**Function*************************************************************
Synopsis [Duplicates AIG in the DFS order while putting CIs first.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManDupNormalize( Gia_Man_t * p )
{
int fHashMapping = 0;
Gia_Man_t * pNew;
Gia_Obj_t * pObj;
int i;
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pSpec = Abc_UtilStrsav( p->pSpec );
Gia_ManConst0(p)->Value = 0;
if ( !Gia_ManIsSeqWithBoxes(p) )
{
Gia_ManForEachCi( p, pObj, i )
pObj->Value = Gia_ManAppendCi(pNew);
}
else
{
// current CI order: PIs + FOs + NewCIs
// desired reorder: PIs + NewCIs + FOs
int nCIs = Tim_ManPiNum( (Tim_Man_t *)p->pManTime );
int nAll = Tim_ManCiNum( (Tim_Man_t *)p->pManTime );
int nPis = nCIs - Gia_ManRegNum(p);
assert( nAll == Gia_ManCiNum(p) );
assert( nPis > 0 );
// copy PIs first
for ( i = 0; i < nPis; i++ )
Gia_ManCi(p, i)->Value = Gia_ManAppendCi(pNew);
// copy new CIs second
for ( i = nCIs; i < nAll; i++ )
Gia_ManCi(p, i)->Value = Gia_ManAppendCi(pNew);
// copy flops last
for ( i = nCIs - Gia_ManRegNum(p); i < nCIs; i++ )
Gia_ManCi(p, i)->Value = Gia_ManAppendCi(pNew);
printf( "Warning: Shuffled CI order to be correct sequential AIG.\n" );
}
if ( fHashMapping ) Gia_ManHashAlloc( pNew );
Gia_ManForEachAnd( p, pObj, i )
if ( Gia_ObjIsBuf(pObj) )
pObj->Value = Gia_ManAppendBuf( pNew, Gia_ObjFanin0Copy(pObj) );
else if ( fHashMapping )
pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
else
pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
if ( fHashMapping ) Gia_ManHashStop( pNew );
Gia_ManForEachCo( p, pObj, i )
pObj->Value = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
Gia_ManSetRegNum( pNew, Gia_ManRegNum(p) );
pNew->nConstrs = p->nConstrs;
assert( Gia_ManIsNormalized(pNew) );
Gia_ManDupRemapEquiv( pNew, p );
return pNew;
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Specialized duplication.]
Description [Replaces registers by PIs/POs and PIs by registers.]
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManDupIn2Ff( Gia_Man_t * p )
{
Vec_Int_t * vPiOuts;
Gia_Man_t * pNew;
Gia_Obj_t * pObj;
int i;
vPiOuts = Vec_IntAlloc( Gia_ManPiNum(p) );
pNew = Gia_ManStart( Gia_ManObjNum(p) + 2 * Gia_ManPiNum(p) );
pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pSpec = Abc_UtilStrsav( p->pSpec );
Gia_ManFillValue( p );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachPi( p, pObj, i )
Vec_IntPush( vPiOuts, Gia_ManAppendCi(pNew) );
Gia_ManForEachRo( p, pObj, i )
pObj->Value = Gia_ManAppendCi( pNew );
Gia_ManForEachPi( p, pObj, i )
pObj->Value = Gia_ManAppendCi( pNew );
Gia_ManForEachAnd( p, pObj, i )
pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
Gia_ManForEachPo( p, pObj, i )
pObj->Value = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
Gia_ManForEachRi( p, pObj, i )
pObj->Value = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
Gia_ManForEachPi( p, pObj, i )
Gia_ManAppendCo( pNew, Vec_IntEntry(vPiOuts, i) );
Gia_ManSetRegNum( pNew, Gia_ManPiNum(p) );
Vec_IntFree( vPiOuts );
return pNew;
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Duplicates AIG in the DFS order while putting CIs first.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManDupNormalize( Gia_Man_t * p )
{
Gia_Man_t * pNew;
Gia_Obj_t * pObj;
int i;
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pSpec = Abc_UtilStrsav( p->pSpec );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
pObj->Value = Gia_ManAppendCi(pNew);
Gia_ManForEachAnd( p, pObj, i )
pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
Gia_ManForEachCo( p, pObj, i )
pObj->Value = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
Gia_ManSetRegNum( pNew, Gia_ManRegNum(p) );
pNew->nConstrs = p->nConstrs;
assert( Gia_ManIsNormalized(pNew) );
Gia_ManDupRemapEquiv( pNew, p );
return pNew;
}
/**Function*************************************************************
Synopsis [Derives combinational miter of the two AIGs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Gia_ManFromAig_rec( Gia_Man_t * pNew, Aig_Man_t * p, Aig_Obj_t * pObj )
{
Aig_Obj_t * pNext;
if ( pObj->iData )
return;
assert( Aig_ObjIsNode(pObj) );
Gia_ManFromAig_rec( pNew, p, Aig_ObjFanin0(pObj) );
Gia_ManFromAig_rec( pNew, p, Aig_ObjFanin1(pObj) );
pObj->iData = Gia_ManAppendAnd( pNew, Gia_ObjChild0Copy(pObj), Gia_ObjChild1Copy(pObj) );
if ( p->pEquivs && (pNext = Aig_ObjEquiv(p, pObj)) )
{
int iObjNew, iNextNew;
Gia_ManFromAig_rec( pNew, p, pNext );
iObjNew = Gia_Lit2Var(pObj->iData);
iNextNew = Gia_Lit2Var(pNext->iData);
if ( pNew->pNexts )
pNew->pNexts[iObjNew] = iNextNew;
}
}
/**Function*************************************************************
Synopsis [Duplicates AIG in the DFS order.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Gia_ManFromAigChoices_rec( Gia_Man_t * pNew, Aig_Man_t * p, Aig_Obj_t * pObj )
{
if ( pObj == NULL || pObj->iData )
return;
assert( Aig_ObjIsNode(pObj) );
Gia_ManFromAigChoices_rec( pNew, p, Aig_ObjFanin0(pObj) );
Gia_ManFromAigChoices_rec( pNew, p, Aig_ObjFanin1(pObj) );
Gia_ManFromAigChoices_rec( pNew, p, Aig_ObjEquiv(p, pObj) );
pObj->iData = Gia_ManAppendAnd( pNew, Gia_ObjChild0Copy(pObj), Gia_ObjChild1Copy(pObj) );
if ( Aig_ObjEquiv(p, pObj) )
{
int iObjNew, iNextNew;
iObjNew = Abc_Lit2Var(pObj->iData);
iNextNew = Abc_Lit2Var(Aig_ObjEquiv(p, pObj)->iData);
assert( iObjNew > iNextNew );
assert( Gia_ObjIsAnd(Gia_ManObj(pNew, iNextNew)) );
pNew->pSibls[iObjNew] = iNextNew;
}
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Transforms the decomposition graph into the AIG.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Kit_GraphToGiaInternal( Gia_Man_t * pMan, Kit_Graph_t * pGraph, int fHash )
{
Kit_Node_t * pNode = NULL;
int i, pAnd0, pAnd1;
// check for constant function
if ( Kit_GraphIsConst(pGraph) )
return Abc_LitNotCond( 1, Kit_GraphIsComplement(pGraph) );
// check for a literal
if ( Kit_GraphIsVar(pGraph) )
return Abc_LitNotCond( Kit_GraphVar(pGraph)->iFunc, Kit_GraphIsComplement(pGraph) );
// build the AIG nodes corresponding to the AND gates of the graph
Kit_GraphForEachNode( pGraph, pNode, i )
{
pAnd0 = Abc_LitNotCond( Kit_GraphNode(pGraph, pNode->eEdge0.Node)->iFunc, pNode->eEdge0.fCompl );
pAnd1 = Abc_LitNotCond( Kit_GraphNode(pGraph, pNode->eEdge1.Node)->iFunc, pNode->eEdge1.fCompl );
if ( fHash )
pNode->iFunc = Gia_ManHashAnd( pMan, pAnd0, pAnd1 );
else
pNode->iFunc = Gia_ManAppendAnd( pMan, pAnd0, pAnd1 );
}
/**Function*************************************************************
Synopsis [Reorders flops for sequential AIGs with boxes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManDupUnshuffleInputs( Gia_Man_t * p )
{
Gia_Man_t * pNew;
Gia_Obj_t * pObj;
int i, nCIs, nAll, nPis;
// sanity checks
assert( Gia_ManIsNormalized(p) );
assert( Gia_ManIsSeqWithBoxes(p) );
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pSpec = Abc_UtilStrsav( p->pSpec );
Gia_ManConst0(p)->Value = 0;
// change input order
// desired reorder: PIs + NewCIs + FOs
// current CI order: PIs + FOs + NewCIs
nCIs = Tim_ManPiNum( (Tim_Man_t *)p->pManTime );
nAll = Tim_ManCiNum( (Tim_Man_t *)p->pManTime );
nPis = nCIs - Gia_ManRegNum(p);
assert( nAll == Gia_ManCiNum(p) );
assert( nPis > 0 );
// copy PIs first
for ( i = 0; i < nPis; i++ )
Gia_ManCi(p, i)->Value = Gia_ManAppendCi(pNew);
// copy flops second
for ( i = nAll - Gia_ManRegNum(p); i < nAll; i++ )
Gia_ManCi(p, i)->Value = Gia_ManAppendCi(pNew);
// copy new CIs last
for ( i = nPis; i < nAll - Gia_ManRegNum(p); i++ )
Gia_ManCi(p, i)->Value = Gia_ManAppendCi(pNew);
printf( "Warning: Unshuffled CI order to be correct AIG with boxes.\n" );
// other things
Gia_ManForEachAnd( p, pObj, i )
pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
Gia_ManForEachCo( p, pObj, i )
pObj->Value = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
Gia_ManSetRegNum( pNew, Gia_ManRegNum(p) );
pNew->nConstrs = p->nConstrs;
assert( Gia_ManIsNormalized(pNew) );
Gia_ManDupRemapEquiv( pNew, p );
return pNew;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManExtractWin( Gia_Man_t * p, Vec_Int_t * vOuts )
{
Vec_Int_t * vPis, * vPos, * vAnds;
Gia_Man_t * pNew;
Gia_Obj_t * pObj;
int i;
Gia_ManPrepareWin( p, vOuts, &vPis, &vPos, &vAnds );
// create AIG
pNew = Gia_ManStart( Vec_IntSize(vPis) + Vec_IntSize(vPos) + Vec_IntSize(vAnds) + 1 );
pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachObjVec( vPis, p, pObj, i )
pObj->Value = Gia_ManAppendCi( pNew );
Gia_ManForEachObjVec( vAnds, p, pObj, i )
pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
Gia_ManForEachObjVec( vPos, p, pObj, i )
Gia_ManAppendCo( pNew, pObj->Value );
Vec_IntFree( vPis );
Vec_IntFree( vPos );
Vec_IntFree( vAnds );
return pNew;
}
/**Function*************************************************************
Synopsis [Interface with the FPGA mapping package.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void If_ManComputeSwitching( If_Man_t * pIfMan )
{
abctime clk = Abc_Clock();
Gia_Man_t * pNew;
Vec_Int_t * vCopy;
If_Obj_t * pIfObj;
int i;
assert( pIfMan->vSwitching == NULL );
// create the new manager
pNew = Gia_ManStart( If_ManObjNum(pIfMan) );
vCopy = Vec_IntAlloc( If_ManObjNum(pIfMan) );
// constant and inputs
Vec_IntPush( vCopy, 1 );
If_ManForEachCi( pIfMan, pIfObj, i )
Vec_IntPush( vCopy, Gia_ManAppendCi(pNew) );
// internal nodes
If_ManForEachNode( pIfMan, pIfObj, i )
{
int iLit0 = Abc_LitNotCond( Vec_IntEntry(vCopy, If_ObjFanin0(pIfObj)->Id), If_ObjFaninC0(pIfObj) );
int iLit1 = Abc_LitNotCond( Vec_IntEntry(vCopy, If_ObjFanin1(pIfObj)->Id), If_ObjFaninC1(pIfObj) );
Vec_IntPush( vCopy, Gia_ManAppendAnd(pNew, iLit0, iLit1) );
}
inline int Gia_ManAppendAnd2_Simplified( abc::Gia_Man_t * p, int iLit0, int iLit1 )
{
if ( iLit0 == iLit1 )
return iLit1;
return Gia_ManAppendAnd( p, iLit0, iLit1 );
}
Gia_ManForEachCi( p, pObj, i )
if ( Gia_ObjIsTravIdCurrent(p, pObj) )
pObj->Value = Gia_ManAppendCi(pNew);
// add variables for the register outputs
// create fake POs to hold the register outputs
Vec_IntForEachEntry( vPart, iOut, i )
{
pObj = Gia_ManCi(p, Gia_ManPiNum(p)+iOut);
pObj->Value = Gia_ManAppendCi(pNew);
Gia_ManAppendCo( pNew, pObj->Value );
Gia_ObjSetTravIdCurrent( p, pObj ); // added
}
// create the nodes
Gia_ManForEachObjVec( vNodes, p, pObj, i )
if ( Gia_ObjIsAnd(pObj) )
pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
// add real POs for the registers
Vec_IntForEachEntry( vPart, iOut, i )
{
pObj = Gia_ManCo( p, Gia_ManPoNum(p)+iOut );
Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
}
Gia_ManSetRegNum( pNew, Vec_IntSize(vPart) );
// create map
if ( ppMapBack )
{
pMapBack = ABC_FALLOC( int, Gia_ManObjNum(pNew) );
// map constant nodes
pMapBack[0] = 0;
// logic cones of register outputs
Gia_ManForEachObjVec( vNodes, p, pObj, i )
